2b3687dbb5
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10404 6f19259b-4bc3-4df7-8a09-765794883524
176 lines
5.6 KiB
C
176 lines
5.6 KiB
C
/** @file
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This file declares the SMM CPU Save State protocol, which provides the processor
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save-state information for IA-32 and Itanium processors.
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Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials are licensed and made available under
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the terms and conditions of the BSD License that accompanies this distribution.
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The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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@par Revision Reference:
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This Protocol is defined in Framework of EFI SMM Core Interface Spec
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Version 0.91.
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**/
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#ifndef _SMM_CPU_SAVE_STATE_H_
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#define _SMM_CPU_SAVE_STATE_H_
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#define EFI_SMM_CPU_SAVE_STATE_PROTOCOL_GUID \
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{ \
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0x21f302ad, 0x6e94, 0x471b, {0x84, 0xbc, 0xb1, 0x48, 0x0, 0x40, 0x3a, 0x1d} \
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}
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typedef struct _EFI_SMM_CPU_SAVE_STATE_PROTOCOL EFI_SMM_CPU_SAVE_STATE_PROTOCOL;
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#define EFI_SMM_MIN_REV_ID_x64 0x30006
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#pragma pack (1)
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///
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/// CPU save-state strcuture for IA32 and X64.
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///
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/// This struct declaration does not exctly match the Framework SMM CIS 0.91 because the
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/// union in the Framework SMM CIS 0.91 contains an unnamed union member that causes build
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/// breaks on many compilers with high warning levels. Instead, the UINT8 Reserved[0x200]
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/// field has been moved into EFI_SMM_CPU_STATE32. This maintains binary compatibility for
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/// the layout and also maintains source comaptibility for access of all fields in this
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/// union.
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///
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/// This struct declaration does not exctly match the Framework SMM CIS 0.91 because
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/// the Framework SMM CIS 0.91 uses ASM_XXX for base types in this structure. These
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/// have been changed to use the base types defined in the UEFI Specification.
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///
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typedef struct {
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UINT8 Reserved[0x200];
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UINT8 Reserved1[0xf8]; // fe00h
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UINT32 SMBASE; // fef8h
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UINT32 SMMRevId; // fefch
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UINT16 IORestart; // ff00h
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UINT16 AutoHALTRestart; // ff02h
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UINT32 IEDBASE; // ff04h
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UINT8 Reserved2[0x98]; // ff08h
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UINT32 IOMemAddr; // ffa0h
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UINT32 IOMisc; // ffa4h
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UINT32 _ES;
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UINT32 _CS;
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UINT32 _SS;
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UINT32 _DS;
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UINT32 _FS;
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UINT32 _GS;
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UINT32 _LDTBase;
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UINT32 _TR;
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UINT32 _DR7;
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UINT32 _DR6;
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UINT32 _EAX;
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UINT32 _ECX;
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UINT32 _EDX;
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UINT32 _EBX;
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UINT32 _ESP;
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UINT32 _EBP;
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UINT32 _ESI;
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UINT32 _EDI;
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UINT32 _EIP;
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UINT32 _EFLAGS;
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UINT32 _CR3;
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UINT32 _CR0;
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} EFI_SMM_CPU_STATE32;
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///
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/// This struct declaration does not exctly match the Framework SMM CIS 0.91 because
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/// the Framework SMM CIS 0.91 uses ASM_XXX for base types in this structure. These
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/// have been changed to use the base types defined in the UEFI Specification.
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///
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typedef struct {
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UINT8 Reserved1[0x1d0]; // fc00h
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UINT32 GdtBaseHiDword; // fdd0h
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UINT32 LdtBaseHiDword; // fdd4h
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UINT32 IdtBaseHiDword; // fdd8h
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UINT8 Reserved2[0xc]; // fddch
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UINT64 IO_EIP; // fde8h
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UINT8 Reserved3[0x50]; // fdf0h
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UINT32 _CR4; // fe40h
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UINT8 Reserved4[0x48]; // fe44h
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UINT32 GdtBaseLoDword; // fe8ch
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UINT32 GdtLimit; // fe90h
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UINT32 IdtBaseLoDword; // fe94h
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UINT32 IdtLimit; // fe98h
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UINT32 LdtBaseLoDword; // fe9ch
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UINT32 LdtLimit; // fea0h
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UINT32 LdtInfo; // fea4h
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UINT8 Reserved5[0x50]; // fea8h
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UINT32 SMBASE; // fef8h
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UINT32 SMMRevId; // fefch
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UINT16 AutoHALTRestart; // ff00h
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UINT16 IORestart; // ff02h
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UINT32 IEDBASE; // ff04h
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UINT8 Reserved6[0x14]; // ff08h
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UINT64 _R15; // ff1ch
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UINT64 _R14;
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UINT64 _R13;
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UINT64 _R12;
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UINT64 _R11;
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UINT64 _R10;
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UINT64 _R9;
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UINT64 _R8;
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UINT64 _RAX; // ff5ch
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UINT64 _RCX;
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UINT64 _RDX;
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UINT64 _RBX;
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UINT64 _RSP;
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UINT64 _RBP;
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UINT64 _RSI;
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UINT64 _RDI;
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UINT64 IOMemAddr; // ff9ch
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UINT32 IOMisc; // ffa4h
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UINT32 _ES; // ffa8h
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UINT32 _CS;
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UINT32 _SS;
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UINT32 _DS;
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UINT32 _FS;
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UINT32 _GS;
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UINT32 _LDTR; // ffc0h
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UINT32 _TR;
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UINT64 _DR7; // ffc8h
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UINT64 _DR6;
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UINT64 _RIP; // ffd8h
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UINT64 IA32_EFER; // ffe0h
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UINT64 _RFLAGS; // ffe8h
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UINT64 _CR3; // fff0h
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UINT64 _CR0; // fff8h
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} EFI_SMM_CPU_STATE64;
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///
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/// Union of CPU save-state strcutures for IA32 and X64.
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///
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/// This union declaration does not exctly match the Framework SMM CIS 0.91 because the
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/// union in the Framework SMM CIS 0.91 contains an unnamed union member that causes build
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/// breaks on many compilers with high warning levels. Instead, the UINT8 Reserved[0x200]
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/// field has been moved into EFI_SMM_CPU_STATE32. This maintains binary compatibility for
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/// the layout and also maintains source comaptibility for access of all fields in this
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/// union.
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///
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typedef union {
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EFI_SMM_CPU_STATE32 x86;
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EFI_SMM_CPU_STATE64 x64;
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} EFI_SMM_CPU_STATE;
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#pragma pack ()
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///
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/// Provides a programatic means to access SMM save state.
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///
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struct _EFI_SMM_CPU_SAVE_STATE_PROTOCOL {
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///
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/// Reference to a list of save states.
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///
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EFI_SMM_CPU_STATE **CpuSaveState;
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};
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extern EFI_GUID gEfiSmmCpuSaveStateProtocolGuid;
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#endif
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