7798fb83de
Signed-off-by: Tian, Hot <hot.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15162 6f19259b-4bc3-4df7-8a09-765794883524
63 lines
1.8 KiB
NASM
63 lines
1.8 KiB
NASM
;------------------------------------------------------------------------------
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;*
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;* Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
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;* This program and the accompanying materials
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;* are licensed and made available under the terms and conditions of the BSD License
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;* which accompanies this distribution. The full text of the license may be found at
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;* http://opensource.org/licenses/bsd-license.php
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;*
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;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;*
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;*
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;------------------------------------------------------------------------------
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.const
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;
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; Float control word initial value:
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; all exceptions masked, double-extended-precision, round-to-nearest
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;
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mFpuControlWord DW 037Fh
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;
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; Multimedia-extensions control word:
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; all exceptions masked, round-to-nearest, flush to zero for masked underflow
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;
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mMmxControlWord DD 01F80h
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.code
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;
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; Initializes floating point units for requirement of UEFI specification.
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;
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; This function initializes floating-point control word to 0x027F (all exceptions
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; masked,double-precision, round-to-nearest) and multimedia-extensions control word
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; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
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; for masked underflow).
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;
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InitializeFloatingPointUnits PROC PUBLIC
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;
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; Initialize floating point units
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;
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; The following opcodes stand for instruction 'finit'
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; to be supported by some 64-bit assemblers
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;
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DB 9Bh, 0DBh, 0E3h
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fldcw mFpuControlWord
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;
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; Set OSFXSR bit 9 in CR4
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;
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mov rax, cr4
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or rax, BIT9
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mov cr4, rax
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ldmxcsr mMmxControlWord
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ret
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InitializeFloatingPointUnits ENDP
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END
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