0df6c8c157
XIP code may execute with the MMU off, in which case all memory accesses should be strictly aligned to their size. Some versions of GCC violate this restriction even when -mstrict-align is passed, when performing loads and stores that involve SIMD registers. This is clearly a bug in the compiler, but we can easily work around it by avoiding SIMD registers altogether when building code that may execute in such a context. So add -mgeneral-regs-only to the AARCH64 XIP CC flags. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>