https://svn.code.sf.net/p/edk2/code/trunk/edk2/, which are for MinnowBoard MAX open source project. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: David Wei <david.wei@intel.com> Reviewed-by: Mike Wu <mike.wu@intel.com> Reviewed-by: Hot Tian <hot.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16599 6f19259b-4bc3-4df7-8a09-765794883524
		
			
				
	
	
		
			171 lines
		
	
	
		
			6.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			171 lines
		
	
	
		
			6.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/** @file
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  I2C bus interface
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  This layer provides I/O access to an I2C device.
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  Copyright (c) 2012, Intel Corporation
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  All rights reserved. This program and the accompanying materials
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  are licensed and made available under the terms and conditions of the BSD License
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  which accompanies this distribution.  The full text of the license may be found at
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  http://opensource.org/licenses/bsd-license.php
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  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef __I2C_BUS_H__
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#define __I2C_BUS_H__
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#include <Protocol/I2cHostMcg.h>
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///
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/// I2C bus protocol
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///
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typedef struct _EFI_I2C_BUS_PROTOCOL  EFI_I2C_BUS_PROTOCOL;
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/**
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  Perform an I2C operation on the device
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  This routine must be called at or below TPL_NOTIFY.  For synchronous
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  requests this routine must be called at or below TPL_CALLBACK.
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  N.B. The typical consumers of this API are the third party I2C
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  drivers.  Extreme care must be taken by other consumers of this
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  API to prevent confusing the third party I2C drivers due to a
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  state change at the I2C device which the third party I2C drivers
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  did not initiate.  I2C platform drivers may use this API within
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  these guidelines.
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  This routine queues an operation to the I2C controller for execution
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  on the I2C bus.
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  As an upper layer driver writer, the following need to be provided
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  to the platform vendor:
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  1.  ACPI CID value or string - this is used to connect the upper layer
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      driver to the device.
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  2.  Slave address array guidance when the I2C device uses more than one
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      slave address.  This is used to access the blocks of hardware within
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      the I2C device.
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  @param[in] This               Address of an EFI_I2C_BUS_PROTOCOL
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                                structure
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  @param[in] SlaveAddressIndex  Index into an array of slave addresses for
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                                the I2C device.  The values in the array are
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                                specified by the board designer, with the
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                                I2C device driver writer providing the slave
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                                address order.
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                                For devices that have a single slave address,
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                                this value must be zero.  If the I2C device
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                                uses more than one slave address then the third
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                                party (upper level) I2C driver writer needs to
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                                specify the order of entries in the slave address
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                                array.
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                                \ref ThirdPartyI2cDrivers "Third Party I2C Drivers"
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                                section in I2cMaster.h.
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  @param[in] Event              Event to set for asynchronous operations,
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                                NULL for synchronous operations
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  @param[in] RequestPacket      Address of an EFI_I2C_REQUEST_PACKET
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                                structure describing the I2C operation
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  @param[out] I2cStatus         Optional buffer to receive the I2C operation
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                                completion status
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  @retval EFI_SUCCESS           The operation completed successfully.
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  @retval EFI_ABORTED           The request did not complete because the driver
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                                was shutdown.
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  @retval EFI_ACCESS_DENIED     Invalid SlaveAddressIndex value
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  @retval EFI_BAD_BUFFER_SIZE   The WriteBytes or ReadBytes buffer size is too large.
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  @retval EFI_DEVICE_ERROR      There was an I2C error (NACK) during the operation.
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                                This could indicate the slave device is not present.
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  @retval EFI_INVALID_PARAMETER RequestPacket is NULL
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  @retval EFI_INVALID_PARAMETER TPL is too high
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  @retval EFI_NO_RESPONSE       The I2C device is not responding to the
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                                slave address.  EFI_DEVICE_ERROR may also be
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                                returned if the controller can not distinguish
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                                when the NACK occurred.
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  @retval EFI_NOT_FOUND         I2C slave address exceeds maximum address
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  @retval EFI_NOT_READY         I2C bus is busy or operation pending, wait for
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                                the event and then read status pointed to by
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                                the request packet.
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  @retval EFI_OUT_OF_RESOURCES  Insufficient memory for I2C operation
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  @retval EFI_TIMEOUT           The transaction did not complete within an internally
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                                specified timeout period.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_I2C_BUS_START_REQUEST) (
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  IN CONST EFI_I2C_BUS_PROTOCOL *This,
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  IN UINTN SlaveAddressIndex,
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  IN EFI_EVENT Event OPTIONAL,
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  IN CONST EFI_I2C_REQUEST_PACKET *RequestPacket,
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  OUT EFI_STATUS *I2cStatus OPTIONAL
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  );
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///
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/// The I2C bus protocol enables access to a specific device on the I2C bus.
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///
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/// Each I2C device is described as an ACPI node (HID, UID and CID) within the
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/// platform layer.  The I2C bus protocol enumerates the I2C devices in the
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/// platform and creates a unique handle and device path for each I2C device.
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///
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/// I2C slave addressing is abstracted to validate addresses and limit operation
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/// to the specified I2C device.  The third party providing the I2C device support
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/// provides an ordered list of slave addresses for the I2C device to the team
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/// building the platform layer.  The platform team must preserve the order of the
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/// supplied list.  SlaveAddressCount is the number of entries in this list or
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/// array within the platform layer.  The third party device support references
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/// a slave address using an index into the list or array in the range of zero
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/// to SlaveAddressCount - 1.
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///
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struct _EFI_I2C_BUS_PROTOCOL {
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  ///
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  /// Start an I2C operation on the bus
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  ///
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  EFI_I2C_BUS_START_REQUEST StartRequest;
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  ///
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  /// The maximum number of slave addresses for the I2C device.  The caller may
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  /// validate this value as a check on the platform layer's configuration.  Slave
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  /// address selection uses an index value in the range of zero to SlaveAddressCount - 1.
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  ///
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  UINTN SlaveAddressCount;
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  ///
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  /// Hardware revision - Matches the ACPI _HRV value
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  ///
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  /// The HardwareRevision value allows a single driver to support multiple hardware
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  /// revisions and implement the necessary workarounds for limitations within the
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  /// hardware.
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  ///
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  UINT32 HardwareRevision;
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  ///
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  /// The maximum number of bytes the I2C host controller
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  /// is able to receive from the I2C bus.
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  ///
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  UINT32 MaximumReceiveBytes;
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  ///
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  /// The maximum number of bytes the I2C host controller
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  /// is able to send on the I2C bus.
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  ///
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  UINT32 MaximumTransmitBytes;
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  ///
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  /// The maximum number of bytes in the I2C bus transaction.
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  ///
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  UINT32 MaximumTotalBytes;
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};
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///
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/// GUID for the I2C bus protocol
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///
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extern EFI_GUID gEfiI2cBusProtocolGuid;
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#endif  //  __I2C_BUS_H__
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