18029bb9112f7af8c9aedcf0dacbdd5267eb258c
ArmEnableVFP could crash on an out-of-order CPU. Adding an instruction barrier after writing to CPACR cures the problem. Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13134 6f19259b-4bc3-4df7-8a09-765794883524
Description
Languages
C
82.2%
Python
10.3%
Assembly
3.4%
Rich Text Format
1.8%
C++
0.7%
Other
1.2%