Section 7.8.2 of the PCI Express specification (r4.0 v0.3), entitled "PCI Express Capabilities Register (Offset 02h)", and section 7.8.9 "Slot Capabilities Register (Offset 14h)" of the same, describe the conditions when a PCIe port should be considered "supporting hotplug": - it should be a root complex port or a switch downstream port, and - it should have the "Slot Implemented" bit set in the Express Capabilities Register, and - it should have the "Hot-Plug Capable" bit set in the Slot Capabilities Register. The first two sub-conditions are already implemented in at least two open source projects I could find: - in SeaBIOS by Marcel Apfelbaum: "hw/pci: reserve IO and mem for pci express downstream ports with no devices attached" <https://code.coreboot.org/p/seabios/source/commit/3aa31d7d6375>, - in edk2 itself, in the implementation of the "PCI" UEFI Shell command: see the "PcieExplainTypeSlot" case label in function PciExplainPciExpress(), file "ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c". PciBusDxe recognizes such PCIe ports as bridges, but it doesn't realize they support hotplug. In turn PciBusDxe omits getting any resource padding information from the platform's EFI_PCI_HOT_PLUG_INIT_PROTOCOL for these bridges: GatherPpbInfo() [PciEnumeratorSupport.c] GetResourcePaddingPpb() [PciResourceSupport.c] GetResourcePaddingForHpb() [PciHotPlugSupport.c] IsPciHotPlugBus() [PciHotPlugSupport.c] // // returns FALSE // // // the following is not reached: // gPciHotPlugInit->GetResourcePadding() Implement a function called SupportsPcieHotplug() for identifying such ports, and call it from IsPciHotPlugBus() (after the call to IsSHPC()). Cc: "Johnson, Brian J." <bjohnson@sgi.com> Cc: Alex Williamson <alex.williamson@redhat.com> Cc: Andrew Fish <afish@apple.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
		
			
				
	
	
		
			491 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			491 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /** @file
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|   PCI Hot Plug support functions implementation for PCI Bus module..
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| 
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| Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
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| This program and the accompanying materials
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| are licensed and made available under the terms and conditions of the BSD License
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| which accompanies this distribution.  The full text of the license may be found at
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| http://opensource.org/licenses/bsd-license.php
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| 
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| THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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| WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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| 
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| **/
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| 
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| #include "PciBus.h"
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| 
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| EFI_PCI_HOT_PLUG_INIT_PROTOCOL  *gPciHotPlugInit = NULL;
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| EFI_HPC_LOCATION                *gPciRootHpcPool = NULL;
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| UINTN                           gPciRootHpcCount = 0;
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| ROOT_HPC_DATA                   *gPciRootHpcData = NULL;
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| 
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| 
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| /**
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|   Event notification function to set Hot Plug controller status.
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| 
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|   @param  Event                    The event that invoke this function.
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|   @param  Context                  The calling context, pointer to ROOT_HPC_DATA.
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| 
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| **/
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| VOID
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| EFIAPI
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| PciHPCInitialized (
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|   IN EFI_EVENT    Event,
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|   IN VOID         *Context
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|   )
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| {
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|   ROOT_HPC_DATA   *HpcData;
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| 
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|   HpcData               = (ROOT_HPC_DATA *) Context;
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|   HpcData->Initialized  = TRUE;
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| }
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| 
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| /**
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|   Compare two device pathes to check if they are exactly same.
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| 
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|   @param DevicePath1    A pointer to the first device path data structure.
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|   @param DevicePath2    A pointer to the second device path data structure.
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| 
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|   @retval TRUE    They are same.
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|   @retval FALSE   They are not same.
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| 
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| **/
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| BOOLEAN
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| EfiCompareDevicePath (
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|   IN EFI_DEVICE_PATH_PROTOCOL *DevicePath1,
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|   IN EFI_DEVICE_PATH_PROTOCOL *DevicePath2
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|   )
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| {
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|   UINTN Size1;
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|   UINTN Size2;
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| 
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|   Size1 = GetDevicePathSize (DevicePath1);
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|   Size2 = GetDevicePathSize (DevicePath2);
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| 
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|   if (Size1 != Size2) {
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|     return FALSE;
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|   }
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| 
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|   if (CompareMem (DevicePath1, DevicePath2, Size1) != 0) {
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|     return FALSE;
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|   }
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| 
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|   return TRUE;
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| }
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| 
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| /**
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|   Check hot plug support and initialize root hot plug private data.
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| 
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|   If Hot Plug is supported by the platform, call PCI Hot Plug Init protocol
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|   to get PCI Hot Plug controller's information and constructor the root hot plug
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|   private data structure.
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| 
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|   @retval EFI_SUCCESS           They are same.
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|   @retval EFI_UNSUPPORTED       No PCI Hot Plug controler on the platform.
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|   @retval EFI_OUT_OF_RESOURCES  No memory to constructor root hot plug private
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|                                 data structure.
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| 
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| **/
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| EFI_STATUS
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| InitializeHotPlugSupport (
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|   VOID
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|   )
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| {
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|   EFI_STATUS        Status;
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|   EFI_HPC_LOCATION  *HpcList;
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|   UINTN             HpcCount;
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| 
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|   //
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|   // Locate the PciHotPlugInit Protocol
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|   // If it doesn't exist, that means there is no
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|   // hot plug controller supported on the platform
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|   // the PCI Bus driver is running on. HotPlug Support
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|   // is an optional feature, so absence of the protocol
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|   // won't incur the penalty.
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|   //
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|   Status = gBS->LocateProtocol (
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|                   &gEfiPciHotPlugInitProtocolGuid,
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|                   NULL,
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|                   (VOID **) &gPciHotPlugInit
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|                   );
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| 
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|   if (EFI_ERROR (Status)) {
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|     return EFI_UNSUPPORTED;
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|   }
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| 
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|   Status = gPciHotPlugInit->GetRootHpcList (
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|                               gPciHotPlugInit,
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|                               &HpcCount,
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|                               &HpcList
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|                               );
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| 
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|   if (!EFI_ERROR (Status)) {
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| 
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|     gPciRootHpcPool   = HpcList;
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|     gPciRootHpcCount  = HpcCount;
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|     gPciRootHpcData   = AllocateZeroPool (sizeof (ROOT_HPC_DATA) * gPciRootHpcCount);
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|     if (gPciRootHpcData == NULL) {
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|       return EFI_OUT_OF_RESOURCES;
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|     }
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|   }
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| 
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|   return EFI_SUCCESS;
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| }
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| 
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| /**
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|   Test whether device path is for root pci hot plug bus.
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| 
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|   @param HpbDevicePath  A pointer to device path data structure to be tested.
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|   @param HpIndex        If HpIndex is not NULL, return the index of root hot
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|                         plug in global array when TRUE is retuned.
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| 
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|   @retval TRUE          The device path is for root pci hot plug bus.
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|   @retval FALSE         The device path is not for root pci hot plug bus.
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| 
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| **/
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| BOOLEAN
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| IsRootPciHotPlugBus (
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|   IN  EFI_DEVICE_PATH_PROTOCOL        *HpbDevicePath,
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|   OUT UINTN                           *HpIndex    OPTIONAL
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|   )
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| {
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|   UINTN Index;
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| 
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|   for (Index = 0; Index < gPciRootHpcCount; Index++) {
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| 
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|     if (EfiCompareDevicePath (gPciRootHpcPool[Index].HpbDevicePath, HpbDevicePath)) {
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| 
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|       if (HpIndex != NULL) {
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|         *HpIndex = Index;
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|       }
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| 
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|       return TRUE;
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|     }
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|   }
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| 
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|   return FALSE;
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| }
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| 
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| /**
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|   Test whether device path is for root pci hot plug controller.
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| 
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|   @param HpcDevicePath  A pointer to device path data structure to be tested.
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|   @param HpIndex        If HpIndex is not NULL, return the index of root hot
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|                         plug in global array when TRUE is retuned.
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| 
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|   @retval TRUE          The device path is for root pci hot plug controller.
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|   @retval FALSE         The device path is not for root pci hot plug controller.
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| 
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| **/
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| BOOLEAN
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| IsRootPciHotPlugController (
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|   IN EFI_DEVICE_PATH_PROTOCOL         *HpcDevicePath,
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|   OUT UINTN                           *HpIndex
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|   )
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| {
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|   UINTN Index;
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| 
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|   for (Index = 0; Index < gPciRootHpcCount; Index++) {
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| 
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|     if (EfiCompareDevicePath (gPciRootHpcPool[Index].HpcDevicePath, HpcDevicePath)) {
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| 
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|       if (HpIndex != NULL) {
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|         *HpIndex = Index;
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|       }
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| 
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|       return TRUE;
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|     }
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|   }
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| 
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|   return FALSE;
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| }
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| 
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| /**
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|   Creating event object for PCI Hot Plug controller.
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| 
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|   @param  HpIndex   Index of hot plug device in global array.
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|   @param  Event     The retuned event that invoke this function.
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| 
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|   @return Status of create event invoken.
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| 
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| **/
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| EFI_STATUS
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| CreateEventForHpc (
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|   IN  UINTN      HpIndex,
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|   OUT EFI_EVENT  *Event
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|   )
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| {
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|   EFI_STATUS  Status;
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| 
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|   Status = gBS->CreateEvent (
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|                   EVT_NOTIFY_SIGNAL,
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|                   TPL_CALLBACK,
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|                   PciHPCInitialized,
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|                   gPciRootHpcData + HpIndex,
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|                   &((gPciRootHpcData + HpIndex)->Event)
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|                   );
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| 
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|   if (!EFI_ERROR (Status)) {
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|     *Event = (gPciRootHpcData + HpIndex)->Event;
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|   }
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| 
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|   return Status;
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| }
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| 
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| /**
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|   Wait for all root PCI Hot Plug controller finished initializing.
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| 
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|   @param TimeoutInMicroSeconds  Microseconds to wait for all root HPCs' initialization.
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| 
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|   @retval EFI_SUCCESS           All HPCs initialization finished.
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|   @retval EFI_TIMEOUT           Not ALL HPCs initialization finished in Microseconds.
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| 
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| **/
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| EFI_STATUS
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| AllRootHPCInitialized (
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|   IN  UINTN           TimeoutInMicroSeconds
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|   )
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| {
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|   UINT32  Delay;
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|   UINTN   Index;
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| 
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|   Delay = (UINT32) ((TimeoutInMicroSeconds / 30) + 1);
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| 
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|   do {
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|     for (Index = 0; Index < gPciRootHpcCount; Index++) {
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| 
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|       if (gPciRootHpcData[Index].Found && !gPciRootHpcData[Index].Initialized) {
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|         break;
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|       }
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|     }
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| 
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|     if (Index == gPciRootHpcCount) {
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|       return EFI_SUCCESS;
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|     }
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| 
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|     //
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|     // Stall for 30 microseconds..
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|     //
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|     gBS->Stall (30);
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| 
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|     Delay--;
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| 
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|   } while (Delay > 0);
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| 
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|   return EFI_TIMEOUT;
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| }
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| 
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| /**
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|   Check whether PCI-PCI bridge has PCI Hot Plug capability register block.
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| 
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|   @param PciIoDevice    A Pointer to the PCI-PCI bridge.
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| 
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|   @retval TRUE    PCI device is HPC.
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|   @retval FALSE   PCI device is not HPC.
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| 
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| **/
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| BOOLEAN
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| IsSHPC (
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|   IN PCI_IO_DEVICE                      *PciIoDevice
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|   )
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| {
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| 
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|   EFI_STATUS  Status;
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|   UINT8       Offset;
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| 
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|   if (PciIoDevice == NULL) {
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|     return FALSE;
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|   }
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| 
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|   Offset = 0;
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|   Status = LocateCapabilityRegBlock (
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|             PciIoDevice,
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|             EFI_PCI_CAPABILITY_ID_SHPC,
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|             &Offset,
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|             NULL
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|             );
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| 
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|   //
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|   // If the PCI-PCI bridge has the hot plug controller build-in,
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|   // then return TRUE;
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|   //
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|   if (!EFI_ERROR (Status)) {
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|     return TRUE;
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|   }
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| 
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|   return FALSE;
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| }
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| 
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| /**
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|   Check whether PciIoDevice supports PCIe hotplug.
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| 
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|   This is equivalent to the following condition:
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|   - the device is either a PCIe switch downstream port or a root port,
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|   - and the device has the SlotImplemented bit set in its PCIe capability
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|     register,
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|   - and the device has the HotPlugCapable bit set in its slot capabilities
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|     register.
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| 
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|   @param[in] PciIoDevice  The device being checked.
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| 
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|   @retval TRUE   PciIoDevice is a PCIe port that accepts a hotplugged device.
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|   @retval FALSE  Otherwise.
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| 
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| **/
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| BOOLEAN
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| SupportsPcieHotplug (
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|   IN PCI_IO_DEVICE                      *PciIoDevice
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|   )
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| {
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|   UINT32                       Offset;
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|   EFI_STATUS                   Status;
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|   PCI_REG_PCIE_CAPABILITY      Capability;
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|   PCI_REG_PCIE_SLOT_CAPABILITY SlotCapability;
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| 
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|   if (PciIoDevice == NULL) {
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|     return FALSE;
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|   }
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| 
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|   //
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|   // Read the PCI Express Capabilities Register
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|   //
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|   if (!PciIoDevice->IsPciExp) {
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|     return FALSE;
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|   }
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|   Offset = PciIoDevice->PciExpressCapabilityOffset +
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|            OFFSET_OF (PCI_CAPABILITY_PCIEXP, Capability);
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|   Status = PciIoDevice->PciIo.Pci.Read (
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|                                     &PciIoDevice->PciIo,
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|                                     EfiPciIoWidthUint16,
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|                                     Offset,
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|                                     1,
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|                                     &Capability
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|                                     );
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|   if (EFI_ERROR (Status)) {
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|     return FALSE;
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|   }
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| 
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|   //
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|   // Check the contents of the register
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|   //
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|   switch (Capability.Bits.DevicePortType) {
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|   case PCIE_DEVICE_PORT_TYPE_ROOT_PORT:
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|   case PCIE_DEVICE_PORT_TYPE_DOWNSTREAM_PORT:
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|     break;
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|   default:
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|     return FALSE;
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|   }
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|   if (!Capability.Bits.SlotImplemented) {
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|     return FALSE;
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|   }
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| 
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|   //
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|   // Read the Slot Capabilities Register
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|   //
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|   Offset = PciIoDevice->PciExpressCapabilityOffset +
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|            OFFSET_OF (PCI_CAPABILITY_PCIEXP, SlotCapability);
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|   Status = PciIoDevice->PciIo.Pci.Read (
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|                                     &PciIoDevice->PciIo,
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|                                     EfiPciIoWidthUint32,
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|                                     Offset,
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|                                     1,
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|                                     &SlotCapability
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|                                     );
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|   if (EFI_ERROR (Status)) {
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|     return FALSE;
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|   }
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| 
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|   //
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|   // Check the contents of the register
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|   //
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|   if (SlotCapability.Bits.HotPlugCapable) {
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|     return TRUE;
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|   }
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|   return FALSE;
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| }
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| 
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| /**
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|   Get resource padding if the specified PCI bridge is a hot plug bus.
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| 
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|   @param PciIoDevice    PCI bridge instance.
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| 
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| **/
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| VOID
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| GetResourcePaddingForHpb (
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|   IN PCI_IO_DEVICE      *PciIoDevice
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|   )
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| {
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|   EFI_STATUS                        Status;
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|   EFI_HPC_STATE                     State;
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|   UINT64                            PciAddress;
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|   EFI_HPC_PADDING_ATTRIBUTES        Attributes;
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|   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;
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| 
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|   if (IsPciHotPlugBus (PciIoDevice)) {
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|     //
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|     // If PCI-PCI bridge device is PCI Hot Plug bus.
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|     //
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|     PciAddress = EFI_PCI_ADDRESS (PciIoDevice->BusNumber, PciIoDevice->DeviceNumber, PciIoDevice->FunctionNumber, 0);
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|     Status = gPciHotPlugInit->GetResourcePadding (
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|                                 gPciHotPlugInit,
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|                                 PciIoDevice->DevicePath,
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|                                 PciAddress,
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|                                 &State,
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|                                 (VOID **) &Descriptors,
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|                                 &Attributes
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|                                 );
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| 
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|     if (EFI_ERROR (Status)) {
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|       return;
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|     }
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| 
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|     if ((State & EFI_HPC_STATE_ENABLED) != 0 && (State & EFI_HPC_STATE_INITIALIZED) != 0) {
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|       PciIoDevice->ResourcePaddingDescriptors = Descriptors;
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|       PciIoDevice->PaddingAttributes          = Attributes;
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|     }
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| 
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|     return;
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|   }
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| }
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| 
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| /**
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|   Test whether PCI device is hot plug bus.
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| 
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|   @param PciIoDevice  PCI device instance.
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| 
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|   @retval TRUE    PCI device is a hot plug bus.
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|   @retval FALSE   PCI device is not a hot plug bus.
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| 
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| **/
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| BOOLEAN
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| IsPciHotPlugBus (
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|   PCI_IO_DEVICE                       *PciIoDevice
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|   )
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| {
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|   if (IsSHPC (PciIoDevice)) {
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|     //
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|     // If the PPB has the hot plug controller build-in,
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|     // then return TRUE;
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|     //
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|     return TRUE;
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|   }
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| 
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|   if (SupportsPcieHotplug (PciIoDevice)) {
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|     //
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|     // If the PPB is a PCIe root complex port or a switch downstream port, and
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|     // implements a hot-plug capable slot, then also return TRUE.
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|     //
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|     return TRUE;
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|   }
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| 
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|   //
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|   // Otherwise, see if it is a Root HPC
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|   //
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|   if(IsRootPciHotPlugBus (PciIoDevice->DevicePath, NULL)) {
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|     return TRUE;
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|   }
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| 
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|   return FALSE;
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| }
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| 
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