REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the UefiCpuPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
		
			
				
	
	
		
			281 lines
		
	
	
		
			7.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			281 lines
		
	
	
		
			7.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /** @file
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|   CPUID Leaf 0x15 for Core Crystal Clock frequency instance of Timer Library.
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| 
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|   Copyright (c) 2019 Intel Corporation. All rights reserved.<BR>
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|   SPDX-License-Identifier: BSD-2-Clause-Patent
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| 
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| **/
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| 
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| #include <Base.h>
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| #include <Library/TimerLib.h>
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| #include <Library/BaseLib.h>
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| #include <Library/PcdLib.h>
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| #include <Library/DebugLib.h>
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| #include <Register/Cpuid.h>
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| 
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| GUID  mCpuCrystalFrequencyHobGuid = {
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|   0xe1ec5ad0, 0x8569, 0x46bd, { 0x8d, 0xcd, 0x3b, 0x9f, 0x6f, 0x45, 0x82, 0x7a }
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| };
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| 
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| /**
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|   Internal function to retrieves the 64-bit frequency in Hz.
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| 
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|   Internal function to retrieves the 64-bit frequency in Hz.
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| 
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|   @return The frequency in Hz.
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| 
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| **/
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| UINT64
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| InternalGetPerformanceCounterFrequency (
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|   VOID
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|   );
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| 
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| /**
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|   CPUID Leaf 0x15 for Core Crystal Clock Frequency.
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| 
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|   The TSC counting frequency is determined by using CPUID leaf 0x15. Frequency in MHz = Core XTAL frequency * EBX/EAX.
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|   In newer flavors of the CPU, core xtal frequency is returned in ECX or 0 if not supported.
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|   @return The number of TSC counts per second.
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| 
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| **/
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| UINT64
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| CpuidCoreClockCalculateTscFrequency (
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|   VOID
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|   )
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| {
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|   UINT64  TscFrequency;
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|   UINT64  CoreXtalFrequency;
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|   UINT32  RegEax;
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|   UINT32  RegEbx;
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|   UINT32  RegEcx;
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| 
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|   //
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|   // Use CPUID leaf 0x15 Time Stamp Counter and Nominal Core Crystal Clock Information
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|   // EBX returns 0 if not supported. ECX, if non zero, provides Core Xtal Frequency in hertz.
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|   // TSC frequency = (ECX, Core Xtal Frequency) * EBX/EAX.
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|   //
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|   AsmCpuid (CPUID_TIME_STAMP_COUNTER, &RegEax, &RegEbx, &RegEcx, NULL);
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| 
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|   //
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|   // If EAX or EBX returns 0, the XTAL ratio is not enumerated.
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|   //
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|   if ((RegEax == 0) || (RegEbx == 0)) {
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|     ASSERT (RegEax != 0);
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|     ASSERT (RegEbx != 0);
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|     return 0;
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|   }
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| 
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|   //
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|   // If ECX returns 0, the XTAL frequency is not enumerated.
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|   // And PcdCpuCoreCrystalClockFrequency defined should base on processor series.
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|   //
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|   if (RegEcx == 0) {
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|     CoreXtalFrequency = PcdGet64 (PcdCpuCoreCrystalClockFrequency);
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|   } else {
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|     CoreXtalFrequency = (UINT64)RegEcx;
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|   }
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| 
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|   //
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|   // Calculate TSC frequency = (ECX, Core Xtal Frequency) * EBX/EAX
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|   //
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|   TscFrequency = DivU64x32 (MultU64x32 (CoreXtalFrequency, RegEbx) + (UINT64)(RegEax >> 1), RegEax);
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| 
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|   return TscFrequency;
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| }
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| 
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| /**
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|   Stalls the CPU for at least the given number of ticks.
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| 
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|   Stalls the CPU for at least the given number of ticks. It's invoked by
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|   MicroSecondDelay() and NanoSecondDelay().
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| 
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|   @param  Delay     A period of time to delay in ticks.
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| 
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| **/
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| VOID
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| InternalCpuDelay (
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|   IN UINT64  Delay
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|   )
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| {
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|   UINT64  Ticks;
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| 
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|   //
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|   // The target timer count is calculated here
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|   //
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|   Ticks = AsmReadTsc () + Delay;
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| 
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|   //
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|   // Wait until time out
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|   // Timer wrap-arounds are NOT handled correctly by this function.
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|   // Thus, this function must be called within 10 years of reset since
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|   // Intel guarantees a minimum of 10 years before the TSC wraps.
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|   //
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|   while (AsmReadTsc () <= Ticks) {
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|     CpuPause ();
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|   }
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| }
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| 
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| /**
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|   Stalls the CPU for at least the given number of microseconds.
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| 
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|   Stalls the CPU for the number of microseconds specified by MicroSeconds.
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| 
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|   @param[in]  MicroSeconds  The minimum number of microseconds to delay.
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| 
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|   @return MicroSeconds
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| 
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| **/
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| UINTN
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| EFIAPI
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| MicroSecondDelay (
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|   IN UINTN  MicroSeconds
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|   )
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| {
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|   InternalCpuDelay (
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|     DivU64x32 (
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|       MultU64x64 (
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|         MicroSeconds,
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|         InternalGetPerformanceCounterFrequency ()
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|         ),
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|       1000000u
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|       )
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|     );
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| 
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|   return MicroSeconds;
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| }
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| 
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| /**
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|   Stalls the CPU for at least the given number of nanoseconds.
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| 
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|   Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
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| 
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|   @param  NanoSeconds The minimum number of nanoseconds to delay.
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| 
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|   @return NanoSeconds
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| 
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| **/
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| UINTN
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| EFIAPI
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| NanoSecondDelay (
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|   IN UINTN  NanoSeconds
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|   )
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| {
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|   InternalCpuDelay (
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|     DivU64x32 (
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|       MultU64x64 (
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|         NanoSeconds,
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|         InternalGetPerformanceCounterFrequency ()
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|         ),
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|       1000000000u
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|       )
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|     );
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| 
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|   return NanoSeconds;
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| }
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| 
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| /**
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|   Retrieves the current value of a 64-bit free running performance counter.
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| 
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|   Retrieves the current value of a 64-bit free running performance counter. The
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|   counter can either count up by 1 or count down by 1. If the physical
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|   performance counter counts by a larger increment, then the counter values
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|   must be translated. The properties of the counter can be retrieved from
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|   GetPerformanceCounterProperties().
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| 
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|   @return The current value of the free running performance counter.
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| 
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| **/
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| UINT64
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| EFIAPI
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| GetPerformanceCounter (
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|   VOID
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|   )
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| {
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|   return AsmReadTsc ();
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| }
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| 
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| /**
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|   Retrieves the 64-bit frequency in Hz and the range of performance counter
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|   values.
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| 
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|   If StartValue is not NULL, then the value that the performance counter starts
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|   with immediately after is it rolls over is returned in StartValue. If
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|   EndValue is not NULL, then the value that the performance counter end with
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|   immediately before it rolls over is returned in EndValue. The 64-bit
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|   frequency of the performance counter in Hz is always returned. If StartValue
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|   is less than EndValue, then the performance counter counts up. If StartValue
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|   is greater than EndValue, then the performance counter counts down. For
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|   example, a 64-bit free running counter that counts up would have a StartValue
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|   of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
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|   that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
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| 
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|   @param  StartValue  The value the performance counter starts with when it
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|                       rolls over.
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|   @param  EndValue    The value that the performance counter ends with before
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|                       it rolls over.
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| 
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|   @return The frequency in Hz.
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| 
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| **/
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| UINT64
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| EFIAPI
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| GetPerformanceCounterProperties (
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|   OUT UINT64  *StartValue   OPTIONAL,
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|   OUT UINT64  *EndValue     OPTIONAL
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|   )
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| {
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|   if (StartValue != NULL) {
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|     *StartValue = 0;
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|   }
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| 
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|   if (EndValue != NULL) {
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|     *EndValue = 0xffffffffffffffffULL;
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|   }
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| 
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|   return InternalGetPerformanceCounterFrequency ();
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| }
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| 
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| /**
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|   Converts elapsed ticks of performance counter to time in nanoseconds.
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| 
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|   This function converts the elapsed ticks of running performance counter to
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|   time value in unit of nanoseconds.
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| 
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|   @param  Ticks     The number of elapsed ticks of running performance counter.
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| 
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|   @return The elapsed time in nanoseconds.
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| 
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| **/
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| UINT64
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| EFIAPI
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| GetTimeInNanoSecond (
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|   IN UINT64  Ticks
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|   )
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| {
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|   UINT64  Frequency;
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|   UINT64  NanoSeconds;
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|   UINT64  Remainder;
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|   INTN    Shift;
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| 
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|   Frequency = GetPerformanceCounterProperties (NULL, NULL);
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| 
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|   //
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|   //          Ticks
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|   // Time = --------- x 1,000,000,000
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|   //        Frequency
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|   //
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|   NanoSeconds = MultU64x32 (DivU64x64Remainder (Ticks, Frequency, &Remainder), 1000000000u);
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| 
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|   //
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|   // Ensure (Remainder * 1,000,000,000) will not overflow 64-bit.
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|   // Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34,
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|   // i.e. highest bit set in Remainder should <= 33.
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|   //
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|   Shift        = MAX (0, HighBitSet64 (Remainder) - 33);
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|   Remainder    = RShiftU64 (Remainder, (UINTN)Shift);
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|   Frequency    = RShiftU64 (Frequency, (UINTN)Shift);
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|   NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);
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| 
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|   return NanoSeconds;
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| }
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