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In multiple root bridge platforms, different root bridges may share the same segment but occupy different range of buses, or may occupy different segments. The fix is to find the correct root bridge IO instance by comparing not only the segment but also the bus ranges. It tries to access the MMIO and IO in the following order: PciRootBridgeIo, CpuIo and direct IO. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19181 6f19259b-4bc3-4df7-8a09-765794883524