55f5af1871
The ARM asm implementation of InternalMathSwapBytes64 () does interesting things if bit 7 of operand r1 (upper 32 bits of the input value) is set. After the recursive swap, bit 7 ends up in the sign bit position, after which it is right shifted with sign extension, and or'ed with the upper half of the output value. This means SwapBytes64 (0x00000080_00000000) returns an incorrect value of 0xFFFFFFFF_80000000. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Ronald Cron <Ronald.Cron@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17077 6f19259b-4bc3-4df7-8a09-765794883524
269 lines
5.4 KiB
ArmAsm
Executable File
269 lines
5.4 KiB
ArmAsm
Executable File
#------------------------------------------------------------------------------
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#
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# Replacement for Math64.c that is coded to use older GCC intrinsics.
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# Doing this reduces the number of intrinsics that are required when
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# you port to a new version of gcc.
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#
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# Need to split this into multple files to size optimize the image.
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#
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# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.<BR>
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php.
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#------------------------------------------------------------------------------
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.text
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.align 2
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GCC_ASM_EXPORT(InternalMathLShiftU64)
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ASM_PFX(InternalMathLShiftU64):
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stmfd sp!, {r4, r5, r6}
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mov r6, r1
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rsb ip, r2, #32
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mov r4, r6, asl r2
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subs r1, r2, #32
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orr r4, r4, r0, lsr ip
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mov r3, r0, asl r2
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movpl r4, r0, asl r1
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mov r5, r0
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mov r0, r3
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mov r1, r4
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ldmfd sp!, {r4, r5, r6}
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bx lr
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.align 2
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GCC_ASM_EXPORT(InternalMathRShiftU64)
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ASM_PFX(InternalMathRShiftU64):
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stmfd sp!, {r4, r5, r6}
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mov r5, r0
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rsb ip, r2, #32
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mov r3, r5, lsr r2
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subs r0, r2, #32
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orr r3, r3, r1, asl ip
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mov r4, r1, lsr r2
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movpl r3, r1, lsr r0
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mov r6, r1
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mov r0, r3
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mov r1, r4
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ldmfd sp!, {r4, r5, r6}
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bx lr
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.align 2
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GCC_ASM_EXPORT(InternalMathARShiftU64)
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ASM_PFX(InternalMathARShiftU64):
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stmfd sp!, {r4, r5, r6}
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mov r5, r0
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rsb ip, r2, #32
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mov r3, r5, lsr r2
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subs r0, r2, #32
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orr r3, r3, r1, asl ip
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mov r4, r1, asr r2
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movpl r3, r1, asr r0
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mov r6, r1
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mov r0, r3
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mov r1, r4
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ldmfd sp!, {r4, r5, r6}
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bx lr
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.align 2
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GCC_ASM_EXPORT(InternalMathLRotU64)
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ASM_PFX(InternalMathLRotU64):
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stmfd sp!, {r4, r5, r6, r7, lr}
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add r7, sp, #12
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mov r6, r1
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rsb ip, r2, #32
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mov r4, r6, asl r2
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rsb lr, r2, #64
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subs r1, r2, #32
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orr r4, r4, r0, lsr ip
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mov r3, r0, asl r2
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movpl r4, r0, asl r1
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sub ip, r2, #32
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mov r5, r0
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mov r0, r0, lsr lr
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rsbs r2, r2, #32
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orr r0, r0, r6, asl ip
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mov r1, r6, lsr lr
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movpl r0, r6, lsr r2
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orr r1, r1, r4
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orr r0, r0, r3
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ldmfd sp!, {r4, r5, r6, r7, pc}
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.align 2
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GCC_ASM_EXPORT(InternalMathRRotU64)
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ASM_PFX(InternalMathRRotU64):
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stmfd sp!, {r4, r5, r6, r7, lr}
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add r7, sp, #12
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mov r5, r0
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rsb ip, r2, #32
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mov r3, r5, lsr r2
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rsb lr, r2, #64
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subs r0, r2, #32
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orr r3, r3, r1, asl ip
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mov r4, r1, lsr r2
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movpl r3, r1, lsr r0
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sub ip, r2, #32
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mov r6, r1
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mov r1, r1, asl lr
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rsbs r2, r2, #32
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orr r1, r1, r5, lsr ip
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mov r0, r5, asl lr
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movpl r1, r5, asl r2
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orr r0, r0, r3
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orr r1, r1, r4
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ldmfd sp!, {r4, r5, r6, r7, pc}
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.align 2
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GCC_ASM_EXPORT(InternalMathMultU64x32)
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ASM_PFX(InternalMathMultU64x32):
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stmfd sp!, {r7, lr}
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add r7, sp, #0
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mov r3, #0
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mov ip, r0
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mov lr, r1
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umull r0, r1, ip, r2
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mla r1, lr, r2, r1
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mla r1, ip, r3, r1
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ldmfd sp!, {r7, pc}
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.align 2
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GCC_ASM_EXPORT(InternalMathMultU64x64)
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ASM_PFX(InternalMathMultU64x64):
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stmfd sp!, {r7, lr}
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add r7, sp, #0
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mov ip, r0
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mov lr, r1
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umull r0, r1, ip, r2
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mla r1, lr, r2, r1
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mla r1, ip, r3, r1
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ldmfd sp!, {r7, pc}
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.align 2
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GCC_ASM_EXPORT(InternalMathDivU64x32)
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ASM_PFX(InternalMathDivU64x32):
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stmfd sp!, {r7, lr}
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add r7, sp, #0
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mov r3, #0
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bl ASM_PFX(__udivdi3)
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ldmfd sp!, {r7, pc}
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.align 2
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GCC_ASM_EXPORT(InternalMathModU64x32)
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ASM_PFX(InternalMathModU64x32):
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stmfd sp!, {r7, lr}
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add r7, sp, #0
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mov r3, #0
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bl ASM_PFX(__umoddi3)
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ldmfd sp!, {r7, pc}
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.align 2
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GCC_ASM_EXPORT(InternalMathDivRemU64x32)
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ASM_PFX(InternalMathDivRemU64x32):
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stmfd sp!, {r4, r5, r6, r7, lr}
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add r7, sp, #12
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stmfd sp!, {r10, r11}
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subs r6, r3, #0
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mov r10, r0
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mov r11, r1
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moveq r4, r2
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moveq r5, #0
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beq L22
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mov r4, r2
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mov r5, #0
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mov r3, #0
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bl ASM_PFX(__umoddi3)
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str r0, [r6, #0]
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L22:
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mov r0, r10
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mov r1, r11
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mov r2, r4
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mov r3, r5
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bl ASM_PFX(__udivdi3)
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ldmfd sp!, {r10, r11}
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ldmfd sp!, {r4, r5, r6, r7, pc}
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.align 2
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GCC_ASM_EXPORT(InternalMathDivRemU64x64)
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ASM_PFX(InternalMathDivRemU64x64):
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stmfd sp!, {r4, r5, r6, r7, lr}
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add r7, sp, #12
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stmfd sp!, {r10, r11}
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ldr r6, [sp, #28]
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mov r4, r0
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cmp r6, #0
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mov r5, r1
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mov r10, r2
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mov r11, r3
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beq L26
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bl ASM_PFX(__umoddi3)
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stmia r6, {r0-r1}
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L26:
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mov r0, r4
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mov r1, r5
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mov r2, r10
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mov r3, r11
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bl ASM_PFX(__udivdi3)
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ldmfd sp!, {r10, r11}
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ldmfd sp!, {r4, r5, r6, r7, pc}
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.align 2
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GCC_ASM_EXPORT(InternalMathDivRemS64x64)
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ASM_PFX(InternalMathDivRemS64x64):
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stmfd sp!, {r4, r5, r6, r7, lr}
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add r7, sp, #12
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stmfd sp!, {r10, r11}
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ldr r6, [sp, #28]
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mov r4, r0
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cmp r6, #0
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mov r5, r1
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mov r10, r2
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mov r11, r3
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beq L30
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bl ASM_PFX(__moddi3)
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stmia r6, {r0-r1}
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L30:
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mov r0, r4
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mov r1, r5
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mov r2, r10
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mov r3, r11
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bl ASM_PFX(__divdi3)
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ldmfd sp!, {r10, r11}
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ldmfd sp!, {r4, r5, r6, r7, pc}
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.align 2
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GCC_ASM_EXPORT(InternalMathSwapBytes64)
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ASM_PFX(InternalMathSwapBytes64):
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stmfd sp!, {r4, r5, r7, lr}
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mov r5, r1
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bl ASM_PFX(SwapBytes32)
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mov r4, r0
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mov r0, r5
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bl ASM_PFX(SwapBytes32)
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mov r1, r4
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ldmfd sp!, {r4, r5, r7, pc}
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ASM_FUNCTION_REMOVE_IF_UNREFERENCED |