a. Update PciBusDxe module, and move it from IntelFrameworkModulePkg to MdeModulePkg b. Move IncompatiblePciDeviceSupportDxe module from IntelFrameworkModulePkg to MdeModulePkg c. Update the related consumes in inf/dsc/fdf git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9347 6f19259b-4bc3-4df7-8a09-765794883524
		
			
				
	
	
		
			239 lines
		
	
	
		
			7.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			239 lines
		
	
	
		
			7.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /** @file
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|   PCI command register operations supporting functions declaration for PCI Bus module.
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| 
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| Copyright (c) 2006 - 2009, Intel Corporation
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| All rights reserved. This program and the accompanying materials
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| are licensed and made available under the terms and conditions of the BSD License
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| which accompanies this distribution.  The full text of the license may be found at
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| http://opensource.org/licenses/bsd-license.php
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| 
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| THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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| WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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| 
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| **/
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| 
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| 
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| #ifndef _EFI_PCI_COMMAND_H_
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| #define _EFI_PCI_COMMAND_H_
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| 
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| //
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| // The PCI Command register bits owned by PCI Bus driver.
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| //
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| // They should be cleared at the beginning. The other registers
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| // are owned by chipset, we should not touch them.
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| //
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| #define EFI_PCI_COMMAND_BITS_OWNED                          ( \
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|                 EFI_PCI_COMMAND_IO_SPACE                    | \
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|                 EFI_PCI_COMMAND_MEMORY_SPACE                | \
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|                 EFI_PCI_COMMAND_BUS_MASTER                  | \
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|                 EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE | \
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|                 EFI_PCI_COMMAND_VGA_PALETTE_SNOOP           | \
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|                 EFI_PCI_COMMAND_FAST_BACK_TO_BACK             \
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|                 )
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| 
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| //
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| // The PCI Bridge Control register bits owned by PCI Bus driver.
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| //
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| // They should be cleared at the beginning. The other registers
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| // are owned by chipset, we should not touch them.
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| //
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| #define EFI_PCI_BRIDGE_CONTROL_BITS_OWNED                   ( \
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|                 EFI_PCI_BRIDGE_CONTROL_ISA                  | \
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|                 EFI_PCI_BRIDGE_CONTROL_VGA                  | \
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|                 EFI_PCI_BRIDGE_CONTROL_VGA_16               | \
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|                 EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK      \
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|                 )
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| 
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| //
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| // The PCCard Bridge Control register bits owned by PCI Bus driver.
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| //
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| // They should be cleared at the beginning. The other registers
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| // are owned by chipset, we should not touch them.
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| //
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| #define EFI_PCCARD_BRIDGE_CONTROL_BITS_OWNED                ( \
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|                 EFI_PCI_BRIDGE_CONTROL_ISA                  | \
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|                 EFI_PCI_BRIDGE_CONTROL_VGA                  | \
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|                 EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK      \
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|                 )
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| 
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| 
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| #define EFI_GET_REGISTER      1
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| #define EFI_SET_REGISTER      2
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| #define EFI_ENABLE_REGISTER   3
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| #define EFI_DISABLE_REGISTER  4
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| 
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| /**
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|   Operate the PCI register via PciIo function interface.
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| 
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|   @param PciIoDevice    Pointer to instance of PCI_IO_DEVICE.
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|   @param Command        Operator command.
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|   @param Offset         The address within the PCI configuration space for the PCI controller.
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|   @param Operation      Type of Operation.
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|   @param PtrCommand     Return buffer holding old PCI command, if operation is not EFI_SET_REGISTER.
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| 
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|   @return Status of PciIo operation.
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| 
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| **/
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| EFI_STATUS
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| PciOperateRegister (
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|   IN  PCI_IO_DEVICE *PciIoDevice,
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|   IN  UINT16        Command,
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|   IN  UINT8         Offset,
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|   IN  UINT8         Operation,
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|   OUT UINT16        *PtrCommand
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|   );
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| 
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| /**
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|   Check the cpability supporting by given device.
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| 
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|   @param PciIoDevice   Pointer to instance of PCI_IO_DEVICE.
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| 
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|   @retval TRUE         Cpability supportted.
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|   @retval FALSE        Cpability not supportted.
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| 
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| **/
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| BOOLEAN
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| PciCapabilitySupport (
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|   IN PCI_IO_DEVICE  *PciIoDevice
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|   );
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| 
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| /**
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|   Locate capability register block per capability ID.
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| 
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|   @param PciIoDevice       A pointer to the PCI_IO_DEVICE.
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|   @param CapId             The capability ID.
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|   @param Offset            A pointer to the offset returned.
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|   @param NextRegBlock      A pointer to the next block returned.
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| 
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|   @retval EFI_SUCCESS      Successfuly located capability register block.
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|   @retval EFI_UNSUPPORTED  Pci device does not support capability.
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|   @retval EFI_NOT_FOUND    Pci device support but can not find register block.
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| 
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| **/
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| EFI_STATUS
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| LocateCapabilityRegBlock (
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|   IN PCI_IO_DEVICE  *PciIoDevice,
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|   IN UINT8          CapId,
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|   IN OUT UINT8      *Offset,
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|   OUT UINT8         *NextRegBlock OPTIONAL
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|   );
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| 
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| /**
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|   Locate PciExpress capability register block per capability ID.
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| 
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|   @param PciIoDevice       A pointer to the PCI_IO_DEVICE.
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|   @param CapId             The capability ID.
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|   @param Offset            A pointer to the offset returned.
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|   @param NextRegBlock      A pointer to the next block returned.
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| 
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|   @retval EFI_SUCCESS      Successfuly located capability register block.
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|   @retval EFI_UNSUPPORTED  Pci device does not support capability.
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|   @retval EFI_NOT_FOUND    Pci device support but can not find register block.
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| 
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| **/
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| EFI_STATUS
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| LocatePciExpressCapabilityRegBlock (
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|   IN     PCI_IO_DEVICE *PciIoDevice,
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|   IN     UINT16        CapId,
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|   IN OUT UINT32        *Offset,
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|      OUT UINT32        *NextRegBlock OPTIONAL
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|   );
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| 
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| /**
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|   Macro that reads command register.
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| 
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|   @param a[in]            Pointer to instance of PCI_IO_DEVICE.
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|   @param b[out]           Pointer to the 16-bit value read from command register.
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| 
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|   @return status of PciIo operation
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| 
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| **/
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| #define PCI_READ_COMMAND_REGISTER(a,b) \
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|         PciOperateRegister (a, 0, PCI_COMMAND_OFFSET, EFI_GET_REGISTER, b)
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| 
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| /**
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|   Macro that writes command register.
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| 
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|   @param a[in]            Pointer to instance of PCI_IO_DEVICE.
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|   @param b[in]            The 16-bit value written into command register.
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| 
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|   @return status of PciIo operation
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| 
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| **/
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| #define PCI_SET_COMMAND_REGISTER(a,b) \
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|         PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_SET_REGISTER, NULL)
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| 
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| /**
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|   Macro that enables command register.
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| 
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|   @param a[in]            Pointer to instance of PCI_IO_DEVICE.
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|   @param b[in]            The enabled value written into command register.
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| 
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|   @return status of PciIo operation
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| 
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| **/
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| #define PCI_ENABLE_COMMAND_REGISTER(a,b) \
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|         PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_ENABLE_REGISTER, NULL)
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| 
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| /**
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|   Macro that disalbes command register.
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| 
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|   @param a[in]            Pointer to instance of PCI_IO_DEVICE.
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|   @param b[in]            The disabled value written into command register.
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| 
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|   @return status of PciIo operation
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| 
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| **/
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| #define PCI_DISABLE_COMMAND_REGISTER(a,b) \
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|         PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_DISABLE_REGISTER, NULL)
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| 
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| /**
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|   Macro that reads PCI bridge control register.
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| 
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|   @param a[in]            Pointer to instance of PCI_IO_DEVICE.
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|   @param b[out]           The 16-bit value read from control register.
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| 
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|   @return status of PciIo operation
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| 
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| **/
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| #define PCI_READ_BRIDGE_CONTROL_REGISTER(a,b) \
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|         PciOperateRegister (a, 0, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_GET_REGISTER, b)
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| 
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| /**
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|   Macro that writes PCI bridge control register.
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| 
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|   @param a[in]            Pointer to instance of PCI_IO_DEVICE.
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|   @param b[in]            The 16-bit value written into control register.
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| 
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|   @return status of PciIo operation
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| 
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| **/
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| #define PCI_SET_BRIDGE_CONTROL_REGISTER(a,b) \
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|         PciOperateRegister (a, b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_SET_REGISTER, NULL)
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| 
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| /**
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|   Macro that enables PCI bridge control register.
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| 
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|   @param a[in]            Pointer to instance of PCI_IO_DEVICE.
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|   @param b[in]            The enabled value written into command register.
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| 
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|   @return status of PciIo operation
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| 
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| **/
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| #define PCI_ENABLE_BRIDGE_CONTROL_REGISTER(a,b) \
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|         PciOperateRegister (a, b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_ENABLE_REGISTER, NULL)
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| 
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| /**
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|  Macro that disalbes PCI bridge control register.
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| 
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|   @param a[in]            Pointer to instance of PCI_IO_DEVICE.
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|   @param b[in]            The disabled value written into command register.
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| 
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|   @return status of PciIo operation
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| 
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| **/
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| #define PCI_DISABLE_BRIDGE_CONTROL_REGISTER(a,b) \
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|         PciOperateRegister (a, b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_DISABLE_REGISTER, NULL)
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| 
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| #endif
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