0ee255f50a
Add the BTI instructions and the associated note to make the AArch64 asm objects compatible with BTI enforcement. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com> Reviewed-by: Oliver Smith-Denny <osd@smith-denny.com>
141 lines
4.2 KiB
ArmAsm
141 lines
4.2 KiB
ArmAsm
//
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// Copyright (c) 2014, ARM Limited
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// All rights Reserved.
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// SPDX-License-Identifier: BSD-2-Clause-Patent
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//
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// Assumptions:
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//
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// ARMv8-a, AArch64
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// Neon Available.
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//
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// Arguments and results.
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#define srcin x0
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#define cntin x1
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#define chrin w2
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#define result x0
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#define src x3
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#define tmp x4
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#define wtmp2 w5
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#define synd x6
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#define soff x9
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#define cntrem x10
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#define vrepchr v0
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#define vdata1 v1
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#define vdata2 v2
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#define vhas_chr1 v3
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#define vhas_chr2 v4
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#define vrepmask v5
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#define vend v6
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//
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// Core algorithm:
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//
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// For each 32-byte chunk we calculate a 64-bit syndrome value, with two bits
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// per byte. For each tuple, bit 0 is set if the relevant byte matched the
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// requested character and bit 1 is not used (faster than using a 32bit
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// syndrome). Since the bits in the syndrome reflect exactly the order in which
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// things occur in the original string, counting trailing zeros allows to
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// identify exactly which byte has matched.
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//
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ASM_GLOBAL ASM_PFX(InternalMemScanMem8)
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ASM_PFX(InternalMemScanMem8):
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AARCH64_BTI(c)
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// Do not dereference srcin if no bytes to compare.
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cbz cntin, .Lzero_length
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//
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// Magic constant 0x40100401 allows us to identify which lane matches
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// the requested byte.
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//
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mov wtmp2, #0x0401
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movk wtmp2, #0x4010, lsl #16
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dup vrepchr.16b, chrin
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// Work with aligned 32-byte chunks
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bic src, srcin, #31
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dup vrepmask.4s, wtmp2
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ands soff, srcin, #31
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and cntrem, cntin, #31
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b.eq .Lloop
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//
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// Input string is not 32-byte aligned. We calculate the syndrome
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// value for the aligned 32 bytes block containing the first bytes
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// and mask the irrelevant part.
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//
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ld1 {vdata1.16b, vdata2.16b}, [src], #32
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sub tmp, soff, #32
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adds cntin, cntin, tmp
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cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b
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cmeq vhas_chr2.16b, vdata2.16b, vrepchr.16b
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and vhas_chr1.16b, vhas_chr1.16b, vrepmask.16b
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and vhas_chr2.16b, vhas_chr2.16b, vrepmask.16b
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addp vend.16b, vhas_chr1.16b, vhas_chr2.16b // 256->128
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addp vend.16b, vend.16b, vend.16b // 128->64
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mov synd, vend.d[0]
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// Clear the soff*2 lower bits
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lsl tmp, soff, #1
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lsr synd, synd, tmp
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lsl synd, synd, tmp
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// The first block can also be the last
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b.ls .Lmasklast
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// Have we found something already?
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cbnz synd, .Ltail
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.Lloop:
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ld1 {vdata1.16b, vdata2.16b}, [src], #32
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subs cntin, cntin, #32
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cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b
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cmeq vhas_chr2.16b, vdata2.16b, vrepchr.16b
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// If we're out of data we finish regardless of the result
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b.ls .Lend
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// Use a fast check for the termination condition
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orr vend.16b, vhas_chr1.16b, vhas_chr2.16b
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addp vend.2d, vend.2d, vend.2d
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mov synd, vend.d[0]
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// We're not out of data, loop if we haven't found the character
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cbz synd, .Lloop
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.Lend:
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// Termination condition found, let's calculate the syndrome value
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and vhas_chr1.16b, vhas_chr1.16b, vrepmask.16b
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and vhas_chr2.16b, vhas_chr2.16b, vrepmask.16b
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addp vend.16b, vhas_chr1.16b, vhas_chr2.16b // 256->128
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addp vend.16b, vend.16b, vend.16b // 128->64
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mov synd, vend.d[0]
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// Only do the clear for the last possible block
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b.hi .Ltail
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.Lmasklast:
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// Clear the (32 - ((cntrem + soff) % 32)) * 2 upper bits
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add tmp, cntrem, soff
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and tmp, tmp, #31
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sub tmp, tmp, #32
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neg tmp, tmp, lsl #1
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lsl synd, synd, tmp
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lsr synd, synd, tmp
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.Ltail:
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// Count the trailing zeros using bit reversing
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rbit synd, synd
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// Compensate the last post-increment
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sub src, src, #32
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// Check that we have found a character
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cmp synd, #0
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// And count the leading zeros
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clz synd, synd
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// Compute the potential result
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add result, src, synd, lsr #1
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// Select result or NULL
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csel result, xzr, result, eq
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ret
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.Lzero_length:
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mov result, #0
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ret
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