0eb3de2edc
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
77 lines
3.5 KiB
Plaintext
77 lines
3.5 KiB
Plaintext
/** @file
|
|
This file describes the contents of the ACPI Fixed ACPI Description Table
|
|
(FADT). Some additional ACPI values are defined in Acpi1_0.h and Acpi2_0.h.
|
|
All changes to the FADT contents should be done in this file.
|
|
|
|
Copyright (c) 2013-2015 Intel Corporation.
|
|
|
|
SPDX-License-Identifier: BSD-2-Clause-Patent
|
|
|
|
**/
|
|
|
|
#include "Fadt.h"
|
|
|
|
EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE FADT = {
|
|
EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
|
|
sizeof (EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE),
|
|
EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION,
|
|
0, // to make sum of entire table == 0
|
|
EFI_ACPI_OEM_ID, // OEMID is a 6 bytes long field
|
|
EFI_ACPI_OEM_TABLE_ID, // OEM table identification(8 bytes long)
|
|
EFI_ACPI_OEM_REVISION, // OEM revision number
|
|
EFI_ACPI_CREATOR_ID, // ASL compiler vendor ID
|
|
EFI_ACPI_CREATOR_REVISION, // ASL compiler revision number
|
|
0, // Physical addesss of FACS
|
|
0, // Physical address of DSDT
|
|
INT_MODEL, // System Interrupt Model
|
|
RESERVED, // reserved
|
|
SCI_INT_VECTOR, // System vector of SCI interrupt
|
|
SMI_CMD_IO_PORT, // Port address of SMI command port
|
|
ACPI_ENABLE, // value to write to port smi_cmd to enable ACPI
|
|
ACPI_DISABLE, // value to write to port smi_cmd to disable ACPI
|
|
S4BIOS_REQ, // Value to write to SMI CMD port to enter the S4BIOS state
|
|
RESERVED, // reserved - must be zero
|
|
PM1a_EVT_BLK_ADDRESS, // Port address of Power Mgt 1a Event Reg Blk
|
|
PM1b_EVT_BLK_ADDRESS, // Port address of Power Mgt 1b Event Reg Blk
|
|
PM1a_CNT_BLK_ADDRESS, // Port address of Power Mgt 1a Ctrl Reg Blk
|
|
PM1b_CNT_BLK_ADDRESS, // Port address of Power Mgt 1b Ctrl Reg Blk
|
|
PM2_CNT_BLK_ADDRESS, // Port address of Power Mgt 2 Ctrl Reg Blk
|
|
PM_TMR_BLK_ADDRESS, // Port address of Power Mgt Timer Ctrl Reg Blk
|
|
GPE0_BLK_ADDRESS, // Port addr of General Purpose Event 0 Reg Blk
|
|
GPE1_BLK_ADDRESS, // Port addr of General Purpose Event 1 Reg Blk
|
|
PM1_EVT_LEN, // Byte Length of ports at pm1X_evt_blk
|
|
PM1_CNT_LEN, // Byte Length of ports at pm1X_cnt_blk
|
|
PM2_CNT_LEN, // Byte Length of ports at pm2_cnt_blk
|
|
PM_TM_LEN, // Byte Length of ports at pm_tm_blk
|
|
GPE0_BLK_LEN, // Byte Length of ports at gpe0_blk
|
|
GPE1_BLK_LEN, // Byte Length of ports at gpe1_blk
|
|
GPE1_BASE, // offset in gpe model where gpe1 events start
|
|
RESERVED, // reserved
|
|
P_LVL2_LAT, // worst case HW latency to enter/exit C2 state
|
|
P_LVL3_LAT, // worst case HW latency to enter/exit C3 state
|
|
FLUSH_SIZE, // Size of area read to flush caches
|
|
FLUSH_STRIDE, // Stride used in flushing caches
|
|
DUTY_OFFSET, // bit location of duty cycle field in p_cnt reg
|
|
DUTY_WIDTH, // bit width of duty cycle field in p_cnt reg
|
|
DAY_ALRM, // index to day-of-month alarm in RTC CMOS RAM
|
|
MON_ALRM, // index to month-of-year alarm in RTC CMOS RAM
|
|
CENTURY, // index to century in RTC CMOS RAM
|
|
RESERVED, // reserved
|
|
RESERVED, // reserved
|
|
RESERVED, // reserved
|
|
FLAG
|
|
};
|
|
|
|
VOID*
|
|
ReferenceAcpiTable (
|
|
VOID
|
|
)
|
|
|
|
{
|
|
//
|
|
// Reference the table being generated to prevent the optimizer from removing the
|
|
// data structure from the exeutable
|
|
//
|
|
return (VOID*)&FADT;
|
|
}
|