68246fa809
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@4212 6f19259b-4bc3-4df7-8a09-765794883524
166 lines
5.0 KiB
C
166 lines
5.0 KiB
C
/** @file
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Copyright (c) 2006 - 2007, Intel Corporation
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name:
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Ehci.h
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Abstract:
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Revision History
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**/
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#ifndef _EFI_EHCI_H_
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#define _EFI_EHCI_H_
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#include <PiDxe.h>
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#include <Protocol/Usb2HostController.h>
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#include <Protocol/PciIo.h>
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#include <Library/DebugLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/UefiDriverEntryPoint.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/UefiLib.h>
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#include <Library/BaseLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <IndustryStandard/Pci22.h>
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typedef struct _USB2_HC_DEV USB2_HC_DEV;
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#include "UsbHcMem.h"
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#include "EhciReg.h"
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#include "EhciUrb.h"
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#include "EhciSched.h"
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#include "EhciDebug.h"
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enum {
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EHC_1_MICROSECOND = 1,
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EHC_1_MILLISECOND = 1000 * EHC_1_MICROSECOND,
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EHC_1_SECOND = 1000 * EHC_1_MILLISECOND,
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//
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// EHCI register operation timeout, set by experience
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//
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EHC_RESET_TIMEOUT = 1 * EHC_1_SECOND,
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EHC_GENERIC_TIMEOUT = 10 * EHC_1_MILLISECOND,
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//
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// Wait for roothub port power stable, refers to Spec[EHCI1.0-2.3.9]
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//
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EHC_ROOT_PORT_RECOVERY_STALL = 20 * EHC_1_MILLISECOND,
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//
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// Sync and Async transfer polling interval, set by experience,
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// and the unit of Async is 100us, means 50ms as interval.
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//
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EHC_SYNC_POLL_INTERVAL = 20 * EHC_1_MICROSECOND,
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EHC_ASYNC_POLL_INTERVAL = 50 * 10000U,
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//
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// EHC raises TPL to TPL_NOTIFY to serialize all its operations
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// to protect shared data structures.
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//
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EHC_TPL = TPL_NOTIFY,
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USB2_HC_DEV_SIGNATURE = EFI_SIGNATURE_32 ('e', 'h', 'c', 'i')
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};
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//
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//Iterate through the doule linked list. NOT delete safe
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//
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#define EFI_LIST_FOR_EACH(Entry, ListHead) \
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for(Entry = (ListHead)->ForwardLink; Entry != (ListHead); Entry = Entry->ForwardLink)
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//
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//Iterate through the doule linked list. This is delete-safe.
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//Don't touch NextEntry
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//
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#define EFI_LIST_FOR_EACH_SAFE(Entry, NextEntry, ListHead) \
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for(Entry = (ListHead)->ForwardLink, NextEntry = Entry->ForwardLink;\
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Entry != (ListHead); Entry = NextEntry, NextEntry = Entry->ForwardLink)
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#define EFI_LIST_CONTAINER(Entry, Type, Field) _CR(Entry, Type, Field)
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#define EHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))
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#define EHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))
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#define EHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
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#define EHC_REG_BIT_IS_SET(Ehc, Offset, Bit) \
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(EHC_BIT_IS_SET(EhcReadOpReg ((Ehc), (Offset)), (Bit)))
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#define EHC_FROM_THIS(a) CR(a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)
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struct _USB2_HC_DEV {
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UINTN Signature;
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EFI_USB2_HC_PROTOCOL Usb2Hc;
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EFI_PCI_IO_PROTOCOL *PciIo;
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UINT64 OriginalPciAttributes;
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USBHC_MEM_POOL *MemPool;
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//
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// Schedule data shared between asynchronous and periodic
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// transfers:
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// ShortReadStop, as its name indicates, is used to terminate
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// the short read except the control transfer. EHCI follows
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// the alternative next QTD point when a short read happens.
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// For control transfer, even the short read happens, try the
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// status stage.
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//
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EHC_QTD *ShortReadStop;
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EFI_EVENT PollTimer;
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//
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// Asynchronous(bulk and control) transfer schedule data:
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// ReclaimHead is used as the head of the asynchronous transfer
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// list. It acts as the reclamation header.
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//
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EHC_QH *ReclaimHead;
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//
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// Peroidic (interrupt) transfer schedule data:
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//
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VOID *PeriodFrame; // Mapped as common buffer
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VOID *PeriodFrameHost;
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VOID *PeriodFrameMap;
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EHC_QH *PeriodOne;
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LIST_ENTRY AsyncIntTransfers;
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//
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// EHCI configuration data
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//
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UINT32 HcStructParams; // Cache of HC structure parameter, EHC_HCSPARAMS_OFFSET
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UINT32 HcCapParams; // Cache of HC capability parameter, HCCPARAMS
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UINT32 CapLen; // Capability length
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UINT32 High32bitAddr;
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//
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// Misc
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//
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EFI_UNICODE_STRING_TABLE *ControllerNameTable;
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};
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extern EFI_DRIVER_BINDING_PROTOCOL gEhciDriverBinding;
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extern EFI_COMPONENT_NAME_PROTOCOL gEhciComponentName;
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extern EFI_COMPONENT_NAME2_PROTOCOL gEhciComponentName2;
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#endif
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