890f11d428
https://bugzilla.tianocore.org/show_bug.cgi?id=260 The PiSmmCPuDxeSmm module requires the SMRR base address and length to be aligned. The memory initialization for Vlv2TbltDevicePkg produces an SMRAM base address that is on a 16MB boundary and an SMRAM length of 12MB. The SMRAM length is rounded up to 16MB. This is a workaround until the binary module that produces the gEfiSmmPeiSmramMemoryReserveGuid HOB is updated Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: David Wei <david.wei@intel.com> Cc: Mang Guo <mang.guo@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>