https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
		
			
				
	
	
		
			92 lines
		
	
	
		
			2.8 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			92 lines
		
	
	
		
			2.8 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
| #------------------------------------------------------------------------------
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| #
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| # Copyright (c) 2009-2013, ARM Ltd.  All rights reserved.
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| # SPDX-License-Identifier: BSD-2-Clause-Patent
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| #
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| #------------------------------------------------------------------------------
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| .text
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| .p2align 3
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| 
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| GCC_ASM_EXPORT(SetJump)
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| GCC_ASM_EXPORT(InternalLongJump)
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| 
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| #define GPR_LAYOUT                         \
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|         REG_PAIR (x19, x20,  0);           \
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|         REG_PAIR (x21, x22, 16);           \
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|         REG_PAIR (x23, x24, 32);           \
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|         REG_PAIR (x25, x26, 48);           \
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|         REG_PAIR (x27, x28, 64);           \
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|         REG_PAIR (x29, x30, 80);/*FP, LR*/ \
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|         REG_ONE  (x16,      96) /*IP0*/
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| 
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| #define FPR_LAYOUT                      \
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|         REG_PAIR ( d8,  d9, 112);       \
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|         REG_PAIR (d10, d11, 128);       \
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|         REG_PAIR (d12, d13, 144);       \
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|         REG_PAIR (d14, d15, 160);
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| 
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| #/**
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| #  Saves the current CPU context that can be restored with a call to LongJump() and returns 0.#
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| #
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| #  Saves the current CPU context in the buffer specified by JumpBuffer and returns 0.  The initial
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| #  call to SetJump() must always return 0.  Subsequent calls to LongJump() cause a non-zero
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| #  value to be returned by SetJump().
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| #
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| #  If JumpBuffer is NULL, then ASSERT().
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| #  For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
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| #
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| #  @param  JumpBuffer    A pointer to CPU context buffer.
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| #
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| #**/
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| #
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| #UINTN
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| #EFIAPI
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| #SetJump (
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| #  IN      BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer  // X0
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| #  );
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| #
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| ASM_PFX(SetJump):
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|         mov     x16, sp // use IP0 so save SP
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| #define REG_PAIR(REG1, REG2, OFFS)      stp REG1, REG2, [x0, OFFS]
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| #define REG_ONE(REG1, OFFS)             str REG1, [x0, OFFS]
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|         GPR_LAYOUT
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|         FPR_LAYOUT
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| #undef REG_PAIR
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| #undef REG_ONE
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|         mov     w0, #0
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|         ret
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| 
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| #/**
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| #  Restores the CPU context that was saved with SetJump().#
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| #
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| #  Restores the CPU context from the buffer specified by JumpBuffer.
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| #  This function never returns to the caller.
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| #  Instead is resumes execution based on the state of JumpBuffer.
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| #
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| #  @param  JumpBuffer    A pointer to CPU context buffer.
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| #  @param  Value         The value to return when the SetJump() context is restored.
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| #
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| #**/
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| #VOID
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| #EFIAPI
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| #InternalLongJump (
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| #  IN      BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer,  // X0
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| #  IN      UINTN                     Value         // X1
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| #  );
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| #
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| ASM_PFX(InternalLongJump):
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| #define REG_PAIR(REG1, REG2, OFFS)      ldp REG1, REG2, [x0, OFFS]
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| #define REG_ONE(REG1, OFFS)             ldr REG1, [x0, OFFS]
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|         GPR_LAYOUT
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|         FPR_LAYOUT
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| #undef REG_PAIR
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| #undef REG_ONE
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|         mov     sp, x16
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|         cmp     w1, #0
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|         mov     w0, #1
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|         csel    w0, w1, w0, ne
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|         // use br not ret, as ret is guaranteed to mispredict
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|         br      x30
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| 
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| ASM_FUNCTION_REMOVE_IF_UNREFERENCED
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