9344f09215
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
78 lines
2.2 KiB
NASM
78 lines
2.2 KiB
NASM
;------------------------------------------------------------------------------
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;
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; Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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; Module Name:
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;
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; LongJump.Asm
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;
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; Abstract:
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;
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; Implementation of _LongJump() on x64.
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;
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;------------------------------------------------------------------------------
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%include "Nasm.inc"
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DEFAULT REL
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SECTION .text
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extern ASM_PFX(PcdGet32 (PcdControlFlowEnforcementPropertyMask))
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;------------------------------------------------------------------------------
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; VOID
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; EFIAPI
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; InternalLongJump (
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; IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
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; IN UINTN Value
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; );
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;------------------------------------------------------------------------------
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global ASM_PFX(InternalLongJump)
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ASM_PFX(InternalLongJump):
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mov eax, [ASM_PFX(PcdGet32 (PcdControlFlowEnforcementPropertyMask))]
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test eax, eax
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jz CetDone
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mov rax, cr4
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bt eax, 23 ; check if CET is enabled
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jnc CetDone
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push rdx ; save rdx
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mov rdx, [rcx + 0xF8] ; rdx = target SSP
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READSSP_RAX
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sub rdx, rax ; rdx = delta
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mov rax, rdx ; rax = delta
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shr rax, 3 ; rax = delta/sizeof(UINT64)
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INCSSP_RAX
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pop rdx ; restore rdx
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CetDone:
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mov rbx, [rcx]
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mov rsp, [rcx + 8]
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mov rbp, [rcx + 0x10]
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mov rdi, [rcx + 0x18]
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mov rsi, [rcx + 0x20]
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mov r12, [rcx + 0x28]
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mov r13, [rcx + 0x30]
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mov r14, [rcx + 0x38]
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mov r15, [rcx + 0x40]
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; load non-volatile fp registers
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ldmxcsr [rcx + 0x50]
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movdqu xmm6, [rcx + 0x58]
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movdqu xmm7, [rcx + 0x68]
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movdqu xmm8, [rcx + 0x78]
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movdqu xmm9, [rcx + 0x88]
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movdqu xmm10, [rcx + 0x98]
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movdqu xmm11, [rcx + 0xA8]
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movdqu xmm12, [rcx + 0xB8]
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movdqu xmm13, [rcx + 0xC8]
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movdqu xmm14, [rcx + 0xD8]
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movdqu xmm15, [rcx + 0xE8]
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mov rax, rdx ; set return value
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jmp qword [rcx + 0x48]
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