9344f09215
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
82 lines
2.2 KiB
NASM
82 lines
2.2 KiB
NASM
;------------------------------------------------------------------------------
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;
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; Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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; Module Name:
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;
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; SetJump.Asm
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;
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; Abstract:
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;
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; Implementation of SetJump() on x64.
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;
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;------------------------------------------------------------------------------
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%include "Nasm.inc"
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DEFAULT REL
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SECTION .text
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extern ASM_PFX(InternalAssertJumpBuffer)
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extern ASM_PFX(PcdGet32 (PcdControlFlowEnforcementPropertyMask))
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;------------------------------------------------------------------------------
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; UINTN
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; EFIAPI
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; SetJump (
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; OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
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; );
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;------------------------------------------------------------------------------
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global ASM_PFX(SetJump)
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ASM_PFX(SetJump):
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push rcx
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add rsp, -0x20
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call ASM_PFX(InternalAssertJumpBuffer)
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add rsp, 0x20
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pop rcx
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pop rdx
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xor rax, rax
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mov [rcx + 0xF8], rax ; save 0 to SSP
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mov eax, [ASM_PFX(PcdGet32 (PcdControlFlowEnforcementPropertyMask))]
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test eax, eax
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jz CetDone
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mov rax, cr4
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bt eax, 23 ; check if CET is enabled
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jnc CetDone
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mov rax, 1
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INCSSP_RAX ; to read original SSP
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READSSP_RAX
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mov [rcx + 0xF8], rax ; save SSP
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CetDone:
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mov [rcx], rbx
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mov [rcx + 8], rsp
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mov [rcx + 0x10], rbp
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mov [rcx + 0x18], rdi
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mov [rcx + 0x20], rsi
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mov [rcx + 0x28], r12
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mov [rcx + 0x30], r13
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mov [rcx + 0x38], r14
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mov [rcx + 0x40], r15
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mov [rcx + 0x48], rdx
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; save non-volatile fp registers
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stmxcsr [rcx + 0x50]
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movdqu [rcx + 0x58], xmm6
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movdqu [rcx + 0x68], xmm7
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movdqu [rcx + 0x78], xmm8
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movdqu [rcx + 0x88], xmm9
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movdqu [rcx + 0x98], xmm10
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movdqu [rcx + 0xA8], xmm11
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movdqu [rcx + 0xB8], xmm12
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movdqu [rcx + 0xC8], xmm13
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movdqu [rcx + 0xD8], xmm14
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movdqu [rcx + 0xE8], xmm15
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xor rax, rax
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jmp rdx
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