cf1d454983
Add FSP2.0 support. This series of patch is to support FSP2.0 specification at https://firmware.intel.com/sites/default/files/FSP_EAS_v2.0_Draft%20External.pdf Some major updates include: 1) One FSP binary is separated to multiple components: FSP-T, FSP-M, FSP-S, and optional FSP-O. Each component has its own configuration data region. 2) All FSP-APIs use same UPD format - FSP_UPD_HEADER. 3) Add EnumInitPhaseEndOfFirmware notifyphase. 4) FSP1.1/FSP1.0 compatibility is NOT maintained. 5) We also add rename Fsp* to FspWrapper* in IntelFsp2WrapperPkg, to indicate that it is for FspWrapper only. IntelFspPkg and IntelFspWrapperPkg will be deprecated. The new Intel platform will follow FSP2.0 and use IntelFsp2Pkg and IntelFsp2WrapperPkg. The old platform can still use IntelFspPkg and IntelFspWrapperPkg for compatibility consideration. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Ravi P Rangarajan <ravi.p.rangarajan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> Reviewed-by: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>
85 lines
2.9 KiB
C
85 lines
2.9 KiB
C
/** @file
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Sample to provide SecPlatformInformation function.
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Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <PiPei.h>
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#include <Ppi/SecPlatformInformation.h>
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#include <Ppi/TopOfTemporaryRam.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/DebugLib.h>
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/**
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This interface conveys state information out of the Security (SEC) phase into PEI.
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@param[in] PeiServices Pointer to the PEI Services Table.
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@param[in,out] StructureSize Pointer to the variable describing size of the input buffer.
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@param[out] PlatformInformationRecord Pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.
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@retval EFI_SUCCESS The data was successfully returned.
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@retval EFI_BUFFER_TOO_SMALL The buffer was too small.
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**/
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EFI_STATUS
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EFIAPI
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SecPlatformInformation (
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN OUT UINT64 *StructureSize,
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OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
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)
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{
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UINT32 *Bist;
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UINT32 Size;
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UINT32 Count;
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UINT32 TopOfTemporaryRam;
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VOID *TopOfTemporaryRamPpi;
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EFI_STATUS Status;
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DEBUG ((DEBUG_INFO, "SecPlatformInformation\n"));
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Status = (*PeiServices)->LocatePpi (
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PeiServices,
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&gTopOfTemporaryRamPpiGuid,
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0,
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NULL,
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(VOID **) &TopOfTemporaryRamPpi
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);
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if (EFI_ERROR (Status)) {
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return EFI_NOT_FOUND;
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}
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//
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// The entries of BIST information, together with the number of them,
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// reside in the bottom of stack, left untouched by normal stack operation.
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// This routine copies the BIST information to the buffer pointed by
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// PlatformInformationRecord for output.
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//
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TopOfTemporaryRam = (UINT32)(UINTN)TopOfTemporaryRamPpi - sizeof (UINT32);
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TopOfTemporaryRam -= sizeof(UINT32) * 2;
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Count = *((UINT32 *)(UINTN) (TopOfTemporaryRam - sizeof (UINT32)));
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Size = Count * sizeof (IA32_HANDOFF_STATUS);
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if ((*StructureSize) < (UINT64) Size) {
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*StructureSize = Size;
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return EFI_BUFFER_TOO_SMALL;
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}
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*StructureSize = Size;
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Bist = (UINT32 *) (TopOfTemporaryRam - sizeof (UINT32) - Size);
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CopyMem (PlatformInformationRecord, Bist, Size);
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return EFI_SUCCESS;
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}
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