deb8a0615d
Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13777 6f19259b-4bc3-4df7-8a09-765794883524
222 lines
6.9 KiB
C
222 lines
6.9 KiB
C
/** @file
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Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef __LCDPLATFORMLIB_H
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#define __LCDPLATFORMLIB_H
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#include <Protocol/GraphicsOutput.h>
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#define LCD_VRAM_SIZE SIZE_8MB
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//
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// Modes definitions
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//
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#define VGA 0
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#define SVGA 1
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#define XGA 2
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#define SXGA 3
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#define WSXGA 4
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#define UXGA 5
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#define HD 6
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//
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// VGA Mode: 640 x 480
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//
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#define VGA_H_RES_PIXELS 640
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#define VGA_V_RES_PIXELS 480
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#define VGA_OSC_FREQUENCY 23750000 /* 0x016A6570 */
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#define VGA_H_SYNC ( 80 - 1)
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#define VGA_H_FRONT_PORCH ( 16 - 1)
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#define VGA_H_BACK_PORCH ( 64 - 1)
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#define VGA_V_SYNC ( 4 - 1)
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#define VGA_V_FRONT_PORCH ( 3 - 1)
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#define VGA_V_BACK_PORCH ( 13 - 1)
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//
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// SVGA Mode: 800 x 600
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//
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#define SVGA_H_RES_PIXELS 800
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#define SVGA_V_RES_PIXELS 600
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#define SVGA_OSC_FREQUENCY 38250000 /* 0x0247A610 */
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#define SVGA_H_SYNC ( 80 - 1)
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#define SVGA_H_FRONT_PORCH ( 32 - 1)
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#define SVGA_H_BACK_PORCH (112 - 1)
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#define SVGA_V_SYNC ( 4 - 1)
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#define SVGA_V_FRONT_PORCH ( 3 - 1)
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#define SVGA_V_BACK_PORCH ( 17 - 1)
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//
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// XGA Mode: 1024 x 768
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//
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#define XGA_H_RES_PIXELS 1024
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#define XGA_V_RES_PIXELS 768
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#define XGA_OSC_FREQUENCY 63500000 /* 0x03C8EEE0 */
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#define XGA_H_SYNC (104 - 1)
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#define XGA_H_FRONT_PORCH ( 48 - 1)
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#define XGA_H_BACK_PORCH (152 - 1)
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#define XGA_V_SYNC ( 4 - 1)
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#define XGA_V_FRONT_PORCH ( 3 - 1)
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#define XGA_V_BACK_PORCH ( 23 - 1)
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//
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// SXGA Mode: 1280 x 1024
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//
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#define SXGA_H_RES_PIXELS 1280
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#define SXGA_V_RES_PIXELS 1024
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#define SXGA_OSC_FREQUENCY 109000000 /* 0x067F3540 */
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#define SXGA_H_SYNC (136 - 1)
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#define SXGA_H_FRONT_PORCH ( 80 - 1)
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#define SXGA_H_BACK_PORCH (216 - 1)
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#define SXGA_V_SYNC ( 7 - 1)
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#define SXGA_V_FRONT_PORCH ( 3 - 1)
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#define SXGA_V_BACK_PORCH ( 29 - 1)
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//
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// WSXGA+ Mode: 1680 x 1050
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//
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#define WSXGA_H_RES_PIXELS 1680
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#define WSXGA_V_RES_PIXELS 1050
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#define WSXGA_OSC_FREQUENCY 147000000 /* 0x08C30AC0 */
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#define WSXGA_H_SYNC (170 - 1)
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#define WSXGA_H_FRONT_PORCH (104 - 1)
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#define WSXGA_H_BACK_PORCH (274 - 1)
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#define WSXGA_V_SYNC ( 5 - 1)
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#define WSXGA_V_FRONT_PORCH ( 4 - 1)
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#define WSXGA_V_BACK_PORCH ( 41 - 1)
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//
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// UXGA Mode: 1600 x 1200
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//
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#define UXGA_H_RES_PIXELS 1600
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#define UXGA_V_RES_PIXELS 1200
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#define UXGA_OSC_FREQUENCY 161000000 /* 0x0998AA40 */
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#define UXGA_H_SYNC (168 - 1)
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#define UXGA_H_FRONT_PORCH (112 - 1)
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#define UXGA_H_BACK_PORCH (280 - 1)
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#define UXGA_V_SYNC ( 4 - 1)
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#define UXGA_V_FRONT_PORCH ( 3 - 1)
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#define UXGA_V_BACK_PORCH ( 38 - 1)
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//
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// HD Mode: 1920 x 1080
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//
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#define HD_H_RES_PIXELS 1920
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#define HD_V_RES_PIXELS 1080
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#define HD_OSC_FREQUENCY 165000000 /* 0x09D5B340 */
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#define HD_H_SYNC ( 79 - 1)
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#define HD_H_FRONT_PORCH (128 - 1)
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#define HD_H_BACK_PORCH (328 - 1)
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#define HD_V_SYNC ( 5 - 1)
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#define HD_V_FRONT_PORCH ( 3 - 1)
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#define HD_V_BACK_PORCH ( 32 - 1)
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//
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// Colour Masks
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//
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#define LCD_24BPP_RED_MASK 0x00FF0000
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#define LCD_24BPP_GREEN_MASK 0x0000FF00
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#define LCD_24BPP_BLUE_MASK 0x000000FF
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#define LCD_24BPP_RESERVED_MASK 0xFF000000
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#define LCD_16BPP_555_RED_MASK 0x00007C00
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#define LCD_16BPP_555_GREEN_MASK 0x000003E0
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#define LCD_16BPP_555_BLUE_MASK 0x0000001F
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#define LCD_16BPP_555_RESERVED_MASK 0x00000000
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#define LCD_16BPP_565_RED_MASK 0x0000F800
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#define LCD_16BPP_565_GREEN_MASK 0x000007E0
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#define LCD_16BPP_565_BLUE_MASK 0x0000001F
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#define LCD_16BPP_565_RESERVED_MASK 0x00008000
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#define LCD_12BPP_444_RED_MASK 0x00000F00
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#define LCD_12BPP_444_GREEN_MASK 0x000000F0
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#define LCD_12BPP_444_BLUE_MASK 0x0000000F
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#define LCD_12BPP_444_RESERVED_MASK 0x0000F000
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// The enumeration indexes maps the PL111 LcdBpp values used in the LCD Control Register
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typedef enum {
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LCD_BITS_PER_PIXEL_1 = 0,
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LCD_BITS_PER_PIXEL_2,
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LCD_BITS_PER_PIXEL_4,
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LCD_BITS_PER_PIXEL_8,
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LCD_BITS_PER_PIXEL_16_555,
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LCD_BITS_PER_PIXEL_24,
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LCD_BITS_PER_PIXEL_16_565,
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LCD_BITS_PER_PIXEL_12_444
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} LCD_BPP;
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EFI_STATUS
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LcdPlatformInitializeDisplay (
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IN EFI_HANDLE Handle
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);
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EFI_STATUS
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LcdPlatformGetVram (
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OUT EFI_PHYSICAL_ADDRESS* VramBaseAddress,
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OUT UINTN* VramSize
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);
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UINT32
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LcdPlatformGetMaxMode (
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VOID
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);
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EFI_STATUS
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LcdPlatformSetMode (
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IN UINT32 ModeNumber
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);
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EFI_STATUS
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LcdPlatformQueryMode (
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IN UINT32 ModeNumber,
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OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info
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);
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EFI_STATUS
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LcdPlatformGetTimings (
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IN UINT32 ModeNumber,
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OUT UINT32* HRes,
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OUT UINT32* HSync,
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OUT UINT32* HBackPorch,
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OUT UINT32* HFrontPorch,
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OUT UINT32* VRes,
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OUT UINT32* VSync,
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OUT UINT32* VBackPorch,
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OUT UINT32* VFrontPorch
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);
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EFI_STATUS
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LcdPlatformGetBpp (
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IN UINT32 ModeNumber,
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OUT LCD_BPP* Bpp
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);
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#endif
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