EFI MmAccess and MmControl PPIs are defined in the PI 1.5 specification. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Ray Ni <ray.ni@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2023 Signed-off-by: Marc W Chen <marc.w.chen@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
		
			
				
	
	
		
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			91 lines
		
	
	
		
			3.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/** @file
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  EFI MM Control PPI definition.
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  This PPI is used initiate synchronous MMI activations. This PPI could be published by a processor
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  driver to abstract the MMI IPI or a driver which abstracts the ASIC that is supporting the APM port.
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  Because of the possibility of performing MMI IPI transactions, the ability to generate this event
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  from a platform chipset agent is an optional capability for both IA-32 and x64-based systems.
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  Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
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  SPDX-License-Identifier: BSD-2-Clause-Patent
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  @par Revision Reference:
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  This PPI is introduced in PI Version 1.5.
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**/
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#ifndef _MM_CONTROL_PPI_H_
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#define _MM_CONTROL_PPI_H_
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#define EFI_PEI_MM_CONTROL_PPI_GUID \
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  { 0x61c68702, 0x4d7e, 0x4f43, 0x8d, 0xef, 0xa7, 0x43, 0x5, 0xce, 0x74, 0xc5 }
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typedef struct _EFI_PEI_MM_CONTROL_PPI  EFI_PEI_MM_CONTROL_PPI;
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/**
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  Invokes PPI activation from the PI PEI environment.
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  @param  PeiServices           An indirect pointer to the PEI Services Table published by the PEI Foundation.
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  @param  This                  The PEI_MM_CONTROL_PPI instance.
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  @param  ArgumentBuffer        The value passed to the MMI handler. This value corresponds to the
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                                SwMmiInputValue in the RegisterContext parameter for the Register()
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                                function in the EFI_MM_SW_DISPATCH_PROTOCOL and in the Context parameter
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                                in the call to the DispatchFunction
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  @param  ArgumentBufferSize    The size of the data passed in ArgumentBuffer or NULL if ArgumentBuffer is NULL.
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  @param  Periodic              An optional mechanism to periodically repeat activation.
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  @param  ActivationInterval    An optional parameter to repeat at this period one
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                                time or, if the Periodic Boolean is set, periodically.
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  @retval EFI_SUCCESS           The MMI has been engendered.
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  @retval EFI_DEVICE_ERROR      The timing is unsupported.
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  @retval EFI_INVALID_PARAMETER The activation period is unsupported.
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  @retval EFI_NOT_STARTED       The MM base service has not been initialized.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PEI_MM_ACTIVATE) (
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  IN EFI_PEI_SERVICES                                **PeiServices,
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  IN EFI_PEI_MM_CONTROL_PPI                          * This,
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  IN OUT INT8                                        *ArgumentBuffer OPTIONAL,
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  IN OUT UINTN                                       *ArgumentBufferSize OPTIONAL,
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  IN BOOLEAN                                         Periodic OPTIONAL,
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  IN UINTN                                           ActivationInterval OPTIONAL
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  );
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/**
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  Clears any system state that was created in response to the Trigger() call.
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  @param  PeiServices           General purpose services available to every PEIM.
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  @param  This                  The PEI_MM_CONTROL_PPI instance.
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  @param  Periodic              Optional parameter to repeat at this period one
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                                time or, if the Periodic Boolean is set, periodically.
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  @retval EFI_SUCCESS           The MMI has been engendered.
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  @retval EFI_DEVICE_ERROR      The source could not be cleared.
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  @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *PEI_MM_DEACTIVATE) (
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  IN EFI_PEI_SERVICES                      **PeiServices,
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  IN EFI_PEI_MM_CONTROL_PPI                * This,
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  IN BOOLEAN                               Periodic OPTIONAL
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  );
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///
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///  The EFI_PEI_MM_CONTROL_PPI is produced by a PEIM. It provides an abstraction of the
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///  platform hardware that generates an MMI. There are often I/O ports that, when accessed, will
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///  generate the MMI. Also, the hardware optionally supports the periodic generation of these signals.
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///
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struct _PEI_MM_CONTROL_PPI {
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  PEI_MM_ACTIVATE    Trigger;
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  PEI_MM_DEACTIVATE  Clear;
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};
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extern EFI_GUID gEfiPeiMmControlPpiGuid;
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#endif
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