0a6f48249a
1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
427 lines
13 KiB
C
427 lines
13 KiB
C
/** @file
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Call into 16-bit BIOS code, Use AsmThunk16 function of BaseLib.
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions
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of the BSD License which accompanies this distribution. The
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full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "LegacyBiosInterface.h"
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THUNK_CONTEXT mThunkContext;
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/**
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Sets the counter value for Timer #0 in a legacy 8254 timer.
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@param Count - The 16-bit counter value to program into Timer #0 of the legacy 8254 timer.
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**/
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VOID
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SetPitCount (
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IN UINT16 Count
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)
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{
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IoWrite8 (TIMER_CONTROL_PORT, TIMER0_CONTROL_WORD);
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IoWrite8 (TIMER0_COUNT_PORT, (UINT8) (Count & 0xFF));
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IoWrite8 (TIMER0_COUNT_PORT, (UINT8) ((Count>>8) & 0xFF));
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}
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/**
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Thunk to 16-bit real mode and execute a software interrupt with a vector
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of BiosInt. Regs will contain the 16-bit register context on entry and
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exit.
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@param This Protocol instance pointer.
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@param BiosInt Processor interrupt vector to invoke
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@param Regs Register contexted passed into (and returned) from thunk to
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16-bit mode
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@retval FALSE Thunk completed, and there were no BIOS errors in the target code.
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See Regs for status.
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@retval TRUE There was a BIOS erro in the target code.
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**/
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BOOLEAN
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EFIAPI
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LegacyBiosInt86 (
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IN EFI_LEGACY_BIOS_PROTOCOL *This,
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IN UINT8 BiosInt,
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IN EFI_IA32_REGISTER_SET *Regs
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)
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{
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UINT16 Segment;
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UINT16 Offset;
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Regs->X.Flags.Reserved1 = 1;
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Regs->X.Flags.Reserved2 = 0;
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Regs->X.Flags.Reserved3 = 0;
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Regs->X.Flags.Reserved4 = 0;
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Regs->X.Flags.IOPL = 3;
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Regs->X.Flags.NT = 0;
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Regs->X.Flags.IF = 0;
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Regs->X.Flags.TF = 0;
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Regs->X.Flags.CF = 0;
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//
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// The base address of legacy interrupt vector table is 0.
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// We use this base address to get the legacy interrupt handler.
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//
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ACCESS_PAGE0_CODE (
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Segment = (UINT16)(((UINT32 *)0)[BiosInt] >> 16);
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Offset = (UINT16)((UINT32 *)0)[BiosInt];
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);
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return InternalLegacyBiosFarCall (
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This,
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Segment,
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Offset,
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Regs,
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&Regs->X.Flags,
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sizeof (Regs->X.Flags)
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);
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}
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/**
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Thunk to 16-bit real mode and call Segment:Offset. Regs will contain the
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16-bit register context on entry and exit. Arguments can be passed on
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the Stack argument
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@param This Protocol instance pointer.
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@param Segment Segemnt of 16-bit mode call
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@param Offset Offset of 16-bit mdoe call
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@param Regs Register contexted passed into (and returned) from
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thunk to 16-bit mode
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@param Stack Caller allocated stack used to pass arguments
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@param StackSize Size of Stack in bytes
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@retval FALSE Thunk completed, and there were no BIOS errors in
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the target code. See Regs for status.
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@retval TRUE There was a BIOS erro in the target code.
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**/
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BOOLEAN
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EFIAPI
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LegacyBiosFarCall86 (
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IN EFI_LEGACY_BIOS_PROTOCOL *This,
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IN UINT16 Segment,
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IN UINT16 Offset,
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IN EFI_IA32_REGISTER_SET *Regs,
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IN VOID *Stack,
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IN UINTN StackSize
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)
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{
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Regs->X.Flags.Reserved1 = 1;
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Regs->X.Flags.Reserved2 = 0;
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Regs->X.Flags.Reserved3 = 0;
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Regs->X.Flags.Reserved4 = 0;
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Regs->X.Flags.IOPL = 3;
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Regs->X.Flags.NT = 0;
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Regs->X.Flags.IF = 1;
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Regs->X.Flags.TF = 0;
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Regs->X.Flags.CF = 0;
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return InternalLegacyBiosFarCall (This, Segment, Offset, Regs, Stack, StackSize);
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}
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/**
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Provide NULL interrupt handler which is used to check
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if there is more than one HW interrupt registers with the CPU AP.
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@param InterruptType - The type of interrupt that occured
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@param SystemContext - A pointer to the system context when the interrupt occured
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**/
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VOID
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EFIAPI
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LegacyBiosNullInterruptHandler (
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IN EFI_EXCEPTION_TYPE InterruptType,
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IN EFI_SYSTEM_CONTEXT SystemContext
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)
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{
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}
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/**
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Thunk to 16-bit real mode and call Segment:Offset. Regs will contain the
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16-bit register context on entry and exit. Arguments can be passed on
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the Stack argument
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@param This Protocol instance pointer.
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@param Segment Segemnt of 16-bit mode call
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@param Offset Offset of 16-bit mdoe call
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@param Regs Register contexted passed into (and returned) from thunk to
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16-bit mode
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@param Stack Caller allocated stack used to pass arguments
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@param StackSize Size of Stack in bytes
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@retval FALSE Thunk completed, and there were no BIOS errors in the target code.
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See Regs for status.
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@retval TRUE There was a BIOS erro in the target code.
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**/
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BOOLEAN
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EFIAPI
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InternalLegacyBiosFarCall (
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IN EFI_LEGACY_BIOS_PROTOCOL *This,
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IN UINT16 Segment,
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IN UINT16 Offset,
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IN EFI_IA32_REGISTER_SET *Regs,
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IN VOID *Stack,
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IN UINTN StackSize
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)
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{
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UINTN Status;
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LEGACY_BIOS_INSTANCE *Private;
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UINT16 *Stack16;
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EFI_TPL OriginalTpl;
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IA32_REGISTER_SET ThunkRegSet;
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BOOLEAN InterruptState;
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UINT64 TimerPeriod;
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Private = LEGACY_BIOS_INSTANCE_FROM_THIS (This);
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ZeroMem (&ThunkRegSet, sizeof (ThunkRegSet));
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ThunkRegSet.X.DI = Regs->X.DI;
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ThunkRegSet.X.SI = Regs->X.SI;
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ThunkRegSet.X.BP = Regs->X.BP;
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ThunkRegSet.X.BX = Regs->X.BX;
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ThunkRegSet.X.DX = Regs->X.DX;
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//
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// Sometimes, ECX is used to pass in 32 bit data. For example, INT 1Ah, AX = B10Dh is
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// "PCI BIOS v2.0c + Write Configuration DWORD" and ECX has the dword to write.
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//
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ThunkRegSet.E.ECX = Regs->E.ECX;
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ThunkRegSet.X.AX = Regs->X.AX;
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ThunkRegSet.E.DS = Regs->X.DS;
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ThunkRegSet.E.ES = Regs->X.ES;
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CopyMem (&(ThunkRegSet.E.EFLAGS.UintN), &(Regs->X.Flags), sizeof (Regs->X.Flags));
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//
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// Clear the error flag; thunk code may set it. Stack16 should be the high address
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// Make Statk16 address the low 16 bit must be not zero.
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//
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Stack16 = (UINT16 *)((UINT8 *) mThunkContext.RealModeBuffer + mThunkContext.RealModeBufferSize - sizeof (UINT16));
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//
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// Save current rate of DXE Timer
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//
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Private->Timer->GetTimerPeriod (Private->Timer, &TimerPeriod);
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//
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// Disable DXE Timer while executing in real mode
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//
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Private->Timer->SetTimerPeriod (Private->Timer, 0);
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//
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// Save and disable interrupt of debug timer
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//
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InterruptState = SaveAndSetDebugTimerInterrupt (FALSE);
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//
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// The call to Legacy16 is a critical section to EFI
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//
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OriginalTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
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//
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// Check to see if there is more than one HW interrupt registers with the CPU AP.
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// If there is, then ASSERT() since that is not compatible with the CSM because
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// interupts other than the Timer interrupt that was disabled above can not be
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// handled properly from real mode.
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//
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DEBUG_CODE (
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UINTN Vector;
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UINTN Count;
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for (Vector = 0x20, Count = 0; Vector < 0x100; Vector++) {
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Status = Private->Cpu->RegisterInterruptHandler (Private->Cpu, Vector, LegacyBiosNullInterruptHandler);
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if (Status == EFI_ALREADY_STARTED) {
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Count++;
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}
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if (Status == EFI_SUCCESS) {
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Private->Cpu->RegisterInterruptHandler (Private->Cpu, Vector, NULL);
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}
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}
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if (Count >= 2) {
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DEBUG ((EFI_D_ERROR, "ERROR: More than one HW interrupt active with CSM enabled\n"));
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}
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ASSERT (Count < 2);
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);
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//
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// If the Timer AP has enabled the 8254 timer IRQ and the current 8254 timer
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// period is less than the CSM required rate of 54.9254, then force the 8254
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// PIT counter to 0, which is the CSM required rate of 54.9254 ms
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//
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if (Private->TimerUses8254 && TimerPeriod < 549254) {
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SetPitCount (0);
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}
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if (Stack != NULL && StackSize != 0) {
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//
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// Copy Stack to low memory stack
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//
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Stack16 -= StackSize / sizeof (UINT16);
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CopyMem (Stack16, Stack, StackSize);
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}
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ThunkRegSet.E.SS = (UINT16) (((UINTN) Stack16 >> 16) << 12);
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ThunkRegSet.E.ESP = (UINT16) (UINTN) Stack16;
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ThunkRegSet.E.CS = Segment;
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ThunkRegSet.E.Eip = Offset;
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mThunkContext.RealModeState = &ThunkRegSet;
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//
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// Set Legacy16 state. 0x08, 0x70 is legacy 8259 vector bases.
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//
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Status = Private->Legacy8259->SetMode (Private->Legacy8259, Efi8259LegacyMode, NULL, NULL);
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ASSERT_EFI_ERROR (Status);
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AsmThunk16 (&mThunkContext);
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if (Stack != NULL && StackSize != 0) {
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//
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// Copy low memory stack to Stack
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//
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CopyMem (Stack, Stack16, StackSize);
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}
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//
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// Restore protected mode interrupt state
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//
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Status = Private->Legacy8259->SetMode (Private->Legacy8259, Efi8259ProtectedMode, NULL, NULL);
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ASSERT_EFI_ERROR (Status);
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mThunkContext.RealModeState = NULL;
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//
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// Enable and restore rate of DXE Timer
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//
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Private->Timer->SetTimerPeriod (Private->Timer, TimerPeriod);
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//
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// End critical section
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//
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gBS->RestoreTPL (OriginalTpl);
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//
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// OPROM may allocate EBDA range by itself and change EBDA base and EBDA size.
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// Get the current EBDA base address, and compared with pre-allocate minimum
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// EBDA base address, if the current EBDA base address is smaller, it indicates
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// PcdEbdaReservedMemorySize should be adjusted to larger for more OPROMs.
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//
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DEBUG_CODE (
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{
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UINTN EbdaBaseAddress;
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UINTN ReservedEbdaBaseAddress;
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ACCESS_PAGE0_CODE (
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EbdaBaseAddress = (*(UINT16 *) (UINTN) 0x40E) << 4;
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ReservedEbdaBaseAddress = CONVENTIONAL_MEMORY_TOP
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- PcdGet32 (PcdEbdaReservedMemorySize);
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ASSERT (ReservedEbdaBaseAddress <= EbdaBaseAddress);
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);
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}
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);
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//
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// Restore interrupt of debug timer
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//
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SaveAndSetDebugTimerInterrupt (InterruptState);
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Regs->E.EDI = ThunkRegSet.E.EDI;
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Regs->E.ESI = ThunkRegSet.E.ESI;
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Regs->E.EBP = ThunkRegSet.E.EBP;
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Regs->E.EBX = ThunkRegSet.E.EBX;
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Regs->E.EDX = ThunkRegSet.E.EDX;
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Regs->E.ECX = ThunkRegSet.E.ECX;
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Regs->E.EAX = ThunkRegSet.E.EAX;
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Regs->X.SS = ThunkRegSet.E.SS;
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Regs->X.CS = ThunkRegSet.E.CS;
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Regs->X.DS = ThunkRegSet.E.DS;
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Regs->X.ES = ThunkRegSet.E.ES;
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CopyMem (&(Regs->X.Flags), &(ThunkRegSet.E.EFLAGS.UintN), sizeof (Regs->X.Flags));
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return (BOOLEAN) (Regs->X.Flags.CF == 1);
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}
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/**
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Allocate memory < 1 MB and copy the thunker code into low memory. Se up
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all the descriptors.
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@param Private Private context for Legacy BIOS
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@retval EFI_SUCCESS Should only pass.
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**/
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EFI_STATUS
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LegacyBiosInitializeThunk (
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IN LEGACY_BIOS_INSTANCE *Private
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)
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{
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EFI_STATUS Status;
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EFI_PHYSICAL_ADDRESS MemoryAddress;
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UINT8 TimerVector;
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MemoryAddress = (EFI_PHYSICAL_ADDRESS) (UINTN) Private->IntThunk;
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mThunkContext.RealModeBuffer = (VOID *) (UINTN) (MemoryAddress + ((sizeof (LOW_MEMORY_THUNK) / EFI_PAGE_SIZE) + 1) * EFI_PAGE_SIZE);
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mThunkContext.RealModeBufferSize = EFI_PAGE_SIZE;
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mThunkContext.ThunkAttributes = THUNK_ATTRIBUTE_BIG_REAL_MODE | THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15;
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AsmPrepareThunk16 (&mThunkContext);
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//
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// Get the interrupt vector number corresponding to IRQ0 from the 8259 driver
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//
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TimerVector = 0;
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Status = Private->Legacy8259->GetVector (Private->Legacy8259, Efi8259Irq0, &TimerVector);
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ASSERT_EFI_ERROR (Status);
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//
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// Check to see if the Timer AP has hooked the IRQ0 from the 8254 PIT
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//
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Status = Private->Cpu->RegisterInterruptHandler (
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Private->Cpu,
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TimerVector,
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LegacyBiosNullInterruptHandler
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);
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if (Status == EFI_SUCCESS) {
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//
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// If the Timer AP has not enabled the 8254 timer IRQ, then force the 8254 PIT
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// counter to 0, which is the CSM required rate of 54.9254 ms
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//
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Private->Cpu->RegisterInterruptHandler (
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Private->Cpu,
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TimerVector,
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NULL
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);
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SetPitCount (0);
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//
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// Save status that the Timer AP is not using the 8254 PIT
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//
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Private->TimerUses8254 = FALSE;
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} else if (Status == EFI_ALREADY_STARTED) {
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//
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// Save status that the Timer AP is using the 8254 PIT
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//
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Private->TimerUses8254 = TRUE;
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} else {
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//
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// Unexpected status from CPU AP RegisterInterruptHandler()
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//
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ASSERT (FALSE);
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}
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return EFI_SUCCESS;
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}
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