13136cc311
Parse the Pmu interrupts if a pmu compatible node is present, and populate the MADT GicC structure accordingly. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
906 lines
27 KiB
C
906 lines
27 KiB
C
/** @file
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Arm Gic cpu parser.
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Copyright (c) 2021 - 2022, Arm Limited. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@par Reference(s):
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- linux/Documentation/devicetree/bindings/arm/cpus.yaml
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- linux/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
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- linux/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
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- linux/Documentation/devicetree/bindings/arm/pmu.yaml
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**/
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#include "FdtHwInfoParser.h"
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#include "CmObjectDescUtility.h"
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#include "Gic/ArmGicCParser.h"
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#include "Gic/ArmGicDispatcher.h"
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/** List of "compatible" property values for CPU nodes.
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Any other "compatible" value is not supported by this module.
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*/
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STATIC CONST COMPATIBILITY_STR CpuCompatibleStr[] = {
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{ "arm,arm-v7" },
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{ "arm,arm-v8" },
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{ "arm,cortex-a15" },
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{ "arm,cortex-a7" },
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{ "arm,cortex-a57" }
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};
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/** COMPATIBILITY_INFO structure for CPU nodes.
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*/
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STATIC CONST COMPATIBILITY_INFO CpuCompatibleInfo = {
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ARRAY_SIZE (CpuCompatibleStr),
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CpuCompatibleStr
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};
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/** Pmu compatible strings.
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Any other "compatible" value is not supported by this module.
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*/
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STATIC CONST COMPATIBILITY_STR PmuCompatibleStr[] = {
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{ "arm,armv8-pmuv3" }
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};
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/** COMPATIBILITY_INFO structure for the PmuCompatibleStr.
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*/
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CONST COMPATIBILITY_INFO PmuCompatibleInfo = {
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ARRAY_SIZE (PmuCompatibleStr),
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PmuCompatibleStr
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};
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/** Parse a "cpu" node.
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@param [in] Fdt Pointer to a Flattened Device Tree (Fdt).
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@param [in] CpuNode Offset of a cpu node.
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@param [in] GicVersion Version of the GIC.
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@param [in] AddressCells Number of address cells used for the reg
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property.
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@param [out] GicCInfo CM_ARM_GICC_INFO structure to populate.
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@retval EFI_SUCCESS The function completed successfully.
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@retval EFI_ABORTED An error occurred.
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@retval EFI_INVALID_PARAMETER Invalid parameter.
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@retval EFI_UNSUPPORTED Unsupported.
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**/
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STATIC
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EFI_STATUS
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EFIAPI
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CpuNodeParser (
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IN CONST VOID *Fdt,
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IN INT32 CpuNode,
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IN UINT32 GicVersion,
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IN UINT32 AddressCells,
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OUT CM_ARM_GICC_INFO *GicCInfo
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)
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{
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CONST UINT8 *Data;
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INT32 DataSize;
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UINT32 ProcUid;
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UINT64 MpIdr;
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UINT64 CheckAffMask;
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MpIdr = 0;
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CheckAffMask = ARM_CORE_AFF0 | ARM_CORE_AFF1 | ARM_CORE_AFF2;
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if (GicCInfo == NULL) {
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ASSERT (0);
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return EFI_INVALID_PARAMETER;
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}
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Data = fdt_getprop (Fdt, CpuNode, "reg", &DataSize);
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if ((Data == NULL) ||
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((DataSize != sizeof (UINT32)) &&
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(DataSize != sizeof (UINT64))))
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{
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ASSERT (0);
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return EFI_ABORTED;
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}
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/* If cpus node's #address-cells property is set to 2
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The first reg cell bits [7:0] must be set to
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bits [39:32] of MPIDR_EL1.
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The second reg cell bits [23:0] must be set to
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bits [23:0] of MPIDR_EL1.
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*/
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if (AddressCells == 2) {
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MpIdr = fdt64_to_cpu (*((UINT64 *)Data));
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CheckAffMask |= ARM_CORE_AFF3;
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} else {
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MpIdr = fdt32_to_cpu (*((UINT32 *)Data));
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}
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if ((MpIdr & ~CheckAffMask) != 0) {
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ASSERT (0);
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return EFI_INVALID_PARAMETER;
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}
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// To fit the Affinity [0-3] a 32bits value, place the Aff3 on bits
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// [31:24] instead of their original place ([39:32]).
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ProcUid = MpIdr | ((MpIdr & ARM_CORE_AFF3) >> 8);
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/* ACPI 6.3, s5.2.12.14 GIC CPU Interface (GICC) Structure:
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GIC 's CPU Interface Number. In GICv1/v2 implementations,
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this value matches the bit index of the associated processor
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in the GIC distributor's GICD_ITARGETSR register. For
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GICv3/4 implementations this field must be provided by the
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platform, if compatibility mode is supported. If it is not supported
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by the implementation, then this field must be zero.
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Note: We do not support compatibility mode for GicV3
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*/
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if (GicVersion == 2) {
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GicCInfo->CPUInterfaceNumber = ProcUid;
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} else {
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GicCInfo->CPUInterfaceNumber = 0;
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}
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GicCInfo->AcpiProcessorUid = ProcUid;
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GicCInfo->Flags = EFI_ACPI_6_3_GIC_ENABLED;
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GicCInfo->MPIDR = MpIdr;
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return EFI_SUCCESS;
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}
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/** Parse a "cpus" node and its children "cpu" nodes.
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Create as many CM_ARM_GICC_INFO structures as "cpu" nodes.
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@param [in] Fdt Pointer to a Flattened Device Tree (Fdt).
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@param [in] CpusNode Offset of a cpus node.
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@param [in] GicVersion Version of the GIC.
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@param [out] NewGicCmObjDesc If success, CM_OBJ_DESCRIPTOR containing
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all the created CM_ARM_GICC_INFO.
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@retval EFI_SUCCESS The function completed successfully.
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@retval EFI_ABORTED An error occurred.
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@retval EFI_INVALID_PARAMETER Invalid parameter.
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@retval EFI_UNSUPPORTED Unsupported.
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**/
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STATIC
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EFI_STATUS
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EFIAPI
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CpusNodeParser (
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IN CONST VOID *Fdt,
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IN INT32 CpusNode,
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IN UINT32 GicVersion,
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OUT CM_OBJ_DESCRIPTOR **NewGicCmObjDesc
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)
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{
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EFI_STATUS Status;
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INT32 CpuNode;
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UINT32 CpuNodeCount;
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INT32 AddressCells;
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UINT32 Index;
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CM_ARM_GICC_INFO *GicCInfoBuffer;
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UINT32 GicCInfoBufferSize;
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if (NewGicCmObjDesc == NULL) {
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ASSERT (0);
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return EFI_INVALID_PARAMETER;
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}
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AddressCells = fdt_address_cells (Fdt, CpusNode);
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if (AddressCells < 0) {
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ASSERT (0);
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return EFI_ABORTED;
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}
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// Count the number of "cpu" nodes under the "cpus" node.
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Status = FdtCountNamedNodeInBranch (Fdt, CpusNode, "cpu", &CpuNodeCount);
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if (EFI_ERROR (Status)) {
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ASSERT (0);
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return Status;
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}
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if (CpuNodeCount == 0) {
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ASSERT (0);
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return EFI_NOT_FOUND;
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}
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// Allocate memory for CpuNodeCount CM_ARM_GICC_INFO structures.
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GicCInfoBufferSize = CpuNodeCount * sizeof (CM_ARM_GICC_INFO);
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GicCInfoBuffer = AllocateZeroPool (GicCInfoBufferSize);
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if (GicCInfoBuffer == NULL) {
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ASSERT (0);
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return EFI_OUT_OF_RESOURCES;
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}
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CpuNode = CpusNode;
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for (Index = 0; Index < CpuNodeCount; Index++) {
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Status = FdtGetNextNamedNodeInBranch (Fdt, CpusNode, "cpu", &CpuNode);
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if (EFI_ERROR (Status)) {
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ASSERT (0);
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if (Status == EFI_NOT_FOUND) {
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// Should have found the node.
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Status = EFI_ABORTED;
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}
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goto exit_handler;
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}
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// Parse the "cpu" node.
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if (!FdtNodeIsCompatible (Fdt, CpuNode, &CpuCompatibleInfo)) {
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ASSERT (0);
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Status = EFI_UNSUPPORTED;
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goto exit_handler;
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}
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Status = CpuNodeParser (
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Fdt,
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CpuNode,
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GicVersion,
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AddressCells,
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&GicCInfoBuffer[Index]
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);
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if (EFI_ERROR (Status)) {
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ASSERT (0);
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goto exit_handler;
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}
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} // for
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Status = CreateCmObjDesc (
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CREATE_CM_ARM_OBJECT_ID (EArmObjGicCInfo),
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CpuNodeCount,
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GicCInfoBuffer,
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GicCInfoBufferSize,
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NewGicCmObjDesc
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);
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ASSERT_EFI_ERROR (Status);
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exit_handler:
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FreePool (GicCInfoBuffer);
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return Status;
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}
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/** Parse a Gic compatible interrupt-controller node,
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extracting GicC information generic to Gic v2 and v3.
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This function modifies a CM_OBJ_DESCRIPTOR object.
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The following CM_ARM_GICC_INFO fields are patched:
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- VGICMaintenanceInterrupt;
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- Flags;
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@param [in] Fdt Pointer to a Flattened Device Tree (Fdt).
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@param [in] GicIntcNode Offset of a Gic compatible
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interrupt-controller node.
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@param [in, out] GicCCmObjDesc The CM_ARM_GICC_INFO to patch.
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@retval EFI_SUCCESS The function completed successfully.
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@retval EFI_ABORTED An error occurred.
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@retval EFI_INVALID_PARAMETER Invalid parameter.
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**/
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STATIC
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EFI_STATUS
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EFIAPI
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GicCIntcNodeParser (
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IN CONST VOID *Fdt,
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IN INT32 GicIntcNode,
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IN OUT CM_OBJ_DESCRIPTOR *GicCCmObjDesc
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)
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{
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EFI_STATUS Status;
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INT32 IntCells;
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CM_ARM_GICC_INFO *GicCInfo;
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CONST UINT8 *Data;
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INT32 DataSize;
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if (GicCCmObjDesc == NULL) {
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ASSERT (0);
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return EFI_INVALID_PARAMETER;
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}
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// Get the number of cells used to encode an interrupt.
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Status = FdtGetInterruptCellsInfo (Fdt, GicIntcNode, &IntCells);
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if (EFI_ERROR (Status)) {
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ASSERT (0);
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return Status;
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}
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// Get the GSIV maintenance interrupt.
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// According to the DT bindings, this could be the:
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// "Interrupt source of the parent interrupt controller on secondary GICs"
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// but it is assumed that only one Gic is available.
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Data = fdt_getprop (Fdt, GicIntcNode, "interrupts", &DataSize);
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if ((Data != NULL) && (DataSize == (IntCells * sizeof (UINT32)))) {
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GicCInfo = (CM_ARM_GICC_INFO *)GicCCmObjDesc->Data;
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GicCInfo->VGICMaintenanceInterrupt =
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FdtGetInterruptId ((CONST UINT32 *)Data);
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GicCInfo->Flags = DT_IRQ_IS_EDGE_TRIGGERED (
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fdt32_to_cpu (((UINT32 *)Data)[IRQ_FLAGS_OFFSET])
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) ?
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EFI_ACPI_6_3_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS :
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0;
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return Status;
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} else if (DataSize < 0) {
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// This property is optional and was not found. Just return.
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return Status;
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}
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// The property exists and its size doesn't match for one interrupt.
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ASSERT (0);
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return EFI_ABORTED;
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}
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/** Parse a Gic compatible interrupt-controller node,
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extracting GicCv2 information.
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This function modifies a CM_OBJ_DESCRIPTOR object.
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The following CM_ARM_GICC_INFO fields are patched:
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- PhysicalAddress;
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- GICH;
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- GICV;
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@param [in] Fdt Pointer to a Flattened Device Tree (Fdt).
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@param [in] Gicv2IntcNode Offset of a Gicv2 compatible
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interrupt-controller node.
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@param [in, out] GicCCmObjDesc The CM_ARM_GICC_INFO to patch.
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@retval EFI_SUCCESS The function completed successfully.
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@retval EFI_ABORTED An error occurred.
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@retval EFI_INVALID_PARAMETER Invalid parameter.
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**/
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STATIC
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EFI_STATUS
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EFIAPI
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GicCv2IntcNodeParser (
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IN CONST VOID *Fdt,
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IN INT32 Gicv2IntcNode,
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IN OUT CM_OBJ_DESCRIPTOR *GicCCmObjDesc
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)
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{
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EFI_STATUS Status;
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UINT32 Index;
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CM_ARM_GICC_INFO *GicCInfo;
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INT32 AddressCells;
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INT32 SizeCells;
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CONST UINT8 *GicCValue;
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CONST UINT8 *GicVValue;
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CONST UINT8 *GicHValue;
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CONST UINT8 *Data;
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INT32 DataSize;
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UINT32 RegSize;
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UINT32 RegCount;
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if (GicCCmObjDesc == NULL) {
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ASSERT (0);
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return EFI_INVALID_PARAMETER;
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}
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GicCInfo = (CM_ARM_GICC_INFO *)GicCCmObjDesc->Data;
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GicVValue = NULL;
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GicHValue = NULL;
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// Get the #address-cells and #size-cells property values.
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Status = FdtGetParentAddressInfo (
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Fdt,
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Gicv2IntcNode,
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&AddressCells,
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&SizeCells
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);
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if (EFI_ERROR (Status)) {
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ASSERT (0);
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return Status;
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}
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// Don't support more than 64 bits and less than 32 bits addresses.
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if ((AddressCells < 1) ||
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(AddressCells > 2) ||
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(SizeCells < 1) ||
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(SizeCells > 2))
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{
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ASSERT (0);
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return EFI_ABORTED;
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}
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RegSize = (AddressCells + SizeCells) * sizeof (UINT32);
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Data = fdt_getprop (Fdt, Gicv2IntcNode, "reg", &DataSize);
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if ((Data == NULL) ||
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(DataSize < 0) ||
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((DataSize % RegSize) != 0))
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{
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// If error or wrong size.
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ASSERT (0);
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return EFI_ABORTED;
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}
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RegCount = DataSize/RegSize;
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switch (RegCount) {
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case 4:
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{
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// GicV is at index 3 in the reg property. GicV is optional.
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GicVValue = Data + (sizeof (UINT32) *
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GET_DT_REG_ADDRESS_OFFSET (3, AddressCells, SizeCells));
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// fall-through.
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}
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case 3:
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{
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// GicH is at index 2 in the reg property. GicH is optional.
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GicHValue = Data + (sizeof (UINT32) *
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GET_DT_REG_ADDRESS_OFFSET (2, AddressCells, SizeCells));
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// fall-through.
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}
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case 2:
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{
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// GicC is at index 1 in the reg property. GicC is mandatory.
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GicCValue = Data + (sizeof (UINT32) *
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GET_DT_REG_ADDRESS_OFFSET (1, AddressCells, SizeCells));
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break;
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}
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default:
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{
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// Not enough or too much information.
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ASSERT (0);
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return EFI_ABORTED;
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}
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}
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// Patch the relevant fields of the CM_ARM_GICC_INFO objects.
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for (Index = 0; Index < GicCCmObjDesc->Count; Index++) {
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if (AddressCells == 2) {
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GicCInfo[Index].PhysicalBaseAddress = fdt64_to_cpu (*(UINT64 *)GicCValue);
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GicCInfo[Index].GICH = (GicHValue == NULL) ? 0 :
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fdt64_to_cpu (*(UINT64 *)GicHValue);
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GicCInfo[Index].GICV = (GicVValue == NULL) ? 0 :
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fdt64_to_cpu (*(UINT64 *)GicVValue);
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} else {
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GicCInfo[Index].PhysicalBaseAddress = fdt32_to_cpu (*(UINT32 *)GicCValue);
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GicCInfo[Index].GICH = (GicHValue == NULL) ? 0 :
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fdt32_to_cpu (*(UINT32 *)GicHValue);
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GicCInfo[Index].GICV = (GicVValue == NULL) ? 0 :
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fdt32_to_cpu (*(UINT32 *)GicVValue);
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}
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} // for
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return EFI_SUCCESS;
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}
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/** Parse a Gic compatible interrupt-controller node,
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extracting GicCv3 information.
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This function modifies a CM_OBJ_DESCRIPTOR object.
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The following CM_ARM_GICC_INFO fields are patched:
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- PhysicalAddress;
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- GICH;
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- GICV;
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@param [in] Fdt Pointer to a Flattened Device Tree (Fdt).
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@param [in] Gicv3IntcNode Offset of a Gicv3 compatible
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interrupt-controller node.
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@param [in, out] GicCCmObjDesc The CM_ARM_GICC_INFO to patch.
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@retval EFI_SUCCESS The function completed successfully.
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@retval EFI_ABORTED An error occurred.
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@retval EFI_INVALID_PARAMETER Invalid parameter.
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**/
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STATIC
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EFI_STATUS
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EFIAPI
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GicCv3IntcNodeParser (
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IN CONST VOID *Fdt,
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IN INT32 Gicv3IntcNode,
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IN OUT CM_OBJ_DESCRIPTOR *GicCCmObjDesc
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)
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{
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EFI_STATUS Status;
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UINT32 Index;
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CM_ARM_GICC_INFO *GicCInfo;
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INT32 AddressCells;
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INT32 SizeCells;
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UINT32 AdditionalRedistReg;
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CONST UINT8 *GicCValue;
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CONST UINT8 *GicVValue;
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CONST UINT8 *GicHValue;
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CONST UINT8 *Data;
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INT32 DataSize;
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UINT32 RegSize;
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UINT32 RegCount;
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if (GicCCmObjDesc == NULL) {
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ASSERT (0);
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return EFI_INVALID_PARAMETER;
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}
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GicCInfo = (CM_ARM_GICC_INFO *)GicCCmObjDesc->Data;
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GicCValue = NULL;
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GicVValue = NULL;
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GicHValue = NULL;
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|
|
// Get the #address-cells and #size-cells property values.
|
|
Status = FdtGetParentAddressInfo (
|
|
Fdt,
|
|
Gicv3IntcNode,
|
|
&AddressCells,
|
|
&SizeCells
|
|
);
|
|
if (EFI_ERROR (Status)) {
|
|
ASSERT (0);
|
|
return Status;
|
|
}
|
|
|
|
// Don't support more than 64 bits and less than 32 bits addresses.
|
|
if ((AddressCells < 1) ||
|
|
(AddressCells > 2) ||
|
|
(SizeCells < 1) ||
|
|
(SizeCells > 2))
|
|
{
|
|
ASSERT (0);
|
|
return EFI_ABORTED;
|
|
}
|
|
|
|
// The "#redistributor-regions" property is optional.
|
|
Data = fdt_getprop (Fdt, Gicv3IntcNode, "#redistributor-regions", &DataSize);
|
|
if ((Data != NULL) && (DataSize == sizeof (UINT32))) {
|
|
ASSERT (fdt32_to_cpu (*(UINT32 *)Data) > 1);
|
|
AdditionalRedistReg = fdt32_to_cpu (*(UINT32 *)Data) - 1;
|
|
} else {
|
|
AdditionalRedistReg = 0;
|
|
}
|
|
|
|
RegSize = (AddressCells + SizeCells) * sizeof (UINT32);
|
|
|
|
/*
|
|
Ref: linux/blob/master/Documentation/devicetree/bindings/
|
|
interrupt-controller/arm%2Cgic-v3.yaml
|
|
|
|
reg:
|
|
description: |
|
|
Specifies base physical address(s) and size of the GIC
|
|
registers, in the following order:
|
|
- GIC Distributor interface (GICD)
|
|
- GIC Redistributors (GICR), one range per redistributor region
|
|
- GIC CPU interface (GICC)
|
|
- GIC Hypervisor interface (GICH)
|
|
- GIC Virtual CPU interface (GICV)
|
|
GICC, GICH and GICV are optional.
|
|
minItems: 2
|
|
maxItems: 4096
|
|
*/
|
|
Data = fdt_getprop (Fdt, Gicv3IntcNode, "reg", &DataSize);
|
|
if ((Data == NULL) ||
|
|
(DataSize < 0) ||
|
|
((DataSize % RegSize) != 0))
|
|
{
|
|
// If error or wrong size.
|
|
ASSERT (0);
|
|
return EFI_ABORTED;
|
|
}
|
|
|
|
RegCount = (DataSize / RegSize) - AdditionalRedistReg;
|
|
|
|
// The GicD and GicR info is mandatory.
|
|
switch (RegCount) {
|
|
case 5:
|
|
{
|
|
// GicV is at index 4 in the reg property. GicV is optional.
|
|
GicVValue = Data + (sizeof (UINT32) *
|
|
GET_DT_REG_ADDRESS_OFFSET (
|
|
4 + AdditionalRedistReg,
|
|
AddressCells,
|
|
SizeCells
|
|
));
|
|
// fall-through.
|
|
}
|
|
case 4:
|
|
{
|
|
// GicH is at index 3 in the reg property. GicH is optional.
|
|
GicHValue = Data + (sizeof (UINT32) *
|
|
GET_DT_REG_ADDRESS_OFFSET (
|
|
3 + AdditionalRedistReg,
|
|
AddressCells,
|
|
SizeCells
|
|
));
|
|
// fall-through.
|
|
}
|
|
case 3:
|
|
{
|
|
// GicC is at index 2 in the reg property. GicC is optional.
|
|
// Even though GicC is optional, it is made mandatory in this parser.
|
|
GicCValue = Data + (sizeof (UINT32) *
|
|
GET_DT_REG_ADDRESS_OFFSET (
|
|
2 + AdditionalRedistReg,
|
|
AddressCells,
|
|
SizeCells
|
|
));
|
|
// fall-through
|
|
}
|
|
case 2:
|
|
{
|
|
// GicR is discribed by the CM_ARM_GIC_REDIST_INFO object.
|
|
// GicD is described by the CM_ARM_GICD_INFO object.
|
|
break;
|
|
}
|
|
default:
|
|
{
|
|
// Not enough or too much information.
|
|
ASSERT (0);
|
|
return EFI_ABORTED;
|
|
}
|
|
}
|
|
|
|
// Patch the relevant fields of the CM_ARM_GICC_INFO objects.
|
|
if (AddressCells == 2) {
|
|
for (Index = 0; Index < GicCCmObjDesc->Count; Index++) {
|
|
// GicR is discribed by the CM_ARM_GIC_REDIST_INFO object.
|
|
GicCInfo[Index].GICRBaseAddress = 0;
|
|
GicCInfo[Index].PhysicalBaseAddress = (GicCValue == NULL) ? 0 :
|
|
fdt64_to_cpu (*(UINT64 *)GicCValue);
|
|
GicCInfo[Index].GICH = (GicHValue == NULL) ? 0 :
|
|
fdt64_to_cpu (*(UINT64 *)GicHValue);
|
|
GicCInfo[Index].GICV = (GicVValue == NULL) ? 0 :
|
|
fdt64_to_cpu (*(UINT64 *)GicVValue);
|
|
}
|
|
} else {
|
|
for (Index = 0; Index < GicCCmObjDesc->Count; Index++) {
|
|
// GicR is discribed by the CM_ARM_GIC_REDIST_INFO object.
|
|
GicCInfo[Index].GICRBaseAddress = 0;
|
|
GicCInfo[Index].PhysicalBaseAddress = (GicCValue == NULL) ? 0 :
|
|
fdt32_to_cpu (*(UINT32 *)GicCValue);
|
|
GicCInfo[Index].GICH = (GicHValue == NULL) ? 0 :
|
|
fdt32_to_cpu (*(UINT32 *)GicHValue);
|
|
GicCInfo[Index].GICV = (GicVValue == NULL) ? 0 :
|
|
fdt32_to_cpu (*(UINT32 *)GicVValue);
|
|
}
|
|
}
|
|
|
|
return EFI_SUCCESS;
|
|
}
|
|
|
|
/** Parse a Pmu compatible node, extracting Pmu information.
|
|
|
|
This function modifies a CM_OBJ_DESCRIPTOR object.
|
|
The following CM_ARM_GICC_INFO fields are patched:
|
|
- PerformanceInterruptGsiv;
|
|
|
|
@param [in] Fdt Pointer to a Flattened Device Tree (Fdt).
|
|
@param [in] GicIntcNode Offset of a Gic compatible
|
|
interrupt-controller node.
|
|
@param [in, out] GicCCmObjDesc The CM_ARM_GICC_INFO to patch.
|
|
|
|
@retval EFI_SUCCESS The function completed successfully.
|
|
@retval EFI_ABORTED An error occurred.
|
|
@retval EFI_INVALID_PARAMETER Invalid parameter.
|
|
**/
|
|
STATIC
|
|
EFI_STATUS
|
|
EFIAPI
|
|
GicCPmuNodeParser (
|
|
IN CONST VOID *Fdt,
|
|
IN INT32 GicIntcNode,
|
|
IN OUT CM_OBJ_DESCRIPTOR *GicCCmObjDesc
|
|
)
|
|
{
|
|
EFI_STATUS Status;
|
|
INT32 IntCells;
|
|
INT32 PmuNode;
|
|
UINT32 PmuNodeCount;
|
|
UINT32 PmuIrq;
|
|
UINT32 Index;
|
|
CM_ARM_GICC_INFO *GicCInfo;
|
|
CONST UINT8 *Data;
|
|
INT32 DataSize;
|
|
|
|
if (GicCCmObjDesc == NULL) {
|
|
ASSERT (GicCCmObjDesc != NULL);
|
|
return EFI_INVALID_PARAMETER;
|
|
}
|
|
|
|
GicCInfo = (CM_ARM_GICC_INFO *)GicCCmObjDesc->Data;
|
|
PmuNode = 0;
|
|
|
|
// Count the number of pmu nodes.
|
|
Status = FdtCountCompatNodeInBranch (
|
|
Fdt,
|
|
0,
|
|
&PmuCompatibleInfo,
|
|
&PmuNodeCount
|
|
);
|
|
if (EFI_ERROR (Status)) {
|
|
ASSERT_EFI_ERROR (Status);
|
|
return Status;
|
|
}
|
|
|
|
if (PmuNodeCount == 0) {
|
|
return EFI_NOT_FOUND;
|
|
}
|
|
|
|
Status = FdtGetNextCompatNodeInBranch (
|
|
Fdt,
|
|
0,
|
|
&PmuCompatibleInfo,
|
|
&PmuNode
|
|
);
|
|
if (EFI_ERROR (Status)) {
|
|
ASSERT_EFI_ERROR (Status);
|
|
if (Status == EFI_NOT_FOUND) {
|
|
// Should have found the node.
|
|
Status = EFI_ABORTED;
|
|
}
|
|
}
|
|
|
|
// Get the number of cells used to encode an interrupt.
|
|
Status = FdtGetInterruptCellsInfo (Fdt, GicIntcNode, &IntCells);
|
|
if (EFI_ERROR (Status)) {
|
|
ASSERT_EFI_ERROR (Status);
|
|
return Status;
|
|
}
|
|
|
|
Data = fdt_getprop (Fdt, PmuNode, "interrupts", &DataSize);
|
|
if ((Data == NULL) || (DataSize != (IntCells * sizeof (UINT32)))) {
|
|
// If error or not 1 interrupt.
|
|
ASSERT (Data != NULL);
|
|
ASSERT (DataSize == (IntCells * sizeof (UINT32)));
|
|
return EFI_ABORTED;
|
|
}
|
|
|
|
PmuIrq = FdtGetInterruptId ((CONST UINT32 *)Data);
|
|
|
|
// Only supports PPI 23 for now.
|
|
// According to BSA 1.0 s3.6 PPI assignments, PMU IRQ ID is 23. A non BSA
|
|
// compliant system may assign a different IRQ for the PMU, however this
|
|
// is not implemented for now.
|
|
if (PmuIrq != BSA_PMU_IRQ) {
|
|
ASSERT (PmuIrq == BSA_PMU_IRQ);
|
|
return EFI_ABORTED;
|
|
}
|
|
|
|
for (Index = 0; Index < GicCCmObjDesc->Count; Index++) {
|
|
GicCInfo[Index].PerformanceInterruptGsiv = PmuIrq;
|
|
}
|
|
|
|
return EFI_SUCCESS;
|
|
}
|
|
|
|
/** CM_ARM_GICC_INFO parser function.
|
|
|
|
This parser expects FdtBranch to be the "\cpus" node node.
|
|
At most one CmObj is created.
|
|
The following structure is populated:
|
|
typedef struct CmArmGicCInfo {
|
|
UINT32 CPUInterfaceNumber; // {Populated}
|
|
UINT32 AcpiProcessorUid; // {Populated}
|
|
UINT32 Flags; // {Populated}
|
|
UINT32 ParkingProtocolVersion; // {default = 0}
|
|
UINT32 PerformanceInterruptGsiv; // {Populated}
|
|
UINT64 ParkedAddress; // {default = 0}
|
|
UINT64 PhysicalBaseAddress; // {Populated}
|
|
UINT64 GICV; // {Populated}
|
|
UINT64 GICH; // {Populated}
|
|
UINT32 VGICMaintenanceInterrupt; // {Populated}
|
|
UINT64 GICRBaseAddress; // {default = 0}
|
|
UINT64 MPIDR; // {Populated}
|
|
UINT8 ProcessorPowerEfficiencyClass; // {default = 0}
|
|
UINT16 SpeOverflowInterrupt; // {default = 0}
|
|
UINT32 ProximityDomain; // {default = 0}
|
|
UINT32 ClockDomain; // {default = 0}
|
|
UINT32 AffinityFlags; // {default = 0}
|
|
} CM_ARM_GICC_INFO;
|
|
|
|
The pmu information can be found in the pmu node. There is no support
|
|
for now.
|
|
|
|
A parser parses a Device Tree to populate a specific CmObj type. None,
|
|
one or many CmObj can be created by the parser.
|
|
The created CmObj are then handed to the parser's caller through the
|
|
HW_INFO_ADD_OBJECT interface.
|
|
This can also be a dispatcher. I.e. a function that not parsing a
|
|
Device Tree but calling other parsers.
|
|
|
|
@param [in] FdtParserHandle A handle to the parser instance.
|
|
@param [in] FdtBranch When searching for DT node name, restrict
|
|
the search to this Device Tree branch.
|
|
|
|
@retval EFI_SUCCESS The function completed successfully.
|
|
@retval EFI_ABORTED An error occurred.
|
|
@retval EFI_INVALID_PARAMETER Invalid parameter.
|
|
@retval EFI_NOT_FOUND Not found.
|
|
@retval EFI_UNSUPPORTED Unsupported.
|
|
**/
|
|
EFI_STATUS
|
|
EFIAPI
|
|
ArmGicCInfoParser (
|
|
IN CONST FDT_HW_INFO_PARSER_HANDLE FdtParserHandle,
|
|
IN INT32 FdtBranch
|
|
)
|
|
{
|
|
EFI_STATUS Status;
|
|
INT32 IntcNode;
|
|
UINT32 GicVersion;
|
|
CM_OBJ_DESCRIPTOR *NewCmObjDesc;
|
|
VOID *Fdt;
|
|
|
|
if (FdtParserHandle == NULL) {
|
|
ASSERT (0);
|
|
return EFI_INVALID_PARAMETER;
|
|
}
|
|
|
|
Fdt = FdtParserHandle->Fdt;
|
|
NewCmObjDesc = NULL;
|
|
|
|
// The FdtBranch points to the Cpus Node.
|
|
// Get the interrupt-controller node associated to the "cpus" node.
|
|
Status = FdtGetIntcParentNode (Fdt, FdtBranch, &IntcNode);
|
|
if (EFI_ERROR (Status)) {
|
|
ASSERT (0);
|
|
if (Status == EFI_NOT_FOUND) {
|
|
// Should have found the node.
|
|
Status = EFI_ABORTED;
|
|
}
|
|
|
|
return Status;
|
|
}
|
|
|
|
Status = GetGicVersion (Fdt, IntcNode, &GicVersion);
|
|
if (EFI_ERROR (Status)) {
|
|
ASSERT (0);
|
|
return Status;
|
|
}
|
|
|
|
// Parse the "cpus" nodes and its children "cpu" nodes,
|
|
// and create a CM_OBJ_DESCRIPTOR.
|
|
Status = CpusNodeParser (Fdt, FdtBranch, GicVersion, &NewCmObjDesc);
|
|
if (EFI_ERROR (Status)) {
|
|
ASSERT (0);
|
|
return Status;
|
|
}
|
|
|
|
// Parse the interrupt-controller node according to the Gic version.
|
|
switch (GicVersion) {
|
|
case 2:
|
|
{
|
|
Status = GicCv2IntcNodeParser (Fdt, IntcNode, NewCmObjDesc);
|
|
break;
|
|
}
|
|
case 3:
|
|
{
|
|
Status = GicCv3IntcNodeParser (Fdt, IntcNode, NewCmObjDesc);
|
|
break;
|
|
}
|
|
default:
|
|
{
|
|
// Unsupported Gic version.
|
|
ASSERT (0);
|
|
Status = EFI_UNSUPPORTED;
|
|
}
|
|
}
|
|
|
|
if (EFI_ERROR (Status)) {
|
|
ASSERT (0);
|
|
goto exit_handler;
|
|
}
|
|
|
|
// Parse the Gic information common to Gic v2 and v3.
|
|
Status = GicCIntcNodeParser (Fdt, IntcNode, NewCmObjDesc);
|
|
if (EFI_ERROR (Status)) {
|
|
ASSERT (0);
|
|
goto exit_handler;
|
|
}
|
|
|
|
// Parse the Pmu Interrupt.
|
|
Status = GicCPmuNodeParser (Fdt, IntcNode, NewCmObjDesc);
|
|
if (EFI_ERROR (Status) && (Status != EFI_NOT_FOUND)) {
|
|
ASSERT_EFI_ERROR (Status);
|
|
goto exit_handler;
|
|
}
|
|
|
|
// Add all the CmObjs to the Configuration Manager.
|
|
Status = AddMultipleCmObj (FdtParserHandle, NewCmObjDesc, 0, NULL);
|
|
if (EFI_ERROR (Status)) {
|
|
ASSERT (0);
|
|
goto exit_handler;
|
|
}
|
|
|
|
exit_handler:
|
|
FreeCmObjDesc (NewCmObjDesc);
|
|
return Status;
|
|
}
|