2f88bd3a12
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the MdePkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
137 lines
5.2 KiB
C
137 lines
5.2 KiB
C
/** @file
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This files describes the CPU I/O 2 Protocol.
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This protocol provides an I/O abstraction for a system processor. This protocol
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is used by a PCI root bridge I/O driver to perform memory-mapped I/O and I/O transactions.
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The I/O or memory primitives can be used by the consumer of the protocol to materialize
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bus-specific configuration cycles, such as the transitional configuration address and data
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ports for PCI. Only drivers that require direct access to the entire system should use this
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protocol.
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Note: This is a boot-services only protocol and it may not be used by runtime drivers after
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ExitBootServices(). It is different from the Framework CPU I/O Protocol, which is a runtime
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protocol and can be used by runtime drivers after ExitBootServices().
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Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@par Revision Reference:
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This Protocol is defined in UEFI Platform Initialization Specification 1.2
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Volume 5: Standards
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**/
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#ifndef __CPU_IO2_H__
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#define __CPU_IO2_H__
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#define EFI_CPU_IO2_PROTOCOL_GUID \
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{ \
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0xad61f191, 0xae5f, 0x4c0e, {0xb9, 0xfa, 0xe8, 0x69, 0xd2, 0x88, 0xc6, 0x4f} \
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}
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typedef struct _EFI_CPU_IO2_PROTOCOL EFI_CPU_IO2_PROTOCOL;
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///
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/// Enumeration that defines the width of the I/O operation.
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///
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typedef enum {
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EfiCpuIoWidthUint8,
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EfiCpuIoWidthUint16,
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EfiCpuIoWidthUint32,
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EfiCpuIoWidthUint64,
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EfiCpuIoWidthFifoUint8,
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EfiCpuIoWidthFifoUint16,
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EfiCpuIoWidthFifoUint32,
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EfiCpuIoWidthFifoUint64,
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EfiCpuIoWidthFillUint8,
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EfiCpuIoWidthFillUint16,
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EfiCpuIoWidthFillUint32,
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EfiCpuIoWidthFillUint64,
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EfiCpuIoWidthMaximum
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} EFI_CPU_IO_PROTOCOL_WIDTH;
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/**
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Enables a driver to access registers in the PI CPU I/O space.
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The Io.Read() and Io.Write() functions enable a driver to access PCI controller
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registers in the PI CPU I/O space.
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The I/O operations are carried out exactly as requested. The caller is responsible
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for satisfying any alignment and I/O width restrictions that a PI System on a
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platform might require. For example on some platforms, width requests of
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EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
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be handled by the driver.
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If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
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or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
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each of the Count operations that is performed.
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If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
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EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
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incremented for each of the Count operations that is performed. The read or
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write operation is performed Count times on the same Address.
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If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
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EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
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incremented for each of the Count operations that is performed. The read or
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write operation is performed Count times from the first element of Buffer.
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@param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance.
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@param[in] Width Signifies the width of the I/O or Memory operation.
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@param[in] Address The base address of the I/O operation.
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@param[in] Count The number of I/O operations to perform. The number
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of bytes moved is Width size * Count, starting at Address.
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@param[in, out] Buffer For read operations, the destination buffer to store the results.
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For write operations, the source buffer from which to write data.
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@retval EFI_SUCCESS The data was read from or written to the PI system.
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@retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
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@retval EFI_INVALID_PARAMETER Buffer is NULL.
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@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
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@retval EFI_UNSUPPORTED The address range specified by Address, Width,
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and Count is not valid for this PI system.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_CPU_IO_PROTOCOL_IO_MEM)(
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IN EFI_CPU_IO2_PROTOCOL *This,
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IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
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IN UINT64 Address,
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IN UINTN Count,
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IN OUT VOID *Buffer
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);
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///
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/// Service for read and write accesses.
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///
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typedef struct {
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///
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/// This service provides the various modalities of memory and I/O read.
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///
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EFI_CPU_IO_PROTOCOL_IO_MEM Read;
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///
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/// This service provides the various modalities of memory and I/O write.
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///
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EFI_CPU_IO_PROTOCOL_IO_MEM Write;
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} EFI_CPU_IO_PROTOCOL_ACCESS;
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///
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/// Provides the basic memory and I/O interfaces that are used to abstract
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/// accesses to devices in a system.
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///
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struct _EFI_CPU_IO2_PROTOCOL {
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///
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/// Enables a driver to access memory-mapped registers in the EFI system memory space.
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///
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EFI_CPU_IO_PROTOCOL_ACCESS Mem;
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///
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/// Enables a driver to access registers in the EFI CPU I/O space.
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///
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EFI_CPU_IO_PROTOCOL_ACCESS Io;
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};
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extern EFI_GUID gEfiCpuIo2ProtocolGuid;
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#endif
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