3fd8800954
implementation. Implement RISC-V CPU related functions in BaseCpuLib. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
21 lines
882 B
Plaintext
21 lines
882 B
Plaintext
// /** @file
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// Instance of CPU Library for various architecture.
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//
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// CPU Library implemented using ASM functions for IA-32, X64 and RISCV64,
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// PAL CALLs for IPF, and empty functions for EBC.
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//
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// Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
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// Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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// Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
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// Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
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//
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// SPDX-License-Identifier: BSD-2-Clause-Patent
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//
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// **/
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#string STR_MODULE_ABSTRACT #language en-US "Instance of CPU Library for various architectures"
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#string STR_MODULE_DESCRIPTION #language en-US "CPU Library implemented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs for IPF, and empty functions for EBC."
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