ed71a22c185ad4b5311812854ee614ad7974ef31
Because the D&I caches were clean before to be disabled, the cache lines might have got dirty during the cache maintenance operations. This fix disables D&I caches before to clean them. The performance drops should be minimised as invalidating the I cache is only a couple of instruction. Signed-off-by: Eugene Cohen <eugene@hp.com> Reviewed-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13503 6f19259b-4bc3-4df7-8a09-765794883524
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