3cbfba02fe
https://svn.code.sf.net/p/edk2/code/trunk/edk2/, which are for MinnowBoard MAX open source project. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: David Wei <david.wei@intel.com> Reviewed-by: Mike Wu <mike.wu@intel.com> Reviewed-by: Hot Tian <hot.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16599 6f19259b-4bc3-4df7-8a09-765794883524
139 lines
4.0 KiB
C
139 lines
4.0 KiB
C
/**
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**/
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/**
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Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved
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This program and the accompanying materials are licensed and made available under
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the terms and conditions of the BSD License that accompanies this distribution.
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The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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@file
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PchS3Support.h
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@brief
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This file defines the PCH S3 support Protocol.
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**/
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#ifndef _PCH_S3_SUPPORT_PROTOCOL_H_
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#define _PCH_S3_SUPPORT_PROTOCOL_H_
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#ifndef ECP_FLAG
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#include <Pi/PiS3BootScript.h>
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#endif
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#define EFI_PCH_S3_SUPPORT_PROTOCOL_GUID \
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{ \
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0xe287d20b, 0xd897, 0x4e1e, 0xa5, 0xd9, 0x97, 0x77, 0x63, 0x93, 0x6a, 0x4 \
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}
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#include <Protocol/PchPlatformPolicy.h>
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///
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/// Extern the GUID for protocol users.
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///
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extern EFI_GUID gEfiPchS3SupportProtocolGuid;
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///
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/// Forward reference for ANSI C compatibility
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///
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typedef struct _EFI_PCH_S3_SUPPORT_PROTOCOL EFI_PCH_S3_SUPPORT_PROTOCOL;
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typedef enum {
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PchS3ItemTypeSendCodecCommand,
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PchS3ItemTypePollStatus,
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PchS3ItemTypeInitPcieRootPortDownstream,
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PchS3ItemTypePcieSetPm,
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PchS3ItemTypePmTimerStall,
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PchS3ItemTypeMax
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} EFI_PCH_S3_DISPATCH_ITEM_TYPE;
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///
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/// It's better not to use pointer here because the size of pointer in DXE is 8, but it's 4 in PEI
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/// plug 4 to ParameterSize in PEIM if you really need it
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///
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typedef struct {
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UINT32 HdaBar;
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UINT32 CodecCmdData;
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} EFI_PCH_S3_PARAMETER_SEND_CODEC_COMMAND;
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typedef struct {
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UINT64 MmioAddress;
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EFI_BOOT_SCRIPT_WIDTH Width;
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UINT64 Mask;
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UINT64 Value;
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UINT32 Timeout; // us
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} EFI_PCH_S3_PARAMETER_POLL_STATUS;
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typedef struct {
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UINT8 RootPortBus;
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UINT8 RootPortDevice;
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UINT8 RootPortFunc;
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UINT8 TempBusNumberMin;
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UINT8 TempBusNumberMax;
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} EFI_PCH_S3_PARAMETER_INIT_PCIE_ROOT_PORT_DOWNSTREAM;
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typedef struct {
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UINT8 RootPortBus;
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UINT8 RootPortDevice;
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UINT8 RootPortFunc;
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PCH_PCI_EXPRESS_ASPM_CONTROL RootPortAspm;
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UINT8 NumOfDevAspmOverride;
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UINT32 DevAspmOverrideAddr;
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UINT8 TempBusNumberMin;
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UINT8 TempBusNumberMax;
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UINT8 NumOfDevLtrOverride;
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UINT32 DevLtrOverrideAddr;
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} EFI_PCH_S3_PARAMETER_PCIE_SET_PM;
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typedef struct {
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UINT32 DelayTime; // us
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} EFI_PCH_S3_PARAMETER_PM_TIMER_STALL;
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typedef struct {
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EFI_PCH_S3_DISPATCH_ITEM_TYPE Type;
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VOID *Parameter;
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} EFI_PCH_S3_DISPATCH_ITEM;
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///
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/// Member functions
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///
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typedef
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EFI_STATUS
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(EFIAPI *EFI_PCH_S3_SUPPORT_SET_S3_DISPATCH_ITEM) (
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IN EFI_PCH_S3_SUPPORT_PROTOCOL * This,
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IN EFI_PCH_S3_DISPATCH_ITEM * DispatchItem,
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OUT EFI_PHYSICAL_ADDRESS * S3DispatchEntryPoint
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);
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/**
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@brief
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Set an item to be dispatched at S3 resume time. At the same time, the entry point
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of the PCH S3 support image is returned to be used in subsequent boot script save
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call
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@param[in] This Pointer to the protocol instance.
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@param[in] DispatchItem The item to be dispatched.
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@param[in] S3DispatchEntryPoint The entry point of the PCH S3 support image.
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@retval EFI_STATUS Successfully completed.
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@retval EFI_OUT_OF_RESOURCES Out of resources.
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**/
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///
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/// Protocol definition
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///
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struct _EFI_PCH_S3_SUPPORT_PROTOCOL {
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EFI_PCH_S3_SUPPORT_SET_S3_DISPATCH_ITEM SetDispatchItem;
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};
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#endif
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