REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3101 New formal release in https://www.7-zip.org/sdk.html is 19.00. Cc: Liming Gao <gaoliming@byosoft.com.cn> Signed-off-by: Wei Liu <weix.c.liu@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
		
			
				
	
	
		
			337 lines
		
	
	
		
			7.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			337 lines
		
	
	
		
			7.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* CpuArch.h -- CPU specific code
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| 2018-02-18 : Igor Pavlov : Public domain */
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| 
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| #ifndef __CPU_ARCH_H
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| #define __CPU_ARCH_H
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| 
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| #include "7zTypes.h"
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| 
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| EXTERN_C_BEGIN
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| 
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| /*
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| MY_CPU_LE means that CPU is LITTLE ENDIAN.
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| MY_CPU_BE means that CPU is BIG ENDIAN.
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| If MY_CPU_LE and MY_CPU_BE are not defined, we don't know about ENDIANNESS of platform.
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| 
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| MY_CPU_LE_UNALIGN means that CPU is LITTLE ENDIAN and CPU supports unaligned memory accesses.
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| */
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| 
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| #if  defined(_M_X64) \
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|   || defined(_M_AMD64) \
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|   || defined(__x86_64__) \
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|   || defined(__AMD64__) \
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|   || defined(__amd64__)
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|   #define MY_CPU_AMD64
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|   #ifdef __ILP32__
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|     #define MY_CPU_NAME "x32"
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|   #else
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|     #define MY_CPU_NAME "x64"
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|   #endif
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|   #define MY_CPU_64BIT
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| #endif
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| 
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| 
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| #if  defined(_M_IX86) \
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|   || defined(__i386__)
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|   #define MY_CPU_X86
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|   #define MY_CPU_NAME "x86"
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|   #define MY_CPU_32BIT
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| #endif
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| 
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| 
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| #if  defined(_M_ARM64) \
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|   || defined(__AARCH64EL__) \
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|   || defined(__AARCH64EB__) \
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|   || defined(__aarch64__)
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|   #define MY_CPU_ARM64
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|   #define MY_CPU_NAME "arm64"
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|   #define MY_CPU_64BIT
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| #endif
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| 
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| 
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| #if  defined(_M_ARM) \
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|   || defined(_M_ARM_NT) \
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|   || defined(_M_ARMT) \
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|   || defined(__arm__) \
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|   || defined(__thumb__) \
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|   || defined(__ARMEL__) \
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|   || defined(__ARMEB__) \
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|   || defined(__THUMBEL__) \
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|   || defined(__THUMBEB__)
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|   #define MY_CPU_ARM
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|   #define MY_CPU_NAME "arm"
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|   #define MY_CPU_32BIT
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| #endif
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| 
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| 
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| #if  defined(_M_IA64) \
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|   || defined(__ia64__)
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|   #define MY_CPU_IA64
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|   #define MY_CPU_NAME "ia64"
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|   #define MY_CPU_64BIT
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| #endif
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| 
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| 
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| #if  defined(__mips64) \
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|   || defined(__mips64__) \
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|   || (defined(__mips) && (__mips == 64 || __mips == 4 || __mips == 3))
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|   #define MY_CPU_NAME "mips64"
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|   #define MY_CPU_64BIT
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| #elif defined(__mips__)
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|   #define MY_CPU_NAME "mips"
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|   /* #define MY_CPU_32BIT */
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| #endif
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| 
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| 
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| #if  defined(__ppc64__) \
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|   || defined(__powerpc64__)
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|   #ifdef __ILP32__
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|     #define MY_CPU_NAME "ppc64-32"
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|   #else
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|     #define MY_CPU_NAME "ppc64"
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|   #endif
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|   #define MY_CPU_64BIT
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| #elif defined(__ppc__) \
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|   || defined(__powerpc__)
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|   #define MY_CPU_NAME "ppc"
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|   #define MY_CPU_32BIT
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| #endif
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| 
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| 
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| #if  defined(__sparc64__)
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|   #define MY_CPU_NAME "sparc64"
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|   #define MY_CPU_64BIT
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| #elif defined(__sparc__)
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|   #define MY_CPU_NAME "sparc"
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|   /* #define MY_CPU_32BIT */
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| #endif
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| 
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| 
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| #if defined(MY_CPU_X86) || defined(MY_CPU_AMD64)
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| #define MY_CPU_X86_OR_AMD64
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| #endif
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| 
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| 
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| #ifdef _WIN32
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| 
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|   #ifdef MY_CPU_ARM
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|   #define MY_CPU_ARM_LE
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|   #endif
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| 
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|   #ifdef MY_CPU_ARM64
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|   #define MY_CPU_ARM64_LE
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|   #endif
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| 
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|   #ifdef _M_IA64
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|   #define MY_CPU_IA64_LE
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|   #endif
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| 
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| #endif
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| 
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| 
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| #if defined(MY_CPU_X86_OR_AMD64) \
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|     || defined(MY_CPU_ARM_LE) \
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|     || defined(MY_CPU_ARM64_LE) \
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|     || defined(MY_CPU_IA64_LE) \
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|     || defined(__LITTLE_ENDIAN__) \
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|     || defined(__ARMEL__) \
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|     || defined(__THUMBEL__) \
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|     || defined(__AARCH64EL__) \
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|     || defined(__MIPSEL__) \
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|     || defined(__MIPSEL) \
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|     || defined(_MIPSEL) \
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|     || defined(__BFIN__) \
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|     || (defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__))
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|   #define MY_CPU_LE
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| #endif
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| 
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| #if defined(__BIG_ENDIAN__) \
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|     || defined(__ARMEB__) \
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|     || defined(__THUMBEB__) \
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|     || defined(__AARCH64EB__) \
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|     || defined(__MIPSEB__) \
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|     || defined(__MIPSEB) \
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|     || defined(_MIPSEB) \
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|     || defined(__m68k__) \
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|     || defined(__s390__) \
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|     || defined(__s390x__) \
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|     || defined(__zarch__) \
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|     || (defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__))
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|   #define MY_CPU_BE
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| #endif
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| 
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| 
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| #if defined(MY_CPU_LE) && defined(MY_CPU_BE)
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|   #error Stop_Compiling_Bad_Endian
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| #endif
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| 
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| 
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| #if defined(MY_CPU_32BIT) && defined(MY_CPU_64BIT)
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|   #error Stop_Compiling_Bad_32_64_BIT
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| #endif
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| 
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| 
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| #ifndef MY_CPU_NAME
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|   #ifdef MY_CPU_LE
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|     #define MY_CPU_NAME "LE"
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|   #elif defined(MY_CPU_BE)
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|     #define MY_CPU_NAME "BE"
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|   #else
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|     /*
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|     #define MY_CPU_NAME ""
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|     */
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|   #endif
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| #endif
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| 
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| 
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| 
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| 
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| 
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| #ifdef MY_CPU_LE
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|   #if defined(MY_CPU_X86_OR_AMD64) \
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|       || defined(MY_CPU_ARM64) \
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|       || defined(__ARM_FEATURE_UNALIGNED)
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|     #define MY_CPU_LE_UNALIGN
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|   #endif
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| #endif
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| 
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| 
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| #ifdef MY_CPU_LE_UNALIGN
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| 
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| #define GetUi16(p) (*(const UInt16 *)(const void *)(p))
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| #define GetUi32(p) (*(const UInt32 *)(const void *)(p))
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| #define GetUi64(p) (*(const UInt64 *)(const void *)(p))
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| 
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| #define SetUi16(p, v) { *(UInt16 *)(p) = (v); }
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| #define SetUi32(p, v) { *(UInt32 *)(p) = (v); }
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| #define SetUi64(p, v) { *(UInt64 *)(p) = (v); }
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| 
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| #else
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| 
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| #define GetUi16(p) ( (UInt16) ( \
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|              ((const Byte *)(p))[0] | \
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|     ((UInt16)((const Byte *)(p))[1] << 8) ))
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| 
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| #define GetUi32(p) ( \
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|              ((const Byte *)(p))[0]        | \
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|     ((UInt32)((const Byte *)(p))[1] <<  8) | \
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|     ((UInt32)((const Byte *)(p))[2] << 16) | \
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|     ((UInt32)((const Byte *)(p))[3] << 24))
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| 
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| #define GetUi64(p) (GetUi32(p) | ((UInt64)GetUi32(((const Byte *)(p)) + 4) << 32))
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| 
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| #define SetUi16(p, v) { Byte *_ppp_ = (Byte *)(p); UInt32 _vvv_ = (v); \
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|     _ppp_[0] = (Byte)_vvv_; \
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|     _ppp_[1] = (Byte)(_vvv_ >> 8); }
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| 
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| #define SetUi32(p, v) { Byte *_ppp_ = (Byte *)(p); UInt32 _vvv_ = (v); \
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|     _ppp_[0] = (Byte)_vvv_; \
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|     _ppp_[1] = (Byte)(_vvv_ >> 8); \
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|     _ppp_[2] = (Byte)(_vvv_ >> 16); \
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|     _ppp_[3] = (Byte)(_vvv_ >> 24); }
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| 
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| #define SetUi64(p, v) { Byte *_ppp2_ = (Byte *)(p); UInt64 _vvv2_ = (v); \
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|     SetUi32(_ppp2_    , (UInt32)_vvv2_); \
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|     SetUi32(_ppp2_ + 4, (UInt32)(_vvv2_ >> 32)); }
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| 
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| #endif
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| 
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| #ifdef __has_builtin
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|   #define MY__has_builtin(x) __has_builtin(x)
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| #else
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|   #define MY__has_builtin(x) 0
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| #endif
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| 
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| #if defined(MY_CPU_LE_UNALIGN) && /* defined(_WIN64) && */ (_MSC_VER >= 1300)
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| 
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| /* Note: we use bswap instruction, that is unsupported in 386 cpu */
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| 
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| #include <stdlib.h>
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| 
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| #pragma intrinsic(_byteswap_ushort)
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| #pragma intrinsic(_byteswap_ulong)
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| #pragma intrinsic(_byteswap_uint64)
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| 
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| /* #define GetBe16(p) _byteswap_ushort(*(const UInt16 *)(const Byte *)(p)) */
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| #define GetBe32(p) _byteswap_ulong(*(const UInt32 *)(const Byte *)(p))
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| #define GetBe64(p) _byteswap_uint64(*(const UInt64 *)(const Byte *)(p))
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| 
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| #define SetBe32(p, v) (*(UInt32 *)(void *)(p)) = _byteswap_ulong(v)
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| 
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| #elif defined(MY_CPU_LE_UNALIGN) && ( \
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|        (defined(__GNUC__) && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3))) \
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|     || (defined(__clang__) && MY__has_builtin(__builtin_bswap16)) )
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| 
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| /* #define GetBe16(p) __builtin_bswap16(*(const UInt16 *)(const Byte *)(p)) */
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| #define GetBe32(p) __builtin_bswap32(*(const UInt32 *)(const Byte *)(p))
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| #define GetBe64(p) __builtin_bswap64(*(const UInt64 *)(const Byte *)(p))
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| 
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| #define SetBe32(p, v) (*(UInt32 *)(void *)(p)) = __builtin_bswap32(v)
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| 
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| #else
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| 
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| #define GetBe32(p) ( \
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|     ((UInt32)((const Byte *)(p))[0] << 24) | \
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|     ((UInt32)((const Byte *)(p))[1] << 16) | \
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|     ((UInt32)((const Byte *)(p))[2] <<  8) | \
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|              ((const Byte *)(p))[3] )
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| 
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| #define GetBe64(p) (((UInt64)GetBe32(p) << 32) | GetBe32(((const Byte *)(p)) + 4))
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| 
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| #define SetBe32(p, v) { Byte *_ppp_ = (Byte *)(p); UInt32 _vvv_ = (v); \
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|     _ppp_[0] = (Byte)(_vvv_ >> 24); \
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|     _ppp_[1] = (Byte)(_vvv_ >> 16); \
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|     _ppp_[2] = (Byte)(_vvv_ >> 8); \
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|     _ppp_[3] = (Byte)_vvv_; }
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| 
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| #endif
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| 
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| 
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| #ifndef GetBe16
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| 
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| #define GetBe16(p) ( (UInt16) ( \
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|     ((UInt16)((const Byte *)(p))[0] << 8) | \
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|              ((const Byte *)(p))[1] ))
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| 
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| #endif
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| 
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| 
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| 
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| #ifdef MY_CPU_X86_OR_AMD64
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| 
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| typedef struct
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| {
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|   UInt32 maxFunc;
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|   UInt32 vendor[3];
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|   UInt32 ver;
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|   UInt32 b;
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|   UInt32 c;
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|   UInt32 d;
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| } Cx86cpuid;
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| 
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| enum
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| {
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|   CPU_FIRM_INTEL,
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|   CPU_FIRM_AMD,
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|   CPU_FIRM_VIA
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| };
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| 
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| void MyCPUID(UInt32 function, UInt32 *a, UInt32 *b, UInt32 *c, UInt32 *d);
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| 
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| BoolInt x86cpuid_CheckAndRead(Cx86cpuid *p);
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| int x86cpuid_GetFirm(const Cx86cpuid *p);
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| 
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| #define x86cpuid_GetFamily(ver) (((ver >> 16) & 0xFF0) | ((ver >> 8) & 0xF))
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| #define x86cpuid_GetModel(ver)  (((ver >> 12) &  0xF0) | ((ver >> 4) & 0xF))
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| #define x86cpuid_GetStepping(ver) (ver & 0xF)
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| 
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| BoolInt CPU_Is_InOrder();
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| BoolInt CPU_Is_Aes_Supported();
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| BoolInt CPU_IsSupported_PageGB();
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| 
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| #endif
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| 
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| EXTERN_C_END
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| 
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| #endif
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