4006b0b550
Signed-off-by: Elvin Li <elvin.li@intel.com> Reviewed-by: Leahy Leroy P <leroy.p.leahy@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14548 6f19259b-4bc3-4df7-8a09-765794883524
193 lines
8.2 KiB
C
193 lines
8.2 KiB
C
/** @file
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I2C Master Protocol as defined in the PI 1.3 specification.
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This protocol manipulates the I2C host controller to perform transactions as a master
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on the I2C bus using the current state of any switches or multiplexers in the I2C bus.
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Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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@par Revision Reference:
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This protocol is from PI Version 1.3.
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**/
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#ifndef __I2C_MASTER_H__
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#define __I2C_MASTER_H__
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#include <Pi/PiI2c.h>
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#define EFI_I2C_MASTER_PROTOCOL_GUID { 0xcd72881f, 0x45b5, 0x4feb, { 0x98, 0xc8, 0x31, 0x3d, 0xa8, 0x11, 0x74, 0x62 }}
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typedef struct _EFI_I2C_MASTER_PROTOCOL EFI_I2C_MASTER_PROTOCOL;
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/**
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Set the frequency for the I2C clock line.
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This routine must be called at or below TPL_NOTIFY.
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The software and controller do a best case effort of using the specified
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frequency for the I2C bus. If the frequency does not match exactly then
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the I2C master protocol selects the next lower frequency to avoid
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exceeding the operating conditions for any of the I2C devices on the bus.
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For example if 400 KHz was specified and the controller's divide network
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only supports 402 KHz or 398 KHz then the I2C master protocol selects 398
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KHz. If there are not lower frequencies available, then return
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EFI_UNSUPPORTED.
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@param[in] This Pointer to an EFI_I2C_MASTER_PROTOCOL structure
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@param[in] BusClockHertz Pointer to the requested I2C bus clock frequency
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in Hertz. Upon return this value contains the
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actual frequency in use by the I2C controller.
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@retval EFI_SUCCESS The bus frequency was set successfully.
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@retval EFI_ALREADY_STARTED The controller is busy with another transaction.
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@retval EFI_INVALID_PARAMETER BusClockHertz is NULL
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@retval EFI_UNSUPPORTED The controller does not support this frequency.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_I2C_MASTER_PROTOCOL_SET_BUS_FREQUENCY) (
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IN CONST EFI_I2C_MASTER_PROTOCOL *This,
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IN OUT UINTN *BusClockHertz
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);
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/**
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Reset the I2C controller and configure it for use
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This routine must be called at or below TPL_NOTIFY.
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The I2C controller is reset. The caller must call SetBusFrequench() after
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calling Reset().
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@param[in] This Pointer to an EFI_I2C_MASTER_PROTOCOL structure.
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@retval EFI_SUCCESS The reset completed successfully.
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@retval EFI_ALREADY_STARTED The controller is busy with another transaction.
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@retval EFI_DEVICE_ERROR The reset operation failed.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_I2C_MASTER_PROTOCOL_RESET) (
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IN CONST EFI_I2C_MASTER_PROTOCOL *This
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);
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/**
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Start an I2C transaction on the host controller.
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This routine must be called at or below TPL_NOTIFY. For synchronous
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requests this routine must be called at or below TPL_CALLBACK.
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This function initiates an I2C transaction on the controller. To
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enable proper error handling by the I2C protocol stack, the I2C
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master protocol does not support queuing but instead only manages
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one I2C transaction at a time. This API requires that the I2C bus
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is in the correct configuration for the I2C transaction.
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The transaction is performed by sending a start-bit and selecting the
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I2C device with the specified I2C slave address and then performing
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the specified I2C operations. When multiple operations are requested
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they are separated with a repeated start bit and the slave address.
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The transaction is terminated with a stop bit.
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When Event is NULL, StartRequest operates synchronously and returns
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the I2C completion status as its return value.
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When Event is not NULL, StartRequest synchronously returns EFI_SUCCESS
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indicating that the I2C transaction was started asynchronously. The
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transaction status value is returned in the buffer pointed to by
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I2cStatus upon the completion of the I2C transaction when I2cStatus
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is not NULL. After the transaction status is returned the Event is
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signaled.
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Note: The typical consumer of this API is the I2C host protocol.
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Extreme care must be taken by other consumers of this API to prevent
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confusing the third party I2C drivers due to a state change at the
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I2C device which the third party I2C drivers did not initiate. I2C
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platform specific code may use this API within these guidelines.
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@param[in] This Pointer to an EFI_I2C_MASTER_PROTOCOL structure.
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@param[in] SlaveAddress Address of the device on the I2C bus. Set the
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I2C_ADDRESSING_10_BIT when using 10-bit addresses,
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clear this bit for 7-bit addressing. Bits 0-6
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are used for 7-bit I2C slave addresses and bits
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0-9 are used for 10-bit I2C slave addresses.
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@param[in] RequestPacket Pointer to an EFI_I2C_REQUEST_PACKET
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structure describing the I2C transaction.
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@param[in] Event Event to signal for asynchronous transactions,
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NULL for asynchronous transactions
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@param[out] I2cStatus Optional buffer to receive the I2C transaction
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completion status
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@retval EFI_SUCCESS The asynchronous transaction was successfully
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started when Event is not NULL.
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@retval EFI_SUCCESS The transaction completed successfully when
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Event is NULL.
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@retval EFI_ALREADY_STARTED The controller is busy with another transaction.
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@retval EFI_BAD_BUFFER_SIZE The RequestPacket->LengthInBytes value is too
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large.
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@retval EFI_DEVICE_ERROR There was an I2C error (NACK) during the
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transaction.
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@retval EFI_INVALID_PARAMETER RequestPacket is NULL
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@retval EFI_NOT_FOUND Reserved bit set in the SlaveAddress parameter
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@retval EFI_NO_RESPONSE The I2C device is not responding to the slave
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address. EFI_DEVICE_ERROR will be returned if
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the controller cannot distinguish when the NACK
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occurred.
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@retval EFI_OUT_OF_RESOURCES Insufficient memory for I2C transaction
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@retval EFI_UNSUPPORTED The controller does not support the requested
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transaction.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_I2C_MASTER_PROTOCOL_START_REQUEST) (
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IN CONST EFI_I2C_MASTER_PROTOCOL *This,
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IN UINTN SlaveAddress,
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IN EFI_I2C_REQUEST_PACKET *RequestPacket,
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IN EFI_EVENT Event OPTIONAL,
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OUT EFI_STATUS *I2cStatus OPTIONAL
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);
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///
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/// I2C master mode protocol
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///
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/// This protocol manipulates the I2C host controller to perform transactions as a
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/// master on the I2C bus using the current state of any switches or multiplexers
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/// in the I2C bus.
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///
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struct _EFI_I2C_MASTER_PROTOCOL {
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///
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/// Set the clock frequency for the I2C bus.
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///
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EFI_I2C_MASTER_PROTOCOL_SET_BUS_FREQUENCY SetBusFrequency;
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///
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/// Reset the I2C host controller.
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///
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EFI_I2C_MASTER_PROTOCOL_RESET Reset;
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///
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/// Start an I2C transaction in master mode on the host controller.
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///
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EFI_I2C_MASTER_PROTOCOL_START_REQUEST StartRequest;
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///
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/// Pointer to an EFI_I2C_CONTROLLER_CAPABILITIES data structure containing
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/// the capabilities of the I2C host controller.
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///
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CONST EFI_I2C_CONTROLLER_CAPABILITIES *I2cControllerCapabilities;
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};
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extern EFI_GUID gEfiI2cMasterProtocolGuid;
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#endif // __I2C_MASTER_H__
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