2e01a5c128
The definition of IA32_MAP_ATTRIBUTE has 64 bits, and one of the bit field PageTableBaseAddress is from bit 12 to bit 52. This means if the compiler treats the 64bits value as two UINT32 value, the field PageTableBaseAddress spans two UINT32 value. That's why when building in NOOPT mode in IA32, the below issue is noticed: unresolved external symbol __allshl This patch fix the build failure by seperate field PageTableBaseAddress into two fields, make sure no field spans two UINT32 value. Cc: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Tested-by: Gerd Hoffmann <kraxel@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Ray Ni <ray.ni@intel.com>
136 lines
6.4 KiB
C
136 lines
6.4 KiB
C
/** @file
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Public include file for PageTableLib library.
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Copyright (c) 2022 - 2023, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef PAGE_TABLE_LIB_H_
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#define PAGE_TABLE_LIB_H_
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typedef union {
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struct {
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UINT32 Present : 1; // 0 = Not present in memory, 1 = Present in memory
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UINT32 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write
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UINT32 UserSupervisor : 1; // 0 = Supervisor, 1=User
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UINT32 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching
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UINT32 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached
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UINT32 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU)
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UINT32 Dirty : 1; // 0 = Not dirty, 1 = Dirty (set by CPU)
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UINT32 Pat : 1; // PAT
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UINT32 Global : 1; // 0 = Not global, 1 = Global (if CR4.PGE = 1)
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UINT32 Reserved1 : 3; // Ignored
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UINT32 PageTableBaseAddressLow : 20; // Page Table Base Address Low
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UINT32 PageTableBaseAddressHigh : 20; // Page Table Base Address High
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UINT32 Reserved2 : 7; // Ignored
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UINT32 ProtectionKey : 4; // Protection key
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UINT32 Nx : 1; // No Execute bit
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} Bits;
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UINT64 Uint64;
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} IA32_MAP_ATTRIBUTE;
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#define IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS_MASK 0xFFFFFFFFFF000ull
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#define IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS(pa) ((pa)->Uint64 & IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS_MASK)
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#define IA32_MAP_ATTRIBUTE_ATTRIBUTES(pa) ((pa)->Uint64 & ~IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS_MASK)
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//
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// Below enum follows "4.1.1 Four Paging Modes" in Chapter 4 Paging of SDM Volume 3.
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// Page1GB is only supported in 4-level and 5-level.
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//
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typedef enum {
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Paging32bit,
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//
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// High byte in paging mode indicates the max levels of the page table.
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// Low byte in paging mode indicates the max level that can be a leaf entry.
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//
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PagingPae = 0x0302,
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Paging4Level = 0x0402,
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Paging4Level1GB = 0x0403,
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Paging5Level = 0x0502,
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Paging5Level1GB = 0x0503,
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PagingModeMax
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} PAGING_MODE;
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/**
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Create or update page table to map [LinearAddress, LinearAddress + Length) with specified attribute.
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@param[in, out] PageTable The pointer to the page table to update, or pointer to NULL if a new page table is to be created.
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@param[in] PagingMode The paging mode.
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@param[in] Buffer The free buffer to be used for page table creation/updating.
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@param[in, out] BufferSize The buffer size.
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On return, the remaining buffer size.
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The free buffer is used from the end so caller can supply the same Buffer pointer with an updated
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BufferSize in the second call to this API.
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@param[in] LinearAddress The start of the linear address range.
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@param[in] Length The length of the linear address range.
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@param[in] Attribute The attribute of the linear address range.
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All non-reserved fields in IA32_MAP_ATTRIBUTE are supported to set in the page table.
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Page table entries that map the linear address range are reset to 0 before set to the new attribute
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when a new physical base address is set.
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@param[in] Mask The mask used for attribute. The corresponding field in Attribute is ignored if that in Mask is 0.
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@param[out] IsModified TRUE means page table is modified. FALSE means page table is not modified.
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@retval RETURN_UNSUPPORTED PagingMode is not supported.
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@retval RETURN_INVALID_PARAMETER PageTable, BufferSize, Attribute or Mask is NULL.
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@retval RETURN_INVALID_PARAMETER For non-present range, Mask->Bits.Present is 0 but some other attributes are provided.
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@retval RETURN_INVALID_PARAMETER For non-present range, Mask->Bits.Present is 1, Attribute->Bits.Present is 1 but some other attributes are not provided.
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@retval RETURN_INVALID_PARAMETER For non-present range, Mask->Bits.Present is 1, Attribute->Bits.Present is 0 but some other attributes are provided.
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@retval RETURN_INVALID_PARAMETER For present range, Mask->Bits.Present is 1, Attribute->Bits.Present is 0 but some other attributes are provided.
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@retval RETURN_INVALID_PARAMETER *BufferSize is not multiple of 4KB.
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@retval RETURN_BUFFER_TOO_SMALL The buffer is too small for page table creation/updating.
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BufferSize is updated to indicate the expected buffer size.
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Caller may still get RETURN_BUFFER_TOO_SMALL with the new BufferSize.
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@retval RETURN_SUCCESS PageTable is created/updated successfully or the input Length is 0.
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**/
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RETURN_STATUS
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EFIAPI
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PageTableMap (
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IN OUT UINTN *PageTable OPTIONAL,
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IN PAGING_MODE PagingMode,
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IN VOID *Buffer,
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IN OUT UINTN *BufferSize,
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IN UINT64 LinearAddress,
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IN UINT64 Length,
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IN IA32_MAP_ATTRIBUTE *Attribute,
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IN IA32_MAP_ATTRIBUTE *Mask,
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OUT BOOLEAN *IsModified OPTIONAL
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);
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typedef struct {
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UINT64 LinearAddress;
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UINT64 Length;
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IA32_MAP_ATTRIBUTE Attribute;
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} IA32_MAP_ENTRY;
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/**
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Parse page table.
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@param[in] PageTable Pointer to the page table.
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@param[in] PagingMode The paging mode.
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@param[out] Map Return an array that describes multiple linear address ranges.
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@param[in, out] MapCount On input, the maximum number of entries that Map can hold.
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On output, the number of entries in Map.
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@retval RETURN_UNSUPPORTED PageLevel is not 5 or 4.
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@retval RETURN_INVALID_PARAMETER MapCount is NULL.
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@retval RETURN_INVALID_PARAMETER *MapCount is not 0 but Map is NULL.
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@retval RETURN_BUFFER_TOO_SMALL *MapCount is too small.
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@retval RETURN_SUCCESS Page table is parsed successfully.
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**/
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RETURN_STATUS
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EFIAPI
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PageTableParse (
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IN UINTN PageTable,
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IN PAGING_MODE PagingMode,
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IN IA32_MAP_ENTRY *Map,
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IN OUT UINTN *MapCount
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);
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#endif
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