98419ef4b9
2. Used EdkPciIncompatibleDeviceSupportLib in PciBus driver. 3. Redirect all Pci Configuration access to new APIs added in PciLib.c for PciBus driver. 4. Added one PCD PcdIncompatibleDeviceSupportMask in EdkModulePkg.spd to provide mask of PCI devices incompatibility check. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2562 6f19259b-4bc3-4df7-8a09-765794883524
210 lines
5.3 KiB
C
210 lines
5.3 KiB
C
/** @file
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The incompatible PCI device list
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Copyright (c) 2007 Intel Corporation. All rights reserved. <BR>
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This software and associated documentation (if any) is furnished
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under a license and may only be used or copied in accordance
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with the terms of the license. Except as permitted by such
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license, no part of this software or documentation may be
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reproduced, stored in a retrieval system, or transmitted in any
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form or by any means without the express written consent of
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Intel Corporation.
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**/
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#ifndef _EFI_INCOMPATIBLE_PCI_DEVICE_LIST_H
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#define _EFI_INCOMPATIBLE_PCI_DEVICE_LIST_H
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#include <IndustryStandard/pci22.h>
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#include <IndustryStandard/Acpi.h>
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#define PCI_DEVICE_ID(VendorId, DeviceId, Revision, SubVendorId, SubDeviceId) \
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VendorId, DeviceId, Revision, SubVendorId, SubDeviceId
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#define PCI_BAR_TYPE_IO ACPI_ADDRESS_SPACE_TYPE_IO
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#define PCI_BAR_TYPE_MEM ACPI_ADDRESS_SPACE_TYPE_MEM
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#define DEVICE_INF_TAG 0xFFF2
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#define DEVICE_RES_TAG 0xFFF1
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#define LIST_END_TAG 0x0000
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//
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// descriptor for access width of incompatible PCI device
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//
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typedef struct {
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UINT64 AccessType;
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UINT64 AccessWidth;
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EFI_PCI_REGISTER_ACCESS_DATA PciRegisterAccessData;
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} EFI_PCI_REGISTER_ACCESS_DESCRIPTOR;
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//
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// descriptor for register value of incompatible PCI device
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//
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typedef struct {
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UINT64 AccessType;
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UINT64 Offset;
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EFI_PCI_REGISTER_VALUE_DATA PciRegisterValueData;
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} EFI_PCI_REGISTER_VALUE_DESCRIPTOR;
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//
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// the incompatible PCI devices list for ACPI resource
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//
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GLOBAL_REMOVE_IF_UNREFERENCED UINT64 IncompatiblePciDeviceListForResource[] = {
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//
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// DEVICE_INF_TAG,
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// PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),
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// DEVICE_RES_TAG,
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// ResType, GFlag , SFlag, Granularity, RangeMin,
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// RangeMax, Offset, AddrLen
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//
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//
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// Device Adaptec 9004
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//
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DEVICE_INF_TAG,
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PCI_DEVICE_ID(0x9004, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
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DEVICE_RES_TAG,
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PCI_BAR_TYPE_IO,
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PCI_ACPI_UNUSED,
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PCI_ACPI_UNUSED,
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PCI_ACPI_UNUSED,
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PCI_ACPI_UNUSED,
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PCI_BAR_EVEN_ALIGN,
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PCI_BAR_ALL,
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PCI_BAR_NOCHANGE,
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//
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// Device Adaptec 9005
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//
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DEVICE_INF_TAG,
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PCI_DEVICE_ID(0x9005, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
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DEVICE_RES_TAG,
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PCI_BAR_TYPE_IO,
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PCI_ACPI_UNUSED,
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PCI_ACPI_UNUSED,
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PCI_ACPI_UNUSED,
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PCI_ACPI_UNUSED,
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PCI_BAR_EVEN_ALIGN,
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PCI_BAR_ALL,
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PCI_BAR_NOCHANGE,
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//
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// Device QLogic 1007
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//
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DEVICE_INF_TAG,
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PCI_DEVICE_ID(0x1077, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
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DEVICE_RES_TAG,
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PCI_BAR_TYPE_IO,
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PCI_ACPI_UNUSED,
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PCI_ACPI_UNUSED,
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PCI_ACPI_UNUSED,
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PCI_ACPI_UNUSED,
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PCI_BAR_EVEN_ALIGN,
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PCI_BAR_ALL,
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PCI_BAR_NOCHANGE,
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//
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// Device Agilent 103C
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//
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DEVICE_INF_TAG,
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PCI_DEVICE_ID(0x103C, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
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DEVICE_RES_TAG,
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PCI_BAR_TYPE_IO,
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PCI_ACPI_UNUSED,
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PCI_ACPI_UNUSED,
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PCI_ACPI_UNUSED,
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PCI_ACPI_UNUSED,
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PCI_BAR_EVEN_ALIGN,
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PCI_BAR_ALL,
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PCI_BAR_NOCHANGE,
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//
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// Device Agilent 15BC
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//
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DEVICE_INF_TAG,
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PCI_DEVICE_ID(0x15BC, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
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DEVICE_RES_TAG,
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PCI_BAR_TYPE_IO,
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PCI_ACPI_UNUSED,
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PCI_ACPI_UNUSED,
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PCI_ACPI_UNUSED,
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PCI_ACPI_UNUSED,
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PCI_BAR_EVEN_ALIGN,
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PCI_BAR_ALL,
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PCI_BAR_NOCHANGE,
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//
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// The end of the list
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//
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LIST_END_TAG
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};
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//
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// the incompatible PCI devices list for the values of configuration registers
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//
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GLOBAL_REMOVE_IF_UNREFERENCED UINT64 IncompatiblePciDeviceListForRegister[] = {
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//
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// DEVICE_INF_TAG,
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// PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),
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// PCI_RES_TAG,
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// PCI_ACCESS_TYPE, PCI_CONFIG_ADDRESS,
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// AND_VALUE, OR_VALUE
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//
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// Device Lava 0x1407, DeviceId 0x0110
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//
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DEVICE_INF_TAG,
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PCI_DEVICE_ID(0x1407, 0x0110, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
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DEVICE_RES_TAG,
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PCI_REGISTER_READ,
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PCI_CAPBILITY_POINTER_OFFSET,
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0xffffff00,
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VALUE_NOCARE,
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//
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// Device Lava 0x1407, DeviceId 0x0111
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//
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DEVICE_INF_TAG,
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PCI_DEVICE_ID(0x1407, 0x0111, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
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DEVICE_RES_TAG,
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PCI_REGISTER_READ,
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PCI_CAPBILITY_POINTER_OFFSET,
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0xffffff00,
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VALUE_NOCARE,
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//
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// The end of the list
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//
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LIST_END_TAG
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};
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//
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// the incompatible PCI devices list for the access width of configuration registers
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//
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GLOBAL_REMOVE_IF_UNREFERENCED UINT64 DeviceListForAccessWidth[] = {
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//
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// DEVICE_INF_TAG,
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// PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),
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// DEVICE_RES_TAG,
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// PCI_ACCESS_TYPE, PCI_ACCESS_WIDTH,
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// START_ADDRESS, END_ADDRESS,
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// ACTUAL_PCI_ACCESS_WIDTH,
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//
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//
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// Sample Device
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//
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//DEVICE_INF_TAG,
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//PCI_DEVICE_ID(0xXXXX, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
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//DEVICE_RES_TAG,
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//PCI_REGISTER_READ,
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//EfiPciWidthUint8,
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//0,
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//0xFF,
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//EfiPciWidthUint32,
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//
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//
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// The end of the list
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//
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LIST_END_TAG
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};
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#endif
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