Add TCPM I2C bus and initialize it

This commit is contained in:
Jeremy Soller 2020-02-13 10:34:28 -07:00
parent fc7fa1f11c
commit 17cce5687f
No known key found for this signature in database
GPG Key ID: E988B49EE78A7FB1
9 changed files with 93 additions and 2 deletions

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@ -19,6 +19,9 @@ CFLAGS+=-DI2C_DEBUGGER=0x76
# Set battery I2C bus
CFLAGS+=-DI2C_SMBUS=I2C_4
# Set type-c port manager I2C bus
CFLAGS+=-DI2C_TCPM=I2C_1
# Set scratch ROM parameters
SCRATCH_OFFSET=1024
SCRATCH_SIZE=1024

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@ -11,6 +11,7 @@ struct Gpio __code CCD_EN = GPIO(D, 1);
struct Gpio __code DD_ON = GPIO(E, 4);
struct Gpio __code EC_EN = GPIO(J, 6);
struct Gpio __code EC_RSMRST_N = GPIO(E, 5);
struct Gpio __code EC_SMD_EN_N = GPIO(I, 6);
struct Gpio __code LED_ACIN = GPIO(C, 7);
struct Gpio __code LED_PWR = GPIO(D, 0);
struct Gpio __code LID_SW_N = GPIO(B, 1);
@ -91,9 +92,9 @@ void gpio_init() {
// ALL_SYS_PWRGD
GPCRC0 = GPIO_IN;
// SMB_CLK_EC
GPCRC1 = GPIO_OUT;
GPCRC1 = GPIO_ALT;
// SMB_DATA_EC
GPCRC2 = GPIO_OUT;
GPCRC2 = GPIO_ALT;
// PCIE_WAKE#
GPCRC3 = GPIO_IN;
// CNVI_DET#

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@ -22,6 +22,7 @@ extern struct Gpio __code CCD_EN;
extern struct Gpio __code DD_ON;
extern struct Gpio __code EC_EN;
extern struct Gpio __code EC_RSMRST_N;
extern struct Gpio __code EC_SMD_EN_N;
extern struct Gpio __code LED_ACIN;
extern struct Gpio __code LED_PWR;
extern struct Gpio __code LID_SW_N;

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@ -0,0 +1,11 @@
#ifndef _BOARD_TCPM_H
#define _BOARD_TCPM_H
#include <ec/smbus.h>
void tcpm_init(void);
int tcpm_read(uint8_t address, uint8_t command, uint16_t * data);
int tcpm_write(uint8_t address, uint8_t command, uint16_t data);
void tcpm_event(void);
#endif // _BOARD_TCPM_H

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@ -18,6 +18,7 @@
#include <board/ps2.h>
#include <board/pwm.h>
#include <board/smbus.h>
#include <board/tcpm.h>
#include <common/debug.h>
#include <common/macro.h>
@ -47,6 +48,7 @@ void init(void) {
pmc_init();
pwm_init();
smbus_init();
tcpm_init();
//TODO: INTC
}
@ -112,6 +114,8 @@ void main(void) {
peci_event();
// Updates battery status
battery_event();
// Updates type-c port
tcpm_event();
}
// Handles ACPI communication
pmc_event(&PMC_1);

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@ -0,0 +1,23 @@
#include <board/gpio.h>
#include <board/tcpm.h>
#include <ec/i2c.h>
void tcpm_init(void) {
// Set up for i2c usage
i2c_reset(&I2C_TCPM, true);
// Enable connection to TCPC
*(EC_SMD_EN_N.control) = GPIO_OUT;
}
int tcpm_read(uint8_t address, uint8_t command, uint16_t * data) {
return i2c_get(&I2C_TCPM, address, command, (uint8_t *)data, 2);
}
int tcpm_write(uint8_t address, uint8_t command, uint16_t data) {
return i2c_set(&I2C_TCPM, address, command, (uint8_t *)&data, 2);
}
void tcpm_event(void) {
//TODO
}

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@ -14,6 +14,14 @@ struct I2C {
volatile uint8_t * trasla;
};
struct I2C __code I2C_1 = {
.hosta = HOSTAB,
.hoctl = HOCTLB,
.hoctl2 = HOCTL2B,
.hobdb = HOBDBB,
.trasla = TRASLAB,
};
struct I2C __code I2C_4 = {
.hosta = HOSTAE,
.hoctl = HOCTLE,

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@ -3,6 +3,7 @@
#include <common/i2c.h>
extern struct I2C __code I2C_1;
extern struct I2C __code I2C_4;
void i2c_reset(struct I2C * i2c, bool kill);

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@ -52,6 +52,45 @@ volatile uint8_t __xdata __at(0x1C3F) RESLADR2A;
// SMCLK timing setting for channel A
volatile uint8_t __xdata __at(0x1C40) SCLKTSA;
// Host status for channel B
volatile uint8_t __xdata __at(0x1C11) HOSTAB;
// Host control for channel B
volatile uint8_t __xdata __at(0x1C12) HOCTLB;
// Host command for channel B
volatile uint8_t __xdata __at(0x1C13) HOCMDB;
// Transmit slave address for channel B
volatile uint8_t __xdata __at(0x1C14) TRASLAB;
// Host data 0 for channel B
volatile uint8_t __xdata __at(0x1C15) D0REGB;
// Host data 1 for channel B
volatile uint8_t __xdata __at(0x1C16) D1REGB;
// Host block data byte for channel B
volatile uint8_t __xdata __at(0x1C17) HOBDBB;
// Packet error check for channel B
volatile uint8_t __xdata __at(0x1C18) PECERCB;
// Receive slave address for channel B
volatile uint8_t __xdata __at(0x1C19) RESLADRB;
// Slave data for channel B
volatile uint8_t __xdata __at(0x1C1A) SLDAB;
// SMBus pin control for channel B
volatile uint8_t __xdata __at(0x1C1B) SMBPCTLB;
// Slave status for channel B
volatile uint8_t __xdata __at(0x1C1C) SLSTAB;
// Slave interrupt control for channel B
volatile uint8_t __xdata __at(0x1C1D) SICRB;
// Notify device address for channel B
volatile uint8_t __xdata __at(0x1C1E) NDADRB;
// Notify data low byte for channel A
volatile uint8_t __xdata __at(0x1C1F) NDLBB;
// Notify data high byte for channel B
volatile uint8_t __xdata __at(0x1C20) NDHBB;
// Host control 2 for channel B
volatile uint8_t __xdata __at(0x1C21) HOCTL2B;
// Receive slave address 2 for channel B
volatile uint8_t __xdata __at(0x1C44) RESLADR2B;
// SMCLK timing setting for channel B
volatile uint8_t __xdata __at(0x1C41) SCLKTSB;
// Host status for channel E
volatile uint8_t __xdata __at(0x1CA0) HOSTAE;
// Host control for channel E