Fix fan turning on when powering on or resuming from suspend
This commit is contained in:
		@@ -1,6 +1,7 @@
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#include <stdbool.h>
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#include <board/peci.h>
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#include <board/power.h>
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#include <common/debug.h>
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#include <common/macro.h>
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#include <ec/gpio.h>
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@@ -77,40 +78,49 @@ void peci_init(void) {
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// PECI information can be found here: https://www.intel.com/content/dam/www/public/us/en/documents/design-guides/core-i7-lga-2011-guide.pdf
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void peci_event(void) {
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    // Wait for completion
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    while (HOSTAR & 1) {}
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    // Clear status
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    HOSTAR = HOSTAR;
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    if (power_state == POWER_STATE_S0) {
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        // Use PECI if in S0 state
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    // Enable PECI, clearing data fifo's
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    HOCTLR = (1 << 5) | (1 << 3);
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    // Set address to default
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    HOTRADDR = 0x30;
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    // Set write length
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    HOWRLR = 1;
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    // Set read length
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    HORDLR = 2;
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    // Set command
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    HOCMDR = 1;
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    // Start transaction
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    HOCTLR |= 1;
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        // Wait for completion
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        while (HOSTAR & 1) {}
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        // Clear status
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        HOSTAR = HOSTAR;
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    // Wait for completion
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    while (HOSTAR & 1) {}
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        // Enable PECI, clearing data fifo's
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        HOCTLR = (1 << 5) | (1 << 3);
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        // Set address to default
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        HOTRADDR = 0x30;
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        // Set write length
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        HOWRLR = 1;
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        // Set read length
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        HORDLR = 2;
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        // Set command
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        HOCMDR = 1;
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        // Start transaction
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        HOCTLR |= 1;
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    if (HOSTAR & (1 << 1)) {
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        // Use result if finished successfully
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        uint8_t low = HORDDR;
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        uint8_t high = HORDDR;
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        peci_offset = ((int16_t)high << 8) | (int16_t)low;
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        // Wait for completion
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        while (HOSTAR & 1) {}
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        peci_temp = PECI_TEMP(T_JUNCTION) + peci_offset;
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        peci_duty = fan_duty(peci_temp);
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        if (HOSTAR & (1 << 1)) {
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            // Use result if finished successfully
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            uint8_t low = HORDDR;
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            uint8_t high = HORDDR;
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            peci_offset = ((int16_t)high << 8) | (int16_t)low;
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            peci_temp = PECI_TEMP(T_JUNCTION) + peci_offset;
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            peci_duty = fan_duty(peci_temp);
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        } else {
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            // Default to 50% if there is an error
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            peci_offset = 0;
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            peci_temp = 0;
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            peci_duty = PWM_DUTY(50);
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        }
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    } else {
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        // Default to 50% if there is an error
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        // Turn fan off if not in S0 state
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        peci_offset = 0;
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        peci_temp = 0;
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        peci_duty = PWM_DUTY(50);
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        peci_duty = PWM_DUTY(0);
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    }
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    if (peci_duty != DCR2) {
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@@ -372,7 +372,7 @@ void power_event(void) {
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    rst_last = rst_new;
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    #if LEVEL >= LEVEL_DEBUG
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        static bool sus_last = false;
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        static bool sus_last = true;
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        bool sus_new = gpio_get(&SLP_SUS_N);
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        if (!sus_new && sus_last) {
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            DEBUG("%02X: SLP_SUS# asserted\n", main_cycle);
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@@ -1,6 +1,7 @@
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#include <stdbool.h>
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#include <board/peci.h>
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#include <board/power.h>
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#include <common/debug.h>
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#include <common/macro.h>
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#include <ec/gpio.h>
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@@ -77,40 +78,49 @@ void peci_init(void) {
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// PECI information can be found here: https://www.intel.com/content/dam/www/public/us/en/documents/design-guides/core-i7-lga-2011-guide.pdf
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void peci_event(void) {
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    // Wait for completion
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    while (HOSTAR & 1) {}
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    // Clear status
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    HOSTAR = HOSTAR;
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    if (power_state == POWER_STATE_S0) {
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        // Use PECI if in S0 state
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    // Enable PECI, clearing data fifo's
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    HOCTLR = (1 << 5) | (1 << 3);
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    // Set address to default
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    HOTRADDR = 0x30;
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    // Set write length
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    HOWRLR = 1;
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    // Set read length
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    HORDLR = 2;
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    // Set command
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    HOCMDR = 1;
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    // Start transaction
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    HOCTLR |= 1;
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        // Wait for completion
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        while (HOSTAR & 1) {}
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        // Clear status
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        HOSTAR = HOSTAR;
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    // Wait for completion
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    while (HOSTAR & 1) {}
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        // Enable PECI, clearing data fifo's
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        HOCTLR = (1 << 5) | (1 << 3);
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        // Set address to default
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        HOTRADDR = 0x30;
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        // Set write length
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        HOWRLR = 1;
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        // Set read length
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        HORDLR = 2;
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        // Set command
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        HOCMDR = 1;
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        // Start transaction
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        HOCTLR |= 1;
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    if (HOSTAR & (1 << 1)) {
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        // Use result if finished successfully
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        uint8_t low = HORDDR;
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        uint8_t high = HORDDR;
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        peci_offset = ((int16_t)high << 8) | (int16_t)low;
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        // Wait for completion
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        while (HOSTAR & 1) {}
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        peci_temp = PECI_TEMP(T_JUNCTION) + peci_offset;
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        peci_duty = fan_duty(peci_temp);
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        if (HOSTAR & (1 << 1)) {
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            // Use result if finished successfully
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            uint8_t low = HORDDR;
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            uint8_t high = HORDDR;
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            peci_offset = ((int16_t)high << 8) | (int16_t)low;
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            peci_temp = PECI_TEMP(T_JUNCTION) + peci_offset;
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            peci_duty = fan_duty(peci_temp);
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        } else {
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            // Default to 50% if there is an error
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            peci_offset = 0;
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            peci_temp = 0;
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            peci_duty = PWM_DUTY(50);
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        }
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    } else {
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        // Default to 50% if there is an error
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        // Turn fan off if not in S0 state
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        peci_offset = 0;
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        peci_temp = 0;
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        peci_duty = PWM_DUTY(50);
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        peci_duty = PWM_DUTY(0);
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    }
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    if (peci_duty != DCR2) {
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@@ -369,7 +369,7 @@ void power_event(void) {
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    rst_last = rst_new;
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    #if LEVEL >= LEVEL_DEBUG
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        static bool sus_last = false;
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        static bool sus_last = true;
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        bool sus_new = gpio_get(&SLP_SUS_N);
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        if (!sus_new && sus_last) {
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            DEBUG("%02X: SLP_SUS# asserted\n", main_cycle);
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@@ -1,6 +1,7 @@
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#include <stdbool.h>
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#include <board/peci.h>
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#include <board/power.h>
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#include <common/debug.h>
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#include <common/macro.h>
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#include <ec/gpio.h>
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@@ -77,40 +78,49 @@ void peci_init(void) {
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		||||
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// PECI information can be found here: https://www.intel.com/content/dam/www/public/us/en/documents/design-guides/core-i7-lga-2011-guide.pdf
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void peci_event(void) {
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    // Wait for completion
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    while (HOSTAR & 1) {}
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    // Clear status
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    HOSTAR = HOSTAR;
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    if (power_state == POWER_STATE_S0) {
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        // Use PECI if in S0 state
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    // Enable PECI, clearing data fifo's
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		||||
    HOCTLR = (1 << 5) | (1 << 3);
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    // Set address to default
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    HOTRADDR = 0x30;
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    // Set write length
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    HOWRLR = 1;
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    // Set read length
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    HORDLR = 2;
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    // Set command
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    HOCMDR = 1;
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    // Start transaction
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    HOCTLR |= 1;
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        // Wait for completion
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        while (HOSTAR & 1) {}
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        // Clear status
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        HOSTAR = HOSTAR;
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    // Wait for completion
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    while (HOSTAR & 1) {}
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        // Enable PECI, clearing data fifo's
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        HOCTLR = (1 << 5) | (1 << 3);
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        // Set address to default
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        HOTRADDR = 0x30;
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        // Set write length
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        HOWRLR = 1;
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        // Set read length
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        HORDLR = 2;
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        // Set command
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        HOCMDR = 1;
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        // Start transaction
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        HOCTLR |= 1;
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    if (HOSTAR & (1 << 1)) {
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        // Use result if finished successfully
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        uint8_t low = HORDDR;
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        uint8_t high = HORDDR;
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        peci_offset = ((int16_t)high << 8) | (int16_t)low;
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        // Wait for completion
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        while (HOSTAR & 1) {}
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        peci_temp = PECI_TEMP(T_JUNCTION) + peci_offset;
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        peci_duty = fan_duty(peci_temp);
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        if (HOSTAR & (1 << 1)) {
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            // Use result if finished successfully
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            uint8_t low = HORDDR;
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            uint8_t high = HORDDR;
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            peci_offset = ((int16_t)high << 8) | (int16_t)low;
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            peci_temp = PECI_TEMP(T_JUNCTION) + peci_offset;
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            peci_duty = fan_duty(peci_temp);
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        } else {
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            // Default to 50% if there is an error
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            peci_offset = 0;
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            peci_temp = 0;
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            peci_duty = PWM_DUTY(50);
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        }
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    } else {
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        // Default to 50% if there is an error
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        // Turn fan off if not in S0 state
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        peci_offset = 0;
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        peci_temp = 0;
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        peci_duty = PWM_DUTY(50);
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        peci_duty = PWM_DUTY(0);
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    }
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    if (peci_duty != DCR2) {
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@@ -369,7 +369,7 @@ void power_event(void) {
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    rst_last = rst_new;
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    #if LEVEL >= LEVEL_DEBUG
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        static bool sus_last = false;
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        static bool sus_last = true;
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        bool sus_new = gpio_get(&SLP_SUS_N);
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        if (!sus_new && sus_last) {
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            DEBUG("%02X: SLP_SUS# asserted\n", main_cycle);
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