peci: Check PECI available based on eSPI usage
If eSPI is used, use Virtual Wires to determine if PECI is available. Fixes incorrectly reporting PECI as available on systems using S0ix, as the CPU would be in C10 but `PLTRST#` would not be asserted. Requires enabling `HOST_C10` reporting in FSP-S. Signed-off-by: Tim Crawford <tcrawford@system76.com>
This commit is contained in:
committed by
Jeremy Soller
parent
ebc5168cb0
commit
b63e2092ce
@ -60,13 +60,6 @@ static struct Fan __code FAN = {
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.interpolate = SMOOTH_FANS != 0,
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};
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#if CONFIG_PECI_OVER_ESPI
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// Maximum OOB channel response time in ms
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#define PECI_ESPI_TIMEOUT 10
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void peci_init(void) {}
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// Returns true if peci is available
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bool peci_available(void) {
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// Ensure power state is up to date
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@ -76,6 +69,7 @@ bool peci_available(void) {
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if (power_state != POWER_STATE_S0)
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return false;
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#if CONFIG_BUS_ESPI
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// Currently waiting for host reset, PECI is not available
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if (espi_host_reset)
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return false;
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@ -88,8 +82,19 @@ bool peci_available(void) {
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// If VW_HOST_C10 virtual wire is VWS_HIGH, PECI will wake the CPU
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//TODO: wake CPU every 8 seconds following Intel recommendation?
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return (vw_get(&VW_HOST_C10) != VWS_HIGH);
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#else
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// PECI is available if PLTRST# is high
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return gpio_get(&BUF_PLT_RST_N);
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#endif // CONFIG_BUS_ESPI
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}
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#if CONFIG_PECI_OVER_ESPI
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// Maximum OOB channel response time in ms
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#define PECI_ESPI_TIMEOUT 10
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void peci_init(void) {}
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// Returns true on success, false on error
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bool peci_get_temp(int16_t *data) {
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//TODO: Wait for completion?
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@ -283,19 +288,6 @@ void peci_init(void) {
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PADCTLR = 0x02;
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}
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// Returns true if peci is available
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bool peci_available(void) {
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// Ensure power state is up to date
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update_power_state();
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// Power state must be S0 for PECI to be useful
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if (power_state != POWER_STATE_S0)
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return false;
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// PECI is available if PLTRST# is high
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return gpio_get(&BUF_PLT_RST_N);
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}
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// Returns true on success, false on error
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bool peci_get_temp(int16_t *data) {
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// Wait for any in-progress transaction to complete
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