374 lines
10 KiB
C
374 lines
10 KiB
C
#include <arch/delay.h>
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#include <arch/time.h>
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#include <board/battery.h>
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#include <board/gpio.h>
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#include <board/kbled.h>
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#include <board/lid.h>
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#include <board/power.h>
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#include <board/pmc.h>
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#include <board/pnp.h>
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#include <common/debug.h>
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// Platform does not currently support Deep Sx
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#define DEEP_SX 0
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extern uint8_t main_cycle;
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// VccRTC stable (55%) to RTCRST# high
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#define tPCH01 delay_ms(9)
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// VccDSW stable (95%) to RSMRST# high
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#define tPCH02 delay_ms(10)
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// VccPrimary stable (95%) to RSMRST# high
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#define tPCH03 delay_ms(10)
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// VccRTC stable (90%) to start of VccDSW voltage ramp
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#define tPCH04 delay_ms(9)
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// RTCRST# high to DSW_PWROK
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#define tPCH05 delay_us(1)
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// VccDSW 3.3 stable to VccPrimary 1.05V
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#define tPCH06 delay_us(200)
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// DSW_PWROK high to RSMRST# high
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#define tPCH07 delay_ms(0)
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// SLP_S3# de-assertion to PCH_PWROK assertion
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#define tPCH08 delay_ms(1)
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// SLP_A# high when ASW rails are stable (95%)
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#define tPCH09 delay_ms(2, 4, 8, 16) //TODO
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// PCH_PWROK low to VCCIO dropping 5%
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#define tPCH10 delay_ns(400)
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// SLP_SUS# asserting to VccPRIM dropping 5%
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#define tPCH11 delay_ns(100)
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// RSMRST# asserting to VccPRIM dropping 5%
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#define tPCH12 delay_ns(400)
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// DSW_PWROK falling to any of VccDSW, VccPRIM dropping 5%
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#define tPCH14 delay_ns(400)
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// De-assertion of RSMRST# to de-assertion of ESPI_RESET#
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#if DEEP_SX
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#define tPCH18 delay_us(90)
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#else
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#define tPCH18 delay_ms(95)
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#endif
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// DSW_PWROK assertion to SLP_SUS# de-assertion
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#define tPCH32 delay_ms(95)
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// RSMRST# de-assertion to SUSPWRDNACK valid
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#define tPLT01 delay_ms(200)
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// Enable deep sleep well power
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void power_on_ds5() {
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DEBUG("%02X: power_on_ds5\n", main_cycle);
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#if DEEP_SX
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// See Figure 12-18 in Whiskey Lake Platform Design Guide
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// | VCCRTC | RTCRST# | VCCDSW_3P3 | DSW_PWROK |
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// | tPCH01---------- | | |
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// | tPCH04----------------------- | |
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// | | tPCH05-------------------------- |
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// | | | tPCH02---------------- |
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// tPCH01 and tPCH02 combined make the longest delay
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tPCH01;
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tPCH02;
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// Deep sleep well is a-ok
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gpio_set(PCH_DPWROK_EC, true);
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// Wait for deep sleep well to propogate
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tPCH32;
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#else // DEEP_SX
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// See Figure 12-19 in Whiskey Lake Platform Design Guide
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// | VCCRTC | RTCRST# | VccPRIM |
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// | tPCH01---------- | |
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// | tPCH04-------------------- |
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// tPCH04 is the ideal delay
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tPCH04;
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#endif // DEEP_SX
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}
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// Enable S5 power
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void power_on_s5() {
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DEBUG("%02X: power_on_s5\n", main_cycle);
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#if DEEP_SX
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// See Figure 12-18 in Whiskey Lake Platform Design Guide
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// TODO
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#else // DEEP_SX
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// See Figure 12-19 in Whiskey Lake Platform Design Guide
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// TODO - signal timing graph
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// See Figure 12-25 in Whiskey Lake Platform Design Guide
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// TODO - rail timing graph
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// Enable VCCPRIM_* planes - must be enabled prior to USB power in order to
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// avoid leakage
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gpio_set(&VA_EC_EN, true);
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tPCH06;
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// Enable VDD5
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gpio_set(&DD_ON, true);
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// De-assert SUS_ACK# - TODO is this needed on non-dsx?
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gpio_set(&SUS_PWR_ACK, true);
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tPCH03;
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// Assert DSW_PWROK
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gpio_set(&PCH_DPWROK_EC, true);
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// De-assert RSMRST#
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gpio_set(&EC_RSMRST_N, true);
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// Wait for PCH stability
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tPCH18;
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// Allow processor to control SUSB# and SUSC#
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gpio_set(&EC_EN, true);
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// Wait for SUSPWRDNACK validity
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tPLT01;
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// Extra wait - TODO remove
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delay_ms(200);
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#endif // DEEP_SX
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}
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void power_off_s5() {
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DEBUG("%02X: power_off_s5\n", main_cycle);
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#if DEEP_SX
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// TODO
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#else // DEEP_SX
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// De-assert SYS_PWROK
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gpio_set(&PCH_PWROK_EC, false);
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// De-assert PCH_PWROK
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gpio_set(&PM_PWROK, false);
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// Block processor from controlling SUSB# and SUSC#
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gpio_set(&EC_EN, false);
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// De-assert RSMRST#
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gpio_set(&EC_RSMRST_N, false);
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// Disable VDD5
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gpio_set(&DD_ON, false);
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tPCH12;
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// Disable VCCPRIM_* planes
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gpio_set(&VA_EC_EN, false);
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// De-assert DSW_PWROK
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gpio_set(&PCH_DPWROK_EC, false);
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tPCH14;
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#endif // DEEP_SX
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}
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enum PowerState {
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POWER_STATE_DEFAULT,
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POWER_STATE_DS5,
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POWER_STATE_S5,
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POWER_STATE_DS3,
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POWER_STATE_S3,
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POWER_STATE_S0,
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};
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void power_event(void) {
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static enum PowerState state = POWER_STATE_DEFAULT;
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// Always switch to ds5 if EC is running
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if (state == POWER_STATE_DEFAULT) {
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power_on_ds5();
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state = POWER_STATE_DS5;
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}
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// Check if the adapter line goes low
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static bool ac_send_sci = true;
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static bool ac_last = true;
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bool ac_new = gpio_get(&ACIN_N);
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if (ac_new != ac_last) {
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DEBUG("Power adapter ");
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if (ac_new) {
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DEBUG("unplugged\n");
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battery_charger_disable();
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} else {
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DEBUG("plugged in\n");
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battery_charger_enable();
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}
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battery_debug();
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// Reset main loop cycle to force reading PECI and battery
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main_cycle = 0;
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// Send SCI to update AC and battery information
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ac_send_sci = true;
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}
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if (ac_send_sci) {
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// Send SCI 0x16 for AC detect event
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if (pmc_sci(&PMC_1, 0x16)) {
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ac_send_sci = false;
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}
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}
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ac_last = ac_new;
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// Read power switch state
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static bool ps_last = true;
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bool ps_new = gpio_get(&PWR_SW_N);
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// Disable power button if lid is closed and AC is disconnected
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if (!lid_state && ac_last) {
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ps_new = true;
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}
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if (!ps_new && ps_last) {
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// Ensure press is not spurious
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delay_ms(10);
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if (gpio_get(&PWR_SW_N) != ps_new) {
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DEBUG("%02X: Spurious press\n", main_cycle);
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ps_new = ps_last;
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} else {
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DEBUG("%02X: Power switch press\n", main_cycle);
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// Enable S5 power if necessary, before sending PWR_BTN
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if (state == POWER_STATE_DS5) {
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power_on_s5();
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state = POWER_STATE_S5;
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}
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}
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}
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#if LEVEL >= LEVEL_DEBUG
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else if (ps_new && !ps_last) {
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DEBUG("%02X: Power switch release\n", main_cycle);
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}
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#endif
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ps_last = ps_new;
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// Send power signal to PCH
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gpio_set(&PWR_BTN_N, ps_new);
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#if DEEP_SX
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//TODO
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#else // DEEP_SX
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//TODO: set power state as necessary
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// If system power is good
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static bool pg_last = false;
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bool pg_new = gpio_get(&ALL_SYS_PWRGD);
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if (pg_new && !pg_last) {
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DEBUG("%02X: ALL_SYS_PWRGD asserted\n", main_cycle);
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//TODO: tPLT04;
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// Allow H_VR_READY to set PCH_PWROK
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gpio_set(&PM_PWROK, true);
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// OEM defined delay from ALL_SYS_PWRGD to SYS_PWROK - TODO
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delay_ms(10);
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// Assert SYS_PWROK, system can finally perform PLT_RST# and boot
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gpio_set(&PCH_PWROK_EC, true);
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} else if(!pg_new && pg_last) {
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DEBUG("%02X: ALL_SYS_PWRGD de-asserted\n", main_cycle);
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// De-assert SYS_PWROK
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gpio_set(&PCH_PWROK_EC, false);
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// De-assert PCH_PWROK
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gpio_set(&PM_PWROK, false);
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}
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pg_last = pg_new;
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static bool rst_last = false;
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bool rst_new = gpio_get(&BUF_PLT_RST_N);
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#if LEVEL >= LEVEL_DEBUG
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if (!rst_new && rst_last) {
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DEBUG("%02X: PLT_RST# asserted\n", main_cycle);
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} else
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#endif
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if(rst_new && !rst_last) {
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DEBUG("%02X: PLT_RST# de-asserted\n", main_cycle);
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// LPC was just reset, enable PNP devices
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pnp_enable();
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//TODO: reset KBC and touchpad states
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kbled_reset();
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}
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rst_last = rst_new;
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#if LEVEL >= LEVEL_DEBUG
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static bool s3_last = false;
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bool s3_new = gpio_get(&SUSB_N_PCH);
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if (!s3_new && s3_last) {
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DEBUG("%02X: SLP_S3# asserted\n", main_cycle);
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} else if(s3_new && !s3_last) {
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DEBUG("%02X: SLP_S3# de-asserted\n", main_cycle);
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}
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s3_last = s3_new;
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#endif
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static bool s4_last = false;
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bool s4_new = gpio_get(&SUSC_N_PCH);
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#if LEVEL >= LEVEL_DEBUG
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if (!s4_new && s4_last) {
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DEBUG("%02X: SLP_S4# asserted\n", main_cycle);
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} else if(s4_new && !s4_last) {
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DEBUG("%02X: SLP_S4# de-asserted\n", main_cycle);
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}
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#endif
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s4_last = s4_new;
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#if LEVEL >= LEVEL_DEBUG
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static bool sus_last = false;
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bool sus_new = gpio_get(&SLP_SUS_N);
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if (!sus_new && sus_last) {
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DEBUG("%02X: SLP_SUS# asserted\n", main_cycle);
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} else if (sus_new && !sus_last) {
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DEBUG("%02X: SLP_SUS# de-asserted\n", main_cycle);
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}
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sus_last = sus_new;
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#endif
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// EC must keep VccPRIM powered if SUSPWRDNACK is de-asserted low or system
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// state is S3
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static bool ack_last = false;
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bool ack_new = gpio_get(&SUSWARN_N);
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if (ack_new && !ack_last) {
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DEBUG("%02X: SUSPWRDNACK asserted\n", main_cycle);
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if (s4_new) {
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DEBUG("%02X: entering S3 state\n", main_cycle);
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} else if (state == POWER_STATE_S5) {
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power_off_s5();
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state = POWER_STATE_DS5;
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}
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}
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#if LEVEL >= LEVEL_DEBUG
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else if (!ack_new && ack_last) {
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DEBUG("%02X: SUSPWRDNACK de-asserted\n", main_cycle);
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}
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#endif
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ack_last = ack_new;
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if (rst_new) {
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// CPU on, green light
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gpio_set(&LED_PWR, true);
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gpio_set(&LED_ACIN, false);
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} else if (s4_new) {
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// Suspended, flashing green light
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static uint32_t last_time = 0;
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uint32_t time = time_get();
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if (
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(time < last_time) // overflow
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||
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(time >= (last_time + 1000)) // timeout
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) {
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gpio_set(&LED_PWR, !gpio_get(&LED_PWR));
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last_time = time;
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}
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gpio_set(&LED_ACIN, false);
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} else if (!ac_new) {
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// AC plugged in, orange light
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gpio_set(&LED_PWR, false);
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gpio_set(&LED_ACIN, true);
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} else {
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// CPU off and AC adapter unplugged, no light
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gpio_set(&LED_PWR, false);
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gpio_set(&LED_ACIN, false);
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}
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#endif // DEEP_SX
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}
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