Add lemp9
This commit is contained in:
Jeremy Soller
2
coreboot
2
coreboot
Submodule coreboot updated: f81e2ad385...9c786fa310
@@ -14,5 +14,6 @@
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- [gaze14_1650_17](./gaze14_1650_17) - System76 Gazelle (gaze14)
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- [gaze14_1660ti_15](./gaze14_1660ti_15) - System76 Gazelle (gaze14)
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- [gaze14_1660ti_17](./gaze14_1660ti_17) - System76 Gazelle (gaze14)
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- [lemp9](./lemp9) - System76 Lemur Pro (lemp9)
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- [qemu](./qemu) - QEMU (Virtualization)
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- [thelio-b1](./thelio-b1) - System76 Thelio (thelio-b1)
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@@ -153,6 +153,7 @@ CONFIG_BOARD_SYSTEM76_GALP4=y
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# CONFIG_BOARD_SYSTEM76_GALP2 is not set
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# CONFIG_BOARD_SYSTEM76_GALP3 is not set
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# CONFIG_BOARD_SYSTEM76_GALP3_B is not set
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# CONFIG_BOARD_SYSTEM76_LEMP9 is not set
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# CONFIG_BOARD_SYSTEM76_THELIO_B1 is not set
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# CONFIG_BOARD_SYSTEM76_GALP3_C is not set
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# CONFIG_BOARD_SYSTEM76_DARP5 is not set
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BIN
models/lemp9/FSP/Fsp_M.fd
(Stored with Git LFS)
Normal file
BIN
models/lemp9/FSP/Fsp_M.fd
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/lemp9/FSP/Fsp_S.fd
(Stored with Git LFS)
Normal file
BIN
models/lemp9/FSP/Fsp_S.fd
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/lemp9/FSP/Fsp_T.fd
(Stored with Git LFS)
Normal file
BIN
models/lemp9/FSP/Fsp_T.fd
(Stored with Git LFS)
Normal file
Binary file not shown.
1
models/lemp9/FSP/Include
Symbolic link
1
models/lemp9/FSP/Include
Symbolic link
@@ -0,0 +1 @@
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../../../FSP/CometLakeFspBinPkg/CometLake1/Include
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46
models/lemp9/FSP/LICENSE
Normal file
46
models/lemp9/FSP/LICENSE
Normal file
@@ -0,0 +1,46 @@
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************************************************************************
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** **
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** **
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** IMPORTANT - READ THIS BEFORE COPYING, INSTALLING OR USING **
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** **
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** ANY PORTION OF THE SOFTWARE **
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** **
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************************************************************************
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Copyright (c) 2018 Intel Corporation.
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All rights reserved.
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Redistribution.
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Redistribution and use in binary form, without modification, are permitted
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provided that the following conditions are met:
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- Redistributions must reproduce the above copyright notice and the
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following disclaimer in the documentation and/or other materials provided
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with the distribution.
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- Neither the name of Intel Corporation nor the names of its suppliers
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may be used to endorse or promote products derived from this software
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without specific prior written permission.
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- No reverse engineering, decompilation, or disassembly of this software
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is permitted.
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"Binary form" includes any format that is commonly used for electronic
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conveyance that is a reversible, bit-exact translation of binary
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representation to ASCII or ISO text, for example "uuencode".
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DISCLAIMER.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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THE POSSIBILITY OF SUCH DAMAGE.
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BIN
models/lemp9/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
BIN
models/lemp9/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
Binary file not shown.
9
models/lemp9/IntelGopDriver.inf
Normal file
9
models/lemp9/IntelGopDriver.inf
Normal file
@@ -0,0 +1,9 @@
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[Defines]
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INF_VERSION = 0x00010005
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BASE_NAME = IntelGopDriver
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FILE_GUID = 767222f4-a9f4-41ba-9faa-edaa1405a486
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MODULE_TYPE = UEFI_DRIVER
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VERSION_STRING = 1.0
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[Binaries.X64]
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PE32|IntelGopDriver.efi|*
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14
models/lemp9/README.md
Normal file
14
models/lemp9/README.md
Normal file
@@ -0,0 +1,14 @@
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# System76 Lemur Pro (lemp9)
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https://system76.com/guides/lemp9
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## Contents
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- [EC](./ec.rom)
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- *Read Error: No such file or directory (os error 2)*
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- [FD](./fd.rom)
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- Size: 4 KB
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- HAP: false
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- [ME](./me.rom)
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- Size: 4092 KB
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- Version: 14.0.10.1204
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3
models/lemp9/README.md.in
Normal file
3
models/lemp9/README.md.in
Normal file
@@ -0,0 +1,3 @@
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# System76 Lemur Pro (lemp9)
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https://system76.com/guides/lemp9
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1
models/lemp9/chip.txt
Normal file
1
models/lemp9/chip.txt
Normal file
@@ -0,0 +1 @@
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GD25Q128C
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236
models/lemp9/coreboot-collector.txt
Normal file
236
models/lemp9/coreboot-collector.txt
Normal file
@@ -0,0 +1,236 @@
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## PCI ##
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PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0x9B61, Revision 0x0C
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PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0x9B41, Revision 0x02
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PCI Device: 0000:00:04.0: Class 0x00118000, Vendor 0x8086, Device 0x1903, Revision 0x0C
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PCI Device: 0000:00:12.0: Class 0x00118000, Vendor 0x8086, Device 0x02F9, Revision 0x00
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PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x02ED, Revision 0x00
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PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0x02EF, Revision 0x00
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PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0x02F0, Revision 0x00
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PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0x02E8, Revision 0x00
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PCI Device: 0000:00:15.2: Class 0x000C8000, Vendor 0x8086, Device 0x02EA, Revision 0x00
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PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x02E0, Revision 0x00
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PCI Device: 0000:00:17.0: Class 0x00010400, Vendor 0x8086, Device 0x282A, Revision 0x00
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PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x02BD, Revision 0xF0
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PCI Device: 0000:00:1d.0: Class 0x00060400, Vendor 0x8086, Device 0x02B0, Revision 0xF0
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PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x0284, Revision 0x00
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PCI Device: 0000:00:1f.3: Class 0x00040300, Vendor 0x8086, Device 0x02C8, Revision 0x00
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PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x02A3, Revision 0x00
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PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0x02A4, Revision 0x00
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PCI Device: 0000:01:00.0: Class 0x00FF0000, Vendor 0x10EC, Device 0x522A, Revision 0x01
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## GPIO ##
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400 Series PCH-LP
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GPP_A0 (0x6E,0x00) 0x44000702 0x00000018 0x00000010 0x00000000
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GPP_A1 (0x6E,0x02) 0x44000702 0x00003c19 0x00000010 0x00000000
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GPP_A2 (0x6E,0x04) 0x44000702 0x00003c1a 0x00000010 0x00000000
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GPP_A3 (0x6E,0x06) 0x44000702 0x00003c1b 0x00000010 0x00000000
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GPP_A4 (0x6E,0x08) 0x44000702 0x00003c1c 0x00000010 0x00000000
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GPP_A5 (0x6E,0x0A) 0x44000700 0x0000001d 0x00000010 0x00000000
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GPP_A6 (0x6E,0x0C) 0x44000702 0x0000001e 0x00000010 0x00000000
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GPP_A7 (0x6E,0x0E) 0x44000100 0x0000001f 0x00000010 0x00000000
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GPP_A8 (0x6E,0x10) 0x44000700 0x00003020 0x00000010 0x00000000
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GPP_A9 (0x6E,0x12) 0x44000700 0x00001021 0x00000010 0x00000000
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GPP_A10 (0x6E,0x14) 0x44000500 0x00001022 0x00000010 0x00000000
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GPP_A11 (0x6E,0x16) 0x80100100 0x00000023 0x00000010 0x00000000
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GPP_A12 (0x6E,0x18) 0x44000102 0x00000024 0x00000010 0x00000000
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GPP_A13 (0x6E,0x1A) 0x44000700 0x00000025 0x00000010 0x00000000
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GPP_A14 (0x6E,0x1C) 0x44000700 0x00000026 0x00000010 0x00000000
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GPP_A15 (0x6E,0x1E) 0x44000702 0x00003027 0x00000010 0x00000000
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GPP_A16 (0x6E,0x20) 0x44000102 0x00000028 0x00000010 0x00000000
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GPP_A17 (0x6E,0x22) 0x44000100 0x00000029 0x00000010 0x00000000
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GPP_A18 (0x6E,0x24) 0x44000102 0x0000002a 0x00000010 0x00000000
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GPP_A19 (0x6E,0x26) 0x44000102 0x0000002b 0x00000010 0x00000000
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GPP_A20 (0x6E,0x28) 0x44000200 0x0000002c 0x00000010 0x00000000
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GPP_A21 (0x6E,0x2A) 0x44000102 0x0000002d 0x00000010 0x00000000
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GPP_A22 (0x6E,0x2C) 0x44000300 0x0000002e 0x00000010 0x00000000
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GPP_A23 (0x6E,0x2E) 0x44000102 0x0000002f 0x00000010 0x00000000
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GPP_B0 (0x6E,0x32) 0x44000102 0x00000030 0x00000010 0x00000000
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GPP_B1 (0x6E,0x34) 0x44000102 0x00000031 0x00000010 0x00000000
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GPP_B2 (0x6E,0x36) 0x44000102 0x00000032 0x00000010 0x00000000
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GPP_B3 (0x6E,0x38) 0x80100102 0x00000033 0x00000010 0x00000000
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GPP_B4 (0x6E,0x3A) 0x44000102 0x00000034 0x00000010 0x00000000
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GPP_B5 (0x6E,0x3C) 0x44000102 0x00000035 0x00000010 0x00000000
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GPP_B6 (0x6E,0x3E) 0x44000102 0x00000036 0x00000010 0x00000000
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GPP_B7 (0x6E,0x40) 0x44000702 0x00000037 0x00000010 0x00000000
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GPP_B8 (0x6E,0x42) 0x44000700 0x00000038 0x00000010 0x00000000
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GPP_B9 (0x6E,0x44) 0x44000702 0x00000039 0x00000010 0x00000000
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GPP_B10 (0x6E,0x46) 0x44000702 0x0000003a 0x00000010 0x00000000
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GPP_B11 (0x6E,0x48) 0x44000102 0x0000003b 0x00000010 0x00000000
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GPP_B12 (0x6E,0x4A) 0x44000700 0x0000003c 0x00000010 0x00000000
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GPP_B13 (0x6E,0x4C) 0x44000700 0x0000003d 0x00000010 0x00000000
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GPP_B14 (0x6E,0x4E) 0x44000600 0x0000003e 0x00000010 0x00000000
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GPP_B15 (0x6E,0x50) 0x44000102 0x0000003f 0x00000010 0x00000000
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GPP_B16 (0x6E,0x52) 0x44000102 0x00000040 0x00000010 0x00000000
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GPP_B17 (0x6E,0x54) 0x44000100 0x00000041 0x00000010 0x00000000
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GPP_B18 (0x6E,0x56) 0x44000102 0x00000042 0x00000010 0x00000000
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GPP_B19 (0x6E,0x58) 0x44000102 0x00000043 0x00000010 0x00000000
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GPP_B20 (0x6E,0x5A) 0x44000102 0x00000044 0x00000010 0x00000000
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GPP_B21 (0x6E,0x5C) 0x44000102 0x00000045 0x00000010 0x00000000
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GPP_B22 (0x6E,0x5E) 0x44000102 0x00000046 0x00000010 0x00000000
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GPP_B23 (0x6E,0x60) 0x44000102 0x00000047 0x00000010 0x00000000
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GPP_G0 (0x6E,0x66) 0x44000102 0x0000006c 0x00000010 0x00000000
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GPP_G1 (0x6E,0x68) 0x44000102 0x0000006d 0x00000010 0x00000000
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GPP_G2 (0x6E,0x6A) 0x44000102 0x0000006e 0x00000010 0x00000000
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GPP_G3 (0x6E,0x6C) 0x44000102 0x0000006f 0x00000010 0x00000000
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GPP_G4 (0x6E,0x6E) 0x44000102 0x00000070 0x00000010 0x00000000
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GPP_G5 (0x6E,0x70) 0x44000102 0x00000071 0x00000010 0x00000000
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GPP_G6 (0x6E,0x72) 0x44000102 0x00000072 0x00000010 0x00000000
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GPP_G7 (0x6E,0x74) 0x44000102 0x00000073 0x00000010 0x00000000
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GPP_D0 (0x6D,0x00) 0x44000102 0x00000060 0x00000010 0x00000000
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GPP_D1 (0x6D,0x02) 0x44000102 0x00000061 0x00000010 0x00000000
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GPP_D2 (0x6D,0x04) 0x44000102 0x00000062 0x00000010 0x00000000
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GPP_D3 (0x6D,0x06) 0x44000102 0x00000063 0x00000010 0x00000000
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GPP_D4 (0x6D,0x08) 0x44000102 0x00000064 0x00000010 0x00000000
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GPP_D5 (0x6D,0x0A) 0x44000102 0x00000065 0x00000010 0x00000000
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GPP_D6 (0x6D,0x0C) 0x44000102 0x00000066 0x00000010 0x00000000
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GPP_D7 (0x6D,0x0E) 0x44000102 0x00000067 0x00000010 0x00000000
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GPP_D8 (0x6D,0x10) 0x44000201 0x00000068 0x00000010 0x00000000
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GPP_D9 (0x6D,0x12) 0x40880102 0x00000069 0x00000010 0x00000000
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GPP_D10 (0x6D,0x14) 0x44000100 0x0000006a 0x00000010 0x00000000
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GPP_D11 (0x6D,0x16) 0x44000300 0x0000006b 0x00000010 0x00000000
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GPP_D12 (0x6D,0x18) 0x44000102 0x0000006c 0x00000810 0x00000000
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GPP_D13 (0x6D,0x1A) 0x84000201 0x0000006d 0x00000010 0x00000000
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GPP_D14 (0x6D,0x1C) 0x84000201 0x0000006e 0x00000010 0x00000000
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GPP_D15 (0x6D,0x1E) 0x44000102 0x0000006f 0x00000010 0x00000000
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GPP_D16 (0x6D,0x20) 0x04000201 0x00000070 0x00000010 0x00000000
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GPP_D17 (0x6D,0x22) 0x44000500 0x00000071 0x00000010 0x00000000
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GPP_D18 (0x6D,0x24) 0x44000500 0x00000072 0x00000010 0x00000000
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GPP_D19 (0x6D,0x26) 0x44000500 0x00000073 0x00000010 0x00000000
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GPP_D20 (0x6D,0x28) 0x44000500 0x00000074 0x00000010 0x00000000
|
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GPP_D21 (0x6D,0x2A) 0x44000102 0x00000075 0x00000010 0x00000000
|
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GPP_D22 (0x6D,0x2C) 0x44000100 0x00000076 0x00000010 0x00000000
|
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GPP_D23 (0x6D,0x2E) 0x44000102 0x00000077 0x00000010 0x00000000
|
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GPP_F0 (0x6D,0x32) 0x44000700 0x00000030 0x00000010 0x00000000
|
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GPP_F1 (0x6D,0x34) 0x44000100 0x00000031 0x00000010 0x00000000
|
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GPP_F2 (0x6D,0x36) 0x44000100 0x00000032 0x00000010 0x00000000
|
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GPP_F3 (0x6D,0x38) 0x44000100 0x00000033 0x00000010 0x00000000
|
||||
GPP_F4 (0x6D,0x3A) 0x44000700 0x00000034 0x00000010 0x00000000
|
||||
GPP_F5 (0x6D,0x3C) 0x44000702 0x00003035 0x00000010 0x00000000
|
||||
GPP_F6 (0x6D,0x3E) 0x44000700 0x00000036 0x00000010 0x00000000
|
||||
GPP_F7 (0x6D,0x40) 0x44000700 0x00003037 0x00000010 0x00000000
|
||||
GPP_F8 (0x6D,0x42) 0x44000700 0x00000038 0x00000010 0x00000000
|
||||
GPP_F9 (0x6D,0x44) 0x44000700 0x00000039 0x00000010 0x00000000
|
||||
GPP_F10 (0x6D,0x46) 0x44000100 0x0000003a 0x00000010 0x00000000
|
||||
GPP_F11 (0x6D,0x48) 0x44000100 0x0000003b 0x00000010 0x00000000
|
||||
GPP_F12 (0x6D,0x4A) 0x44000100 0x0000003c 0x00000010 0x00000000
|
||||
GPP_F13 (0x6D,0x4C) 0x44000100 0x0000003d 0x00000010 0x00000000
|
||||
GPP_F14 (0x6D,0x4E) 0x44000100 0x0000003e 0x00000010 0x00000000
|
||||
GPP_F15 (0x6D,0x50) 0x44000100 0x0000003f 0x00000010 0x00000000
|
||||
GPP_F16 (0x6D,0x52) 0x44000100 0x00000040 0x00000010 0x00000000
|
||||
GPP_F17 (0x6D,0x54) 0x44000100 0x00000041 0x00000010 0x00000000
|
||||
GPP_F18 (0x6D,0x56) 0x44000100 0x00000042 0x00000010 0x00000000
|
||||
GPP_F19 (0x6D,0x58) 0x44000100 0x00000043 0x00000010 0x00000000
|
||||
GPP_F20 (0x6D,0x5A) 0x44000100 0x00000044 0x00000010 0x00000000
|
||||
GPP_F21 (0x6D,0x5C) 0x44000100 0x00000045 0x00000010 0x00000000
|
||||
GPP_F22 (0x6D,0x5E) 0x44000100 0x00000046 0x00000010 0x00000000
|
||||
GPP_F23 (0x6D,0x60) 0x44000100 0x00001047 0x00000010 0x00000000
|
||||
GPP_H0 (0x6D,0x62) 0x44000102 0x00000048 0x00000010 0x00000000
|
||||
GPP_H1 (0x6D,0x64) 0x44000f00 0x00000049 0x00000010 0x00000000
|
||||
GPP_H2 (0x6D,0x66) 0x44000f00 0x0000004a 0x00000010 0x00000000
|
||||
GPP_H3 (0x6D,0x68) 0x44000102 0x0000004b 0x00000010 0x00000000
|
||||
GPP_H4 (0x6D,0x6A) 0x44000702 0x0000004c 0x00000010 0x00000000
|
||||
GPP_H5 (0x6D,0x6C) 0x44000702 0x0000004d 0x00000010 0x00000000
|
||||
GPP_H6 (0x6D,0x6E) 0x44000102 0x0000004e 0x00000010 0x00000000
|
||||
GPP_H7 (0x6D,0x70) 0x44000102 0x0000004f 0x00000010 0x00000000
|
||||
GPP_H8 (0x6D,0x72) 0x44000102 0x00000050 0x00000010 0x00000000
|
||||
GPP_H9 (0x6D,0x74) 0x44000102 0x00000051 0x00000010 0x00000000
|
||||
GPP_H10 (0x6D,0x76) 0x44000102 0x00000052 0x00000010 0x00000000
|
||||
GPP_H11 (0x6D,0x78) 0x44000102 0x00000053 0x00000010 0x00000000
|
||||
GPP_H12 (0x6D,0x7A) 0x44000102 0x00000054 0x00000010 0x00000000
|
||||
GPP_H13 (0x6D,0x7C) 0x44000102 0x00000055 0x00000010 0x00000000
|
||||
GPP_H14 (0x6D,0x7E) 0x44000102 0x00000056 0x00000010 0x00000000
|
||||
GPP_H15 (0x6D,0x80) 0x44000102 0x00000057 0x00000010 0x00000000
|
||||
GPP_H16 (0x6D,0x82) 0x44000102 0x00000058 0x00000010 0x00000000
|
||||
GPP_H17 (0x6D,0x84) 0x44000102 0x00000059 0x00000010 0x00000000
|
||||
GPP_H18 (0x6D,0x86) 0x44000700 0x0000005a 0x00000010 0x00000000
|
||||
GPP_H19 (0x6D,0x88) 0x44000102 0x0000005b 0x00000010 0x00000000
|
||||
GPP_H20 (0x6D,0x8A) 0x44000102 0x0000005c 0x00000010 0x00000000
|
||||
GPP_H21 (0x6D,0x8C) 0x44000102 0x0000005d 0x00000810 0x00000000
|
||||
GPP_H22 (0x6D,0x8E) 0x44000300 0x0000005e 0x00000010 0x00000000
|
||||
GPP_H23 (0x6D,0x90) 0x44000102 0x0000005f 0x00000010 0x00000000
|
||||
GPD0 (0x6C,0x00) 0x04000102 0x00000060 0x00000010 0x00000000
|
||||
GPD1 (0x6C,0x02) 0x44000702 0x00003c61 0x00000010 0x00000000
|
||||
GPD2 (0x6C,0x04) 0x04000102 0x00003c62 0x00000010 0x00000000
|
||||
GPD3 (0x6C,0x06) 0x44000702 0x00003063 0x00000010 0x00000000
|
||||
GPD4 (0x6C,0x08) 0x44000600 0x00000064 0x00000010 0x00000000
|
||||
GPD5 (0x6C,0x0A) 0x44000600 0x00000065 0x00000010 0x00000000
|
||||
GPD6 (0x6C,0x0C) 0x44000600 0x00000066 0x00000010 0x00000000
|
||||
GPD7 (0x6C,0x0E) 0x04000102 0x00000067 0x00000810 0x00000000
|
||||
GPD8 (0x6C,0x10) 0x44000700 0x00000068 0x00000010 0x00000000
|
||||
GPD9 (0x6C,0x12) 0x04000102 0x00000069 0x00000010 0x00000000
|
||||
GPD10 (0x6C,0x14) 0x44000600 0x0000006a 0x00000010 0x00000000
|
||||
GPD11 (0x6C,0x16) 0x04000102 0x0000006b 0x00000010 0x00000000
|
||||
GPP_C0 (0x6A,0x00) 0x44000702 0x00000048 0x00000010 0x00000000
|
||||
GPP_C1 (0x6A,0x02) 0x44000702 0x00000049 0x00000010 0x00000000
|
||||
GPP_C2 (0x6A,0x04) 0x44000102 0x0000004a 0x00000010 0x00000000
|
||||
GPP_C3 (0x6A,0x06) 0x44000102 0x0000004b 0x00000010 0x00000000
|
||||
GPP_C4 (0x6A,0x08) 0x44000102 0x0000004c 0x00000010 0x00000000
|
||||
GPP_C5 (0x6A,0x0A) 0x44000102 0x0000004d 0x00000010 0x00000000
|
||||
GPP_C6 (0x6A,0x0C) 0x44000102 0x0000004e 0x00000010 0x00000000
|
||||
GPP_C7 (0x6A,0x0E) 0x44000102 0x0000004f 0x00000010 0x00000000
|
||||
GPP_C8 (0x6A,0x10) 0x44000102 0x00000050 0x00000010 0x00000000
|
||||
GPP_C9 (0x6A,0x12) 0x44000300 0x00000051 0x00000010 0x00000000
|
||||
GPP_C10 (0x6A,0x14) 0x84000200 0x00000052 0x00000010 0x00000000
|
||||
GPP_C11 (0x6A,0x16) 0x44000102 0x00000053 0x00000010 0x00000000
|
||||
GPP_C12 (0x6A,0x18) 0x84000201 0x00000054 0x00000010 0x00000000
|
||||
GPP_C13 (0x6A,0x1A) 0x84000201 0x00000055 0x00000010 0x00000000
|
||||
GPP_C14 (0x6A,0x1C) 0x84000200 0x00000056 0x00000010 0x00000000
|
||||
GPP_C15 (0x6A,0x1E) 0x44000300 0x00000057 0x00000010 0x00000000
|
||||
GPP_C16 (0x6A,0x20) 0x44000702 0x00000058 0x00000010 0x00000000
|
||||
GPP_C17 (0x6A,0x22) 0x44000702 0x00000059 0x00000010 0x00000000
|
||||
GPP_C18 (0x6A,0x24) 0x44000102 0x0000005a 0x00000010 0x00000000
|
||||
GPP_C19 (0x6A,0x26) 0x44000102 0x0000005b 0x00000010 0x00000000
|
||||
GPP_C20 (0x6A,0x28) 0x44000102 0x0000005c 0x00000010 0x00000000
|
||||
GPP_C21 (0x6A,0x2A) 0x44000102 0x0000005d 0x00000010 0x00000000
|
||||
GPP_C22 (0x6A,0x2C) 0x44000102 0x0000005e 0x00000010 0x00000000
|
||||
GPP_C23 (0x6A,0x2E) 0x44000102 0x0000005f 0x00000010 0x00000000
|
||||
GPP_E0 (0x6A,0x30) 0x44000102 0x00000018 0x00000010 0x00000000
|
||||
GPP_E1 (0x6A,0x32) 0x44000700 0x00003019 0x00000010 0x00000000
|
||||
GPP_E2 (0x6A,0x34) 0x44000702 0x0000301a 0x00000010 0x00000000
|
||||
GPP_E3 (0x6A,0x36) 0x44000102 0x0000001b 0x00000010 0x00000000
|
||||
GPP_E4 (0x6A,0x38) 0x44000102 0x0000001c 0x00000010 0x00000000
|
||||
GPP_E5 (0x6A,0x3A) 0x44000700 0x0000001d 0x00000010 0x00000000
|
||||
GPP_E6 (0x6A,0x3C) 0x44000700 0x0000001e 0x00000010 0x00000000
|
||||
GPP_E7 (0x6A,0x3E) 0x44000102 0x0000001f 0x00000010 0x00000000
|
||||
GPP_E8 (0x6A,0x40) 0x44000700 0x00000020 0x00000010 0x00000000
|
||||
GPP_E9 (0x6A,0x42) 0x44000102 0x00000021 0x00000810 0x00000000
|
||||
GPP_E10 (0x6A,0x44) 0x44000102 0x00000022 0x00000810 0x00000000
|
||||
GPP_E11 (0x6A,0x46) 0x44000102 0x00000023 0x00000810 0x00000000
|
||||
GPP_E12 (0x6A,0x48) 0x44000102 0x00000024 0x00000010 0x00000000
|
||||
GPP_E13 (0x6A,0x4A) 0x44000700 0x00000025 0x00000010 0x00000000
|
||||
GPP_E14 (0x6A,0x4C) 0x44000700 0x00000026 0x00000010 0x00000000
|
||||
GPP_E15 (0x6A,0x4E) 0x44000102 0x00000027 0x00000010 0x00000000
|
||||
GPP_E16 (0x6A,0x50) 0x80880102 0x00000028 0x00000010 0x00000000
|
||||
GPP_E17 (0x6A,0x52) 0x44000702 0x00000029 0x00000010 0x00000000
|
||||
GPP_E18 (0x6A,0x54) 0x44000702 0x0000002a 0x00000010 0x00000000
|
||||
GPP_E19 (0x6A,0x56) 0x44000602 0x0000002b 0x00000810 0x00000000
|
||||
GPP_E20 (0x6A,0x58) 0x44000702 0x0000002c 0x00000010 0x00000000
|
||||
GPP_E21 (0x6A,0x5A) 0x44000602 0x0000002d 0x00000810 0x00000000
|
||||
GPP_E22 (0x6A,0x5C) 0x44000102 0x0000002e 0x00000010 0x00000000
|
||||
GPP_E23 (0x6A,0x5E) 0x44000102 0x0000002f 0x00000010 0x00000000
|
||||
## HDAUDIO ##
|
||||
hdaudioC0D0
|
||||
vendor_name: Realtek
|
||||
chip_name: ALC293
|
||||
vendor_id: 0x10ec0293
|
||||
subsystem_id: 0x15581401
|
||||
revision_id: 0x100003
|
||||
0x12: 0x90a60130
|
||||
0x13: 0x40000000
|
||||
0x14: 0x90170110
|
||||
0x15: 0x02211020
|
||||
0x16: 0x411111f0
|
||||
0x18: 0x411111f0
|
||||
0x19: 0x411111f0
|
||||
0x1a: 0x411111f0
|
||||
0x1b: 0x411111f0
|
||||
0x1d: 0x41748245
|
||||
0x1e: 0x411111f0
|
||||
hdaudioC0D2
|
||||
vendor_name: Intel
|
||||
chip_name: Kabylake HDMI
|
||||
vendor_id: 0x8086280b
|
||||
subsystem_id: 0x80860101
|
||||
revision_id: 0x100000
|
||||
0x05: 0x18560010
|
||||
0x06: 0x18560010
|
||||
0x07: 0x18560010
|
||||
801
models/lemp9/coreboot.config
Normal file
801
models/lemp9/coreboot.config
Normal file
@@ -0,0 +1,801 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# coreboot configuration
|
||||
#
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_COREBOOT_BUILD=y
|
||||
CONFIG_LOCALVERSION=""
|
||||
CONFIG_CBFS_PREFIX="fallback"
|
||||
CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_COMPILER_LLVM_CLANG is not set
|
||||
# CONFIG_ANY_TOOLCHAIN is not set
|
||||
CONFIG_CCACHE=y
|
||||
# CONFIG_FMD_GENPARSER is not set
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
CONFIG_COMPRESS_RAMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
|
||||
CONFIG_USE_BLOBS=y
|
||||
# CONFIG_USE_AMD_BLOBS is not set
|
||||
# CONFIG_COVERAGE is not set
|
||||
# CONFIG_UBSAN is not set
|
||||
# CONFIG_NO_RELOCATABLE_RAMSTAGE is not set
|
||||
CONFIG_RELOCATABLE_RAMSTAGE=y
|
||||
CONFIG_TSEG_STAGE_CACHE=y
|
||||
# CONFIG_UPDATE_IMAGE is not set
|
||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
||||
|
||||
#
|
||||
# Mainboard
|
||||
#
|
||||
|
||||
#
|
||||
# Important: Run 'make distclean' before switching boards
|
||||
#
|
||||
# CONFIG_VENDOR_ADI is not set
|
||||
# CONFIG_VENDOR_ADLINK is not set
|
||||
# CONFIG_VENDOR_ADVANSUS is not set
|
||||
# CONFIG_VENDOR_AMD is not set
|
||||
# CONFIG_VENDOR_AOPEN is not set
|
||||
# CONFIG_VENDOR_APPLE is not set
|
||||
# CONFIG_VENDOR_ASROCK is not set
|
||||
# CONFIG_VENDOR_ASUS is not set
|
||||
# CONFIG_VENDOR_AVALUE is not set
|
||||
# CONFIG_VENDOR_BAP is not set
|
||||
# CONFIG_VENDOR_BIOSTAR is not set
|
||||
# CONFIG_VENDOR_CAVIUM is not set
|
||||
# CONFIG_VENDOR_COMPULAB is not set
|
||||
# CONFIG_VENDOR_ELMEX is not set
|
||||
# CONFIG_VENDOR_EMULATION is not set
|
||||
# CONFIG_VENDOR_ESD is not set
|
||||
# CONFIG_VENDOR_FACEBOOK is not set
|
||||
# CONFIG_VENDOR_FOXCONN is not set
|
||||
# CONFIG_VENDOR_GETAC is not set
|
||||
# CONFIG_VENDOR_GIGABYTE is not set
|
||||
# CONFIG_VENDOR_GIZMOSPHERE is not set
|
||||
# CONFIG_VENDOR_GOOGLE is not set
|
||||
# CONFIG_VENDOR_HP is not set
|
||||
# CONFIG_VENDOR_IBASE is not set
|
||||
# CONFIG_VENDOR_IEI is not set
|
||||
# CONFIG_VENDOR_INTEL is not set
|
||||
# CONFIG_VENDOR_JETWAY is not set
|
||||
# CONFIG_VENDOR_KONTRON is not set
|
||||
# CONFIG_VENDOR_LENOVO is not set
|
||||
# CONFIG_VENDOR_LIPPERT is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_OCP is not set
|
||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
# CONFIG_VENDOR_PCENGINES is not set
|
||||
# CONFIG_VENDOR_PORTWELL is not set
|
||||
# CONFIG_VENDOR_PURISM is not set
|
||||
# CONFIG_VENDOR_RAZER is not set
|
||||
# CONFIG_VENDOR_RODA is not set
|
||||
# CONFIG_VENDOR_SAMSUNG is not set
|
||||
# CONFIG_VENDOR_SAPPHIRE is not set
|
||||
# CONFIG_VENDOR_SCALEWAY is not set
|
||||
# CONFIG_VENDOR_SIEMENS is not set
|
||||
# CONFIG_VENDOR_SIFIVE is not set
|
||||
# CONFIG_VENDOR_SUPERMICRO is not set
|
||||
CONFIG_VENDOR_SYSTEM76=y
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_TYAN is not set
|
||||
# CONFIG_VENDOR_UP is not set
|
||||
# CONFIG_VENDOR_VIA is not set
|
||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
||||
CONFIG_MAINBOARD_DIR="system76/lemp9"
|
||||
CONFIG_MAINBOARD_PART_NUMBER="lemp9"
|
||||
CONFIG_MAX_CPUS=8
|
||||
CONFIG_CBFS_SIZE=0xA00000
|
||||
CONFIG_UART_FOR_CONSOLE=2
|
||||
CONFIG_MAINBOARD_VENDOR="System76"
|
||||
CONFIG_VGA_BIOS_ID="8086,9b41"
|
||||
CONFIG_ONBOARD_VGA_IS_PRIMARY=y
|
||||
CONFIG_DIMM_SPD_SIZE=512
|
||||
# CONFIG_VGA_BIOS is not set
|
||||
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
|
||||
CONFIG_VGA_BIOS_FILE="pci8086,9b41.rom"
|
||||
CONFIG_C_ENV_BOOTBLOCK_SIZE=0xC000
|
||||
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="System76"
|
||||
CONFIG_VARIANT_DIR="lemp9"
|
||||
CONFIG_DEVICETREE="devicetree.cb"
|
||||
CONFIG_INTEL_GMA_VBT_FILE="$(FIRMWARE_OPEN_MODEL_DIR)/vbt.rom"
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xe00
|
||||
# CONFIG_POST_IO is not set
|
||||
CONFIG_DCACHE_RAM_BASE=0xfef00000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x40000
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_OVERRIDE_DEVICETREE=""
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_FMDFILE=""
|
||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x20000
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
# CONFIG_POST_DEVICE is not set
|
||||
CONFIG_CPU_MICROCODE_CBFS_LEN=0x0
|
||||
CONFIG_CPU_MICROCODE_CBFS_LOC=0x0
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
# CONFIG_VBOOT is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_DIMM_MAX=2
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Lemur Pro"
|
||||
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
||||
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
||||
CONFIG_HAVE_IFD_BIN=y
|
||||
CONFIG_ADD_FSP_BINARIES=y
|
||||
CONFIG_FSP_M_FILE="$(FIRMWARE_OPEN_MODEL_DIR)/FSP/Fsp_M.fd"
|
||||
CONFIG_FSP_S_FILE="$(FIRMWARE_OPEN_MODEL_DIR)/FSP/Fsp_S.fd"
|
||||
CONFIG_FSP_S_CBFS="fsps.bin"
|
||||
CONFIG_FSP_M_CBFS="fspm.bin"
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
|
||||
CONFIG_MAINBOARD_VERSION="lemp9"
|
||||
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
||||
CONFIG_PCIEXP_L1_SUB_STATE=y
|
||||
# CONFIG_NO_POST is not set
|
||||
CONFIG_SMBIOS_ENCLOSURE_TYPE=0x09
|
||||
CONFIG_HEAP_SIZE=0x8000
|
||||
CONFIG_CONSOLE_POST=y
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_15 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_17 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_15 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_17 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP4 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_DARP6 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP2 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP3 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP3_B is not set
|
||||
CONFIG_BOARD_SYSTEM76_LEMP9=y
|
||||
# CONFIG_BOARD_SYSTEM76_THELIO_B1 is not set
|
||||
# CONFIG_BOARD_SYSTEM76_GALP3_C is not set
|
||||
# CONFIG_BOARD_SYSTEM76_DARP5 is not set
|
||||
CONFIG_FSP_M_XIP=y
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x1558
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x1401
|
||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB=16384
|
||||
CONFIG_ROM_SIZE=0x1000000
|
||||
CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
|
||||
CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
|
||||
CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
|
||||
# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
|
||||
CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
|
||||
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
|
||||
CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
|
||||
CONFIG_SYSTEM_TYPE_LAPTOP=y
|
||||
# CONFIG_SYSTEM_TYPE_TABLET is not set
|
||||
# CONFIG_SYSTEM_TYPE_DETACHABLE is not set
|
||||
# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set
|
||||
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
|
||||
|
||||
#
|
||||
# Chipset
|
||||
#
|
||||
|
||||
#
|
||||
# SoC
|
||||
#
|
||||
CONFIG_CPU_SPECIFIC_OPTIONS=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_CPU_ADDR_BITS=36
|
||||
CONFIG_CONSOLE_UART_BASE_ADDRESS=0xfe032000
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x200000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x800
|
||||
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=216
|
||||
# CONFIG_SOC_CAVIUM_CN81XX is not set
|
||||
CONFIG_ARCH_ARMV8_EXTENSION=0
|
||||
CONFIG_STACK_SIZE=0x1000
|
||||
# CONFIG_SOC_CAVIUM_COMMON is not set
|
||||
# CONFIG_SOC_INTEL_GLK is not set
|
||||
CONFIG_PCR_BASE_ADDRESS=0xfd000000
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_ROMSTAGE_ADDR=0x2000000
|
||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_FSP_HEADER_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/FSP/Include/"
|
||||
# CONFIG_NHLT_DMIC_1CH_16B is not set
|
||||
# CONFIG_NHLT_DMIC_2CH_16B is not set
|
||||
# CONFIG_NHLT_DMIC_4CH_16B is not set
|
||||
# CONFIG_NHLT_MAX98357 is not set
|
||||
# CONFIG_NHLT_DA7219 is not set
|
||||
CONFIG_IFD_CHIPSET="cnl"
|
||||
CONFIG_CPU_BCLK_MHZ=100
|
||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
|
||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=3
|
||||
CONFIG_SOC_INTEL_I2C_DEV_MAX=6
|
||||
# CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE is not set
|
||||
CONFIG_PCIEXP_ASPM=y
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_PCIEXP_CLK_PM=y
|
||||
CONFIG_IED_REGION_SIZE=0x400000
|
||||
CONFIG_SOC_INTEL_CANNONLAKE_BASE=y
|
||||
CONFIG_SOC_INTEL_CANNONLAKE_ALTERNATE_HEADERS=y
|
||||
CONFIG_SOC_INTEL_COMETLAKE=y
|
||||
CONFIG_FSP_TEMP_RAM_SIZE=0x10000
|
||||
# CONFIG_NHLT_MAX98373 is not set
|
||||
CONFIG_MAX_ROOT_PORTS=16
|
||||
CONFIG_MAX_PCIE_CLOCKS=6
|
||||
# CONFIG_MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE is not set
|
||||
# CONFIG_USE_CANNONLAKE_CAR_NEM_ENHANCED is not set
|
||||
CONFIG_USE_CANNONLAKE_FSP_CAR=y
|
||||
CONFIG_SOC_INTEL_CANNONLAKE_DEBUG_CONSENT=0
|
||||
CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
|
||||
CONFIG_UART_PCI_ADDR=0x0
|
||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
|
||||
CONFIG_SOC_INTEL_COMMON=y
|
||||
|
||||
#
|
||||
# Intel SoC Common Code
|
||||
#
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_CAR is not set
|
||||
# CONFIG_INTEL_CAR_NEM is not set
|
||||
# CONFIG_INTEL_CAR_CQOS is not set
|
||||
# CONFIG_INTEL_CAR_NEM_ENHANCED is not set
|
||||
# CONFIG_USE_INTEL_FSP_MP_INIT is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_EBDA=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
|
||||
CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
|
||||
# CONFIG_SKIP_GRAPHICS_ENABLING is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_IMC is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
|
||||
CONFIG_PCIE_DEBUG_INFO=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
|
||||
# CONFIG_PMC_INVALID_READ_AFTER_WRITE is not set
|
||||
CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
|
||||
CONFIG_SOC_AHCI_PORT_IMPLEMENTED_INVERT=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
|
||||
# CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_MMC_OVERRIDE is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
|
||||
# CONFIG_HECI_DISABLE_USING_SMM is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
|
||||
CONFIG_SA_PCIEX_LENGTH=0x10000000
|
||||
# CONFIG_SA_ENABLE_IMR is not set
|
||||
# CONFIG_SA_ENABLE_DPR is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
|
||||
CONFIG_USE_LEGACY_8254_TIMER=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
|
||||
CONFIG_INTEL_LPSS_UART_FOR_CONSOLE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
|
||||
|
||||
#
|
||||
# Intel SoC Common PCH Code
|
||||
#
|
||||
CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
|
||||
CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
|
||||
CONFIG_PCH_SPECIFIC_OPTIONS=y
|
||||
|
||||
#
|
||||
# Intel SoC Common coreboot stages
|
||||
#
|
||||
CONFIG_SOC_INTEL_COMMON_RESET=y
|
||||
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
|
||||
# CONFIG_ACPI_CONSOLE is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_ACPI is not set
|
||||
CONFIG_SOC_INTEL_COMMON_NHLT=y
|
||||
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
|
||||
# CONFIG_SOC_MEDIATEK_MT8173 is not set
|
||||
# CONFIG_SOC_MEDIATEK_MT8183 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
||||
# CONFIG_SOC_QUALCOMM_COMMON is not set
|
||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
||||
# CONFIG_SOC_QC_IPQ806X is not set
|
||||
# CONFIG_SOC_QUALCOMM_QCS405 is not set
|
||||
# CONFIG_SOC_QUALCOMM_SC7180 is not set
|
||||
# CONFIG_SOC_QUALCOMM_SDM845 is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
|
||||
# CONFIG_SOC_UCB_RISCV is not set
|
||||
|
||||
#
|
||||
# CPU
|
||||
#
|
||||
CONFIG_NUM_IPI_STARTS=2
|
||||
# CONFIG_CPU_AMD_AGESA is not set
|
||||
# CONFIG_CPU_AMD_PI is not set
|
||||
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
|
||||
CONFIG_SSE2=y
|
||||
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
|
||||
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
|
||||
CONFIG_CPU_INTEL_COMMON=y
|
||||
CONFIG_ENABLE_VMX=y
|
||||
CONFIG_SET_IA32_FC_LOCK_BIT=y
|
||||
CONFIG_MICROCODE_UPDATE_PRE_RAM=y
|
||||
# CONFIG_CPU_TI_AM335X is not set
|
||||
# CONFIG_PARALLEL_CPU_INIT is not set
|
||||
CONFIG_PARALLEL_MP=y
|
||||
CONFIG_PARALLEL_MP_AP_WORK=y
|
||||
# CONFIG_UDELAY_LAPIC is not set
|
||||
CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
# CONFIG_TSC_SYNC_LFENCE is not set
|
||||
# CONFIG_TSC_SYNC_MFENCE is not set
|
||||
CONFIG_NO_FIXED_XIP_ROM_SIZE=y
|
||||
CONFIG_LOGICAL_CPUS=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
# CONFIG_NO_SMM is not set
|
||||
# CONFIG_SMM_ASEG is not set
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
|
||||
CONFIG_SMM_STUB_STACK_SIZE=0x400
|
||||
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
|
||||
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
|
||||
# CONFIG_X86_AMD_FIXED_MTRRS is not set
|
||||
# CONFIG_X86_AMD_INIT_SIPI is not set
|
||||
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
|
||||
# CONFIG_SOC_SETS_MSRS is not set
|
||||
# CONFIG_CAR_GLOBAL_MIGRATION is not set
|
||||
CONFIG_SMP=y
|
||||
CONFIG_SSE=y
|
||||
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
||||
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
|
||||
CONFIG_MICROCODE_BLOB_UNDISCLOSED=y
|
||||
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
|
||||
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
|
||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
||||
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
||||
CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
|
||||
|
||||
#
|
||||
# Northbridge
|
||||
#
|
||||
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
||||
|
||||
#
|
||||
# Southbridge
|
||||
#
|
||||
# CONFIG_AMD_SB_CIMX is not set
|
||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
|
||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
|
||||
# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
|
||||
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
|
||||
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
|
||||
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
||||
|
||||
#
|
||||
# Super I/O
|
||||
#
|
||||
# CONFIG_SUPERIO_ASPEED_AST2400 is not set
|
||||
# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
|
||||
# CONFIG_SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND is not set
|
||||
# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
|
||||
|
||||
#
|
||||
# Embedded Controllers
|
||||
#
|
||||
CONFIG_EC_ACPI=y
|
||||
# CONFIG_EC_GOOGLE_WILCO is not set
|
||||
|
||||
#
|
||||
# Intel Firmware
|
||||
#
|
||||
CONFIG_HAVE_ME_BIN=y
|
||||
# CONFIG_MAINBOARD_USES_IFD_GBE_REGION is not set
|
||||
# CONFIG_MAINBOARD_USES_IFD_EC_REGION is not set
|
||||
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
# CONFIG_CAVIUM_BDK is not set
|
||||
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
|
||||
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
|
||||
# CONFIG_UEFI_2_4_BINDING is not set
|
||||
# CONFIG_UDK_2015_BINDING is not set
|
||||
CONFIG_UDK_2017_BINDING=y
|
||||
CONFIG_UDK_2013_VERSION=2013
|
||||
CONFIG_UDK_2015_VERSION=2015
|
||||
CONFIG_UDK_2017_VERSION=2017
|
||||
CONFIG_UDK_VERSION=2017
|
||||
# CONFIG_USE_SIEMENS_HWILIB is not set
|
||||
# CONFIG_ARM_LPAE is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
||||
CONFIG_ARCH_POSTCAR_X86_32=y
|
||||
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
||||
# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_X86_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
|
||||
# CONFIG_ARCH_POSTCAR_X86_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
|
||||
# CONFIG_USE_MARCH_586 is not set
|
||||
# CONFIG_AP_IN_SIPI_WAIT is not set
|
||||
# CONFIG_SIPI_VECTOR_IN_ROM is not set
|
||||
CONFIG_RAMBASE=0xe00000
|
||||
CONFIG_RAMTOP=0x1000000
|
||||
# CONFIG_CBMEM_TOP_BACKUP is not set
|
||||
CONFIG_EARLY_EBDA_INIT=y
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
|
||||
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
|
||||
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
|
||||
# CONFIG_HPET_ADDRESS_OVERRIDE is not set
|
||||
CONFIG_HPET_ADDRESS=0xfed00000
|
||||
CONFIG_ID_SECTION_OFFSET=0x80
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
||||
CONFIG_ACPI_HAVE_PCAT_8259=y
|
||||
# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
|
||||
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
||||
# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
|
||||
CONFIG_IDT_IN_EVERY_STAGE=y
|
||||
CONFIG_HAVE_CF9_RESET=y
|
||||
# CONFIG_PIRQ_ROUTE is not set
|
||||
|
||||
#
|
||||
# Devices
|
||||
#
|
||||
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
||||
CONFIG_HAVE_FSP_GOP=y
|
||||
# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set
|
||||
# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
|
||||
# CONFIG_VGA_ROM_RUN is not set
|
||||
CONFIG_RUN_FSP_GOP=y
|
||||
# CONFIG_NO_GFX_INIT is not set
|
||||
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
|
||||
|
||||
#
|
||||
# Display
|
||||
#
|
||||
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
|
||||
CONFIG_LINEAR_FRAMEBUFFER=y
|
||||
# CONFIG_BOOTSPLASH is not set
|
||||
# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set
|
||||
CONFIG_PCI=y
|
||||
# CONFIG_NO_MMCONF_SUPPORT is not set
|
||||
CONFIG_MMCONF_SUPPORT=y
|
||||
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
# CONFIG_PCIEXP_HOTPLUG is not set
|
||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||
CONFIG_INTEL_GMA_HAVE_VBT=y
|
||||
CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
# CONFIG_DRIVERS_AS3722_RTC is not set
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_GIC is not set
|
||||
# CONFIG_IPMI_KCS is not set
|
||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
CONFIG_MRC_SETTINGS_PROTECT=y
|
||||
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
|
||||
# CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN is not set
|
||||
# CONFIG_MRC_SETTINGS_VARIABLE_DATA is not set
|
||||
# CONFIG_MRC_WRITE_NV_LATE is not set
|
||||
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
|
||||
# CONFIG_RT8168_SET_LED_MODE is not set
|
||||
CONFIG_SMMSTORE=y
|
||||
# CONFIG_SMMSTORE_IN_CBFS is not set
|
||||
CONFIG_SMMSTORE_REGION="SMMSTORE"
|
||||
CONFIG_SMMSTORE_FILENAME="smm_store"
|
||||
CONFIG_SMMSTORE_SIZE=0x40000
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
|
||||
CONFIG_SPI_FLASH_SMM=y
|
||||
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
||||
CONFIG_SPI_FLASH_ADESTO=y
|
||||
CONFIG_SPI_FLASH_AMIC=y
|
||||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
CONFIG_SPI_FLASH_EON=y
|
||||
CONFIG_SPI_FLASH_GIGADEVICE=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_SPI_FLASH_SST=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
|
||||
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
|
||||
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
|
||||
CONFIG_DRIVERS_UART=y
|
||||
CONFIG_NO_UART_ON_SUPERIO=y
|
||||
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
|
||||
# CONFIG_UART_OVERRIDE_REFCLK is not set
|
||||
CONFIG_DRIVERS_UART_8250MEM=y
|
||||
CONFIG_DRIVERS_UART_8250MEM_32=y
|
||||
# CONFIG_HAVE_UART_SPECIAL is not set
|
||||
# CONFIG_DRIVERS_UART_PL011 is not set
|
||||
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
|
||||
# CONFIG_HAVE_USBDEBUG is not set
|
||||
# CONFIG_HAVE_USBDEBUG_OPTIONS is not set
|
||||
# CONFIG_VPD is not set
|
||||
CONFIG_DRIVERS_GENERIC_WIFI=y
|
||||
# CONFIG_USE_SAR is not set
|
||||
# CONFIG_DRIVERS_AMD_PI is not set
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
||||
# CONFIG_DRIVERS_I2C_DESIGNWARE_DEBUG is not set
|
||||
# CONFIG_DRIVERS_I2C_MAX98373 is not set
|
||||
# CONFIG_DRIVERS_I2C_MAX98927 is not set
|
||||
# CONFIG_DRIVERS_I2C_PCA9538 is not set
|
||||
# CONFIG_DRIVERS_I2C_PCF8523 is not set
|
||||
# CONFIG_DRIVERS_I2C_RT1011 is not set
|
||||
# CONFIG_DRIVERS_I2C_RT5663 is not set
|
||||
# CONFIG_DRIVERS_I2C_RTD2132 is not set
|
||||
# CONFIG_DRIVERS_I2C_RX6110SA is not set
|
||||
# CONFIG_DRIVERS_I2C_SX9310 is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
# CONFIG_DISPLAY_HOBS is not set
|
||||
# CONFIG_DISPLAY_UPD_DATA is not set
|
||||
CONFIG_PLATFORM_USES_FSP2_0=y
|
||||
# CONFIG_PLATFORM_USES_FSP2_1 is not set
|
||||
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
|
||||
# CONFIG_DISPLAY_FSP_HEADER is not set
|
||||
CONFIG_FSP_T_CBFS="fspt.bin"
|
||||
CONFIG_FSP_T_FILE="$(FIRMWARE_OPEN_MODEL_DIR)/FSP/Fsp_T.fd"
|
||||
CONFIG_FSP_CAR=y
|
||||
CONFIG_FSP_T_XIP=y
|
||||
CONFIG_FSP_USES_CB_STACK=y
|
||||
# CONFIG_VERIFY_HOBS is not set
|
||||
CONFIG_DISPLAY_FSP_VERSION_INFO=y
|
||||
# CONFIG_INTEL_DDI is not set
|
||||
# CONFIG_INTEL_EDID is not set
|
||||
# CONFIG_INTEL_INT15 is not set
|
||||
CONFIG_INTEL_GMA_ACPI=y
|
||||
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
|
||||
# CONFIG_INTEL_GMA_SWSMISCI is not set
|
||||
# CONFIG_DRIVER_INTEL_I210 is not set
|
||||
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
|
||||
# CONFIG_HAVE_INTEL_PTT is not set
|
||||
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
|
||||
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
||||
# CONFIG_UDELAY_IO is not set
|
||||
# CONFIG_UDELAY_TIMER2 is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
# CONFIG_LPC_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_LPC_TPM is not set
|
||||
# CONFIG_DRIVERS_RICOH_RCE822 is not set
|
||||
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
|
||||
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
|
||||
# CONFIG_DRIVERS_SIL_3114 is not set
|
||||
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
|
||||
# CONFIG_DRIVER_TI_TPS65090 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
|
||||
# CONFIG_DRIVERS_USB_ACPI is not set
|
||||
# CONFIG_COMMONLIB_STORAGE is not set
|
||||
|
||||
#
|
||||
# Security
|
||||
#
|
||||
|
||||
#
|
||||
# Verified Boot (vboot)
|
||||
#
|
||||
|
||||
#
|
||||
# Trusted Platform Module
|
||||
#
|
||||
CONFIG_USER_NO_TPM=y
|
||||
|
||||
#
|
||||
# Memory initialization
|
||||
#
|
||||
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
|
||||
# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
|
||||
|
||||
#
|
||||
# Intel
|
||||
#
|
||||
# CONFIG_ACPI_SATA_GENERATOR is not set
|
||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
||||
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
|
||||
#
|
||||
# Console
|
||||
#
|
||||
CONFIG_BOOTBLOCK_CONSOLE=y
|
||||
CONFIG_POSTCAR_CONSOLE=y
|
||||
CONFIG_SQUELCH_EARLY_SMP=y
|
||||
# CONFIG_CONSOLE_SERIAL is not set
|
||||
CONFIG_FIXED_UART_FOR_CONSOLE=y
|
||||
# CONFIG_SPKMODEM is not set
|
||||
# CONFIG_CONSOLE_NE2K is not set
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
|
||||
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
|
||||
# CONFIG_CONSOLE_SPI_FLASH is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
||||
# CONFIG_CMOS_POST is not set
|
||||
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
|
||||
CONFIG_HWBASE_DEBUG_CB=y
|
||||
CONFIG_HAVE_ACPI_RESUME=y
|
||||
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
||||
# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
|
||||
# CONFIG_NO_MONOTONIC_TIMER is not set
|
||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
||||
# CONFIG_TIMER_QUEUE is not set
|
||||
# CONFIG_HAVE_OPTION_TABLE is not set
|
||||
# CONFIG_PCI_IO_CFG_EXT is not set
|
||||
CONFIG_IOAPIC=y
|
||||
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
|
||||
# CONFIG_GFXUMA is not set
|
||||
CONFIG_HAVE_ACPI_TABLES=y
|
||||
CONFIG_COMMON_FADT=y
|
||||
CONFIG_ACPI_NHLT=y
|
||||
|
||||
#
|
||||
# System tables
|
||||
#
|
||||
# CONFIG_GENERATE_MP_TABLE is not set
|
||||
# CONFIG_GENERATE_PIRQ_TABLE is not set
|
||||
CONFIG_GENERATE_SMBIOS_TABLES=y
|
||||
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
|
||||
|
||||
#
|
||||
# Payload
|
||||
#
|
||||
# CONFIG_PAYLOAD_NONE is not set
|
||||
CONFIG_PAYLOAD_ELF=y
|
||||
# CONFIG_PAYLOAD_BAYOU is not set
|
||||
# CONFIG_PAYLOAD_FILO is not set
|
||||
# CONFIG_PAYLOAD_GRUB2 is not set
|
||||
# CONFIG_PAYLOAD_LINUXBOOT is not set
|
||||
# CONFIG_PAYLOAD_SEABIOS is not set
|
||||
# CONFIG_PAYLOAD_UBOOT is not set
|
||||
# CONFIG_PAYLOAD_YABITS is not set
|
||||
# CONFIG_PAYLOAD_LINUX is not set
|
||||
# CONFIG_PAYLOAD_TIANOCORE is not set
|
||||
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
||||
CONFIG_PAYLOAD_OPTIONS=""
|
||||
# CONFIG_PXE is not set
|
||||
CONFIG_COMPRESSED_PAYLOAD_LZMA=y
|
||||
# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set
|
||||
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
|
||||
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
||||
|
||||
#
|
||||
# Secondary Payloads
|
||||
#
|
||||
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
|
||||
|
||||
#
|
||||
# Debugging
|
||||
#
|
||||
|
||||
#
|
||||
# CPU Debug Settings
|
||||
#
|
||||
CONFIG_HAVE_DISPLAY_MTRRS=y
|
||||
# CONFIG_DISPLAY_MTRRS is not set
|
||||
|
||||
#
|
||||
# General Debug Settings
|
||||
#
|
||||
# CONFIG_FATAL_ASSERTS is not set
|
||||
CONFIG_HAVE_DEBUG_GPIO=y
|
||||
# CONFIG_DEBUG_GPIO is not set
|
||||
# CONFIG_DEBUG_CBFS is not set
|
||||
# CONFIG_HAVE_DEBUG_RAM_SETUP is not set
|
||||
# CONFIG_HAVE_DEBUG_SMBUS is not set
|
||||
# CONFIG_DEBUG_SMI is not set
|
||||
# CONFIG_DEBUG_MALLOC is not set
|
||||
# CONFIG_DEBUG_ACPI is not set
|
||||
# CONFIG_DEBUG_CONSOLE_INIT is not set
|
||||
# CONFIG_DEBUG_SPI_FLASH is not set
|
||||
# CONFIG_TRACE is not set
|
||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
||||
# CONFIG_DEBUG_ADA_CODE is not set
|
||||
CONFIG_HAVE_EM100_SUPPORT=y
|
||||
# CONFIG_EM100 is not set
|
||||
CONFIG_NO_EDID_FILL_FB=y
|
||||
CONFIG_RAMSTAGE_CBMEM_TOP_ARG=y
|
||||
CONFIG_SPD_READ_BY_WORD=y
|
||||
# CONFIG_ENABLE_APIC_EXT_ID is not set
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
|
||||
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
|
||||
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
|
||||
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
|
||||
CONFIG_REG_SCRIPT=y
|
||||
# CONFIG_NO_XIP_EARLY_STAGES is not set
|
||||
# CONFIG_EARLY_CBMEM_LIST is not set
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_C_ENVIRONMENT_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
BIN
models/lemp9/fd.rom
(Stored with Git LFS)
Normal file
BIN
models/lemp9/fd.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
218
models/lemp9/gpio.h
Normal file
218
models/lemp9/gpio.h
Normal file
@@ -0,0 +1,218 @@
|
||||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2019 System76
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef MAINBOARD_GPIO_H
|
||||
#define MAINBOARD_GPIO_H
|
||||
|
||||
#include <soc/gpe.h>
|
||||
#include <soc/gpio.h>
|
||||
|
||||
#ifndef __ACPI__
|
||||
|
||||
/* Pad configuration in ramstage. */
|
||||
static const struct pad_config gpio_table[] = {
|
||||
PAD_CFG_GPI(GPD0, NONE, PWROK),
|
||||
PAD_CFG_NF(GPD1, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD2, NATIVE, PWROK),
|
||||
PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPD6, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD7, NONE, PWROK),
|
||||
PAD_CFG_NF(GPD8, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD9, NONE, PWROK),
|
||||
PAD_CFG_NF(GPD10, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPD11, NONE, PWROK),
|
||||
PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A7, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_A8, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1),
|
||||
_PAD_CFG_STRUCT(GPP_A11, 0x80100100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_A12, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_A15, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_A16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A17, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A18, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A19, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_A20, 0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_A21, NONE, DEEP),
|
||||
PAD_NC(GPP_A22, NONE),
|
||||
PAD_CFG_GPI(GPP_A23, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B2, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_B3, 0x80100100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_B4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B6, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_B11, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_B15, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B17, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B18, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B19, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_B23, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_C2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C7, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C8, NONE, DEEP),
|
||||
PAD_NC(GPP_C9, NONE),
|
||||
PAD_CFG_TERM_GPO(GPP_C10, 0, NONE, PLTRST),
|
||||
PAD_CFG_GPI(GPP_C11, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_C12, 1, NONE, PLTRST),
|
||||
PAD_CFG_TERM_GPO(GPP_C13, 1, NONE, PLTRST),
|
||||
PAD_CFG_TERM_GPO(GPP_C14, 0, NONE, PLTRST),
|
||||
PAD_NC(GPP_C15, NONE),
|
||||
PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_C18, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C19, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_C23, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D7, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D8, 1, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_D9, 0x40880100, 0x0000),
|
||||
PAD_CFG_GPI(GPP_D10, NONE, DEEP),
|
||||
PAD_NC(GPP_D11, NONE),
|
||||
PAD_CFG_GPI(GPP_D12, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D13, 1, NONE, PLTRST),
|
||||
PAD_CFG_TERM_GPO(GPP_D14, 1, NONE, PLTRST),
|
||||
PAD_CFG_GPI(GPP_D15, NONE, DEEP),
|
||||
PAD_CFG_TERM_GPO(GPP_D16, 1, NONE, PWROK),
|
||||
PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_D21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_D23, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E1, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_E2, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E4, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_E6, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E7, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E12, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E15, NONE, DEEP),
|
||||
_PAD_CFG_STRUCT(GPP_E16, 0x80880100, 0x0000),
|
||||
PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_E18, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_E19, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_E22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_E23, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_F1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F3, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F5, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F6, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F7, UP_20K, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F8, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_F9, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_F10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F14, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F15, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F17, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F18, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F19, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F21, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F22, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_F23, DN_20K, DEEP),
|
||||
PAD_CFG_GPI(GPP_G0, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G1, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G2, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G3, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G4, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G5, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_G7, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H0, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_H1, NONE, DEEP, NF3),
|
||||
PAD_CFG_NF(GPP_H2, NONE, DEEP, NF3),
|
||||
PAD_CFG_GPI(GPP_H3, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
|
||||
PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_H6, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H7, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H8, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H9, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H10, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H11, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H12, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H13, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H14, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H15, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H16, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H17, NONE, DEEP),
|
||||
PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1),
|
||||
PAD_CFG_GPI(GPP_H19, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H20, NONE, DEEP),
|
||||
PAD_CFG_GPI(GPP_H21, NONE, DEEP),
|
||||
PAD_NC(GPP_H22, NONE),
|
||||
PAD_CFG_GPI(GPP_H23, NONE, DEEP),
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
52
models/lemp9/hda.h
Normal file
52
models/lemp9/hda.h
Normal file
@@ -0,0 +1,52 @@
|
||||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2019 System76
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef HDA_VERB_H
|
||||
#define HDA_VERB_H
|
||||
|
||||
#include <device/azalia_device.h>
|
||||
|
||||
const u32 cim_verb_data[] = {
|
||||
/* Realtek, ALC293 */
|
||||
0x10ec0293, /* Vendor ID */
|
||||
0x15581401, /* Subsystem ID */
|
||||
12, /* Number of entries */
|
||||
AZALIA_SUBVENDOR(0, 0x15581401),
|
||||
AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
|
||||
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
|
||||
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||
AZALIA_PIN_CFG(0, 0x15, 0x02211020),
|
||||
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||
AZALIA_PIN_CFG(0, 0x1d, 0x41748245),
|
||||
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||
/* Intel, KabylakeHDMI */
|
||||
0x8086280b, /* Vendor ID */
|
||||
0x80860101, /* Subsystem ID */
|
||||
4, /* Number of entries */
|
||||
AZALIA_SUBVENDOR(2, 0x80860101),
|
||||
AZALIA_PIN_CFG(2, 0x05, 0x18560010),
|
||||
AZALIA_PIN_CFG(2, 0x06, 0x18560010),
|
||||
AZALIA_PIN_CFG(2, 0x07, 0x18560010),
|
||||
};
|
||||
|
||||
const u32 pc_beep_verbs[] = {};
|
||||
|
||||
AZALIA_ARRAY_SIZES;
|
||||
|
||||
#endif
|
||||
BIN
models/lemp9/me.rom
(Stored with Git LFS)
Normal file
BIN
models/lemp9/me.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/lemp9/microcode.rom
(Stored with Git LFS)
Normal file
BIN
models/lemp9/microcode.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/lemp9/uecflash.efi
(Stored with Git LFS)
Normal file
BIN
models/lemp9/uecflash.efi
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/lemp9/vbt.rom
(Stored with Git LFS)
Normal file
BIN
models/lemp9/vbt.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
Reference in New Issue
Block a user