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tigerlake-
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30
.github/ISSUE_TEMPLATE/bug_report.md
vendored
Normal file
30
.github/ISSUE_TEMPLATE/bug_report.md
vendored
Normal file
@@ -0,0 +1,30 @@
|
|||||||
|
---
|
||||||
|
name: Bug report
|
||||||
|
about: Report a problem
|
||||||
|
title: ''
|
||||||
|
labels: []
|
||||||
|
assignees: []
|
||||||
|
---
|
||||||
|
|
||||||
|
- Model: <!-- `cat /sys/class/dmi/id/product_version` (e.g.: gaze16-3050) -->
|
||||||
|
- BIOS version: <!-- `cat /sys/class/dmi/id/bios_version` (e.g.: 2021-09-30_14b8a6e)-->
|
||||||
|
- EC version: <!-- This will match the BIOS version unless you flashed it separately. -->
|
||||||
|
- OS: <!-- e.g.: Pop!_OS 21.10, Fedora 35, Windows 11 -->
|
||||||
|
|
||||||
|
<!-- Briefly describe the problem. -->
|
||||||
|
|
||||||
|
### Steps to reproduce
|
||||||
|
|
||||||
|
<!-- Provide a list of steps to reproduce the issue. -->
|
||||||
|
|
||||||
|
### Expected behavior
|
||||||
|
|
||||||
|
<!-- Describe what you think should happen. -->
|
||||||
|
|
||||||
|
### Actual behavior
|
||||||
|
|
||||||
|
<!-- Describe what actually happens. -->
|
||||||
|
|
||||||
|
### Additional info
|
||||||
|
|
||||||
|
<!-- Any extra info you think may be relevant. -->
|
8
.github/ISSUE_TEMPLATE/config.yml
vendored
Normal file
8
.github/ISSUE_TEMPLATE/config.yml
vendored
Normal file
@@ -0,0 +1,8 @@
|
|||||||
|
blank_issues_enabled: true
|
||||||
|
contact_links:
|
||||||
|
- name: Open a Support Ticket
|
||||||
|
url: https://system76.com/my-account/support-tickets/new
|
||||||
|
about: Get support for your System76 hardware
|
||||||
|
- name: Pop!_OS chat
|
||||||
|
url: https://chat.pop-os.org/
|
||||||
|
about: Pop!_OS Mattermost
|
3
.gitignore
vendored
3
.gitignore
vendored
@@ -1,2 +1,3 @@
|
|||||||
build
|
|
||||||
backup.rom
|
backup.rom
|
||||||
|
build/
|
||||||
|
extract/
|
||||||
|
28
.gitmodules
vendored
28
.gitmodules
vendored
@@ -10,14 +10,6 @@
|
|||||||
path = edk2-platforms
|
path = edk2-platforms
|
||||||
url = https://github.com/system76/edk2-platforms.git
|
url = https://github.com/system76/edk2-platforms.git
|
||||||
branch = system76
|
branch = system76
|
||||||
[submodule "tools/unME12"]
|
|
||||||
path = tools/unME12
|
|
||||||
url = https://github.com/ptresearch/unME12.git
|
|
||||||
branch = master
|
|
||||||
[submodule "tools/unME11"]
|
|
||||||
path = tools/unME11
|
|
||||||
url = https://github.com/ptresearch/unME11.git
|
|
||||||
branch = master
|
|
||||||
[submodule "tools/UEFITool"]
|
[submodule "tools/UEFITool"]
|
||||||
path = tools/UEFITool
|
path = tools/UEFITool
|
||||||
url = https://github.com/LongSoft/UEFITool.git
|
url = https://github.com/LongSoft/UEFITool.git
|
||||||
@@ -30,14 +22,6 @@
|
|||||||
path = libs/uefi
|
path = libs/uefi
|
||||||
url = https://gitlab.redox-os.org/redox-os/uefi.git
|
url = https://gitlab.redox-os.org/redox-os/uefi.git
|
||||||
branch = master
|
branch = master
|
||||||
[submodule "libs/uefi_alloc"]
|
|
||||||
path = libs/uefi_alloc
|
|
||||||
url = https://gitlab.redox-os.org/redox-os/uefi_alloc.git
|
|
||||||
branch = master
|
|
||||||
[submodule "libs/uefi_std"]
|
|
||||||
path = libs/uefi_std
|
|
||||||
url = https://gitlab.redox-os.org/redox-os/uefi_std.git
|
|
||||||
branch = master
|
|
||||||
[submodule "libs/coreboot-table"]
|
[submodule "libs/coreboot-table"]
|
||||||
path = libs/coreboot-table
|
path = libs/coreboot-table
|
||||||
url = https://gitlab.redox-os.org/redox-os/coreboot-table.git
|
url = https://gitlab.redox-os.org/redox-os/coreboot-table.git
|
||||||
@@ -46,10 +30,6 @@
|
|||||||
path = libs/intel-spi
|
path = libs/intel-spi
|
||||||
url = https://github.com/system76/intel-spi.git
|
url = https://github.com/system76/intel-spi.git
|
||||||
branch = master
|
branch = master
|
||||||
[submodule "libs/ecflash"]
|
|
||||||
path = libs/ecflash
|
|
||||||
url = https://github.com/system76/ecflash.git
|
|
||||||
branch = master
|
|
||||||
[submodule "tools/coreboot-collector"]
|
[submodule "tools/coreboot-collector"]
|
||||||
path = tools/coreboot-collector
|
path = tools/coreboot-collector
|
||||||
url = https://github.com/system76/coreboot-collector.git
|
url = https://github.com/system76/coreboot-collector.git
|
||||||
@@ -82,10 +62,6 @@
|
|||||||
path = FSP
|
path = FSP
|
||||||
url = https://github.com/IntelFsp/FSP.git
|
url = https://github.com/IntelFsp/FSP.git
|
||||||
branch = master
|
branch = master
|
||||||
[submodule "libs/smmstore"]
|
|
||||||
path = libs/smmstore
|
|
||||||
url = https://github.com/system76/smmstore.git
|
|
||||||
branch = master
|
|
||||||
[submodule "apps/firmware-smmstore"]
|
[submodule "apps/firmware-smmstore"]
|
||||||
path = apps/firmware-smmstore
|
path = apps/firmware-smmstore
|
||||||
url = https://github.com/system76/firmware-smmstore.git
|
url = https://github.com/system76/firmware-smmstore.git
|
||||||
@@ -102,3 +78,7 @@
|
|||||||
path = tools/apobtool
|
path = tools/apobtool
|
||||||
url = https://github.com/system76/apobtool.git
|
url = https://github.com/system76/apobtool.git
|
||||||
branch = master
|
branch = master
|
||||||
|
[submodule "tools/PSPTool"]
|
||||||
|
path = tools/PSPTool
|
||||||
|
url = https://github.com/PSPReverse/PSPTool.git
|
||||||
|
branch = master
|
||||||
|
210
CHANGELOG.md
Normal file
210
CHANGELOG.md
Normal file
@@ -0,0 +1,210 @@
|
|||||||
|
# Changelog
|
||||||
|
|
||||||
|
Changes are identified by the date of the released firmware including them. If
|
||||||
|
you are running System76 Open Firmware, opening the boot menu will show this
|
||||||
|
date followed by an underscore and a short git revision.
|
||||||
|
|
||||||
|
## 2022-07-05
|
||||||
|
|
||||||
|
- lemp11: Fix power off under load while on battery power
|
||||||
|
|
||||||
|
## 2022-06-29
|
||||||
|
|
||||||
|
- lemp11: Release of open firmare with System76 EC
|
||||||
|
|
||||||
|
## 2022-06-23
|
||||||
|
|
||||||
|
- darp8: Release of open firmware with System76 EC
|
||||||
|
|
||||||
|
## 2022-06-07
|
||||||
|
|
||||||
|
- Fixed building for QEMU
|
||||||
|
- Updated coreboot to upstream commit 670572ff6a
|
||||||
|
- Improved NVIDIA Optimus support
|
||||||
|
- gaze17-3060-b: Release of open firmware with System76 EC
|
||||||
|
|
||||||
|
## 2022-02-15
|
||||||
|
|
||||||
|
- Update ME for all supported systems
|
||||||
|
- Ensure that system powers off S5 plane if it fails to reach S0
|
||||||
|
|
||||||
|
## 2022-01-06
|
||||||
|
|
||||||
|
- Added support to enable/disable Intel ME via the CMOS option `me_state`
|
||||||
|
- Enabled coreboot measured boot
|
||||||
|
- Updated Rust toolchain to nightly-2021-06-15
|
||||||
|
- Updated coreboot to 4.15
|
||||||
|
- Updated EDK2 to edk2-stabke202108
|
||||||
|
- Updated TGL-U microcode blobs to revision 0x9a
|
||||||
|
- Updated TGL-H microcode blobs to revision 0x3c
|
||||||
|
- Updated all other boards to use microcode blobs from Intel's public repo
|
||||||
|
- Updated TGL FSP to A.0.51.31 from Intel's public repo
|
||||||
|
- Removed behavior of erasing NVRAM on CMOS reset
|
||||||
|
|
||||||
|
## 2021-09-30
|
||||||
|
|
||||||
|
- gaze16: Do not require unplugging the AC adapter after flashing
|
||||||
|
- gaze16: Fix using USB 2.0 devices in Type-C port
|
||||||
|
|
||||||
|
## 2021-09-23
|
||||||
|
|
||||||
|
- oryp8: Release of open firmware with System76 EC
|
||||||
|
- gaze16: Fix input current on 3050 variant
|
||||||
|
- gaze16: Fix power limit when booting on battery
|
||||||
|
- gaze16: Fix touchpad on newer Linux kernel and Windows
|
||||||
|
- Fix brightness controls on TGL platforms
|
||||||
|
- Fix PCIe subsystem IDs on TGL platforms
|
||||||
|
- Fix spurious clearing of boot options on Windows
|
||||||
|
- Provide battery cycle count
|
||||||
|
|
||||||
|
## 2021-07-20
|
||||||
|
|
||||||
|
- gaze16: Release of open firmware with System76 EC
|
||||||
|
- Improved thermals by syncing CPU and GPU fans
|
||||||
|
- Enabled fan speed interpolation
|
||||||
|
- Fixed ACPI timeout on S3 resume if a key is held
|
||||||
|
- Fixed keyboard responsiveness when touchpad uses wrong protocol
|
||||||
|
- Fixed entering firmware-setup due to missed keystrokes on boot
|
||||||
|
- Added scroll lock to default keyboard layouts
|
||||||
|
|
||||||
|
## 2021-04-07
|
||||||
|
|
||||||
|
- darp7, galp5, lemp10: Update microcode
|
||||||
|
|
||||||
|
## 2021-04-02
|
||||||
|
|
||||||
|
- Fix fan max keeping fan on when in S0iX
|
||||||
|
- Report all keys as released when lid is closed
|
||||||
|
|
||||||
|
## 2021-03-19
|
||||||
|
|
||||||
|
- gaze15: Release of open firmware with System76 EC
|
||||||
|
- gaze15: Add ELAN touchpad settings
|
||||||
|
|
||||||
|
## 2021-03-16
|
||||||
|
|
||||||
|
- oryp6, oryp7: Fix buzzing at lowest fan speed
|
||||||
|
|
||||||
|
## 2021-03-11
|
||||||
|
|
||||||
|
- lemp9: Fix backlight ACPI issues and TPM interrupt
|
||||||
|
|
||||||
|
## 2021-03-08
|
||||||
|
|
||||||
|
- oryp6, oryp7: Improved fan curve
|
||||||
|
|
||||||
|
## 2021-03-03
|
||||||
|
|
||||||
|
- oryp7: Release of open firmware with System76 EC
|
||||||
|
|
||||||
|
## 2021-02-15
|
||||||
|
|
||||||
|
- darp7, galp5: Raise HDMI data rate to support 4K@60Hz
|
||||||
|
|
||||||
|
## 2021-02-09
|
||||||
|
|
||||||
|
- galp5: Fix GPU driver crash in compute graphics mode
|
||||||
|
|
||||||
|
## 2021-02-05
|
||||||
|
|
||||||
|
- darp7: Fix keyboard scanning glitches
|
||||||
|
|
||||||
|
## 2021-01-21
|
||||||
|
|
||||||
|
- darp7: Release of open firmware with System76 EC
|
||||||
|
|
||||||
|
## 2021-01-19
|
||||||
|
|
||||||
|
- Update boot options on device hotplug
|
||||||
|
- Add fan toggle key (Fn+1)
|
||||||
|
- Clear NVRAM when CMOS battery is removed
|
||||||
|
- galp5, lemp10: Fix NVRAM compacting
|
||||||
|
|
||||||
|
## 2021-12-15
|
||||||
|
|
||||||
|
- galp5: Support variant with NVIDIA GPU
|
||||||
|
|
||||||
|
## 2020-12-04
|
||||||
|
|
||||||
|
- galp5, lemp10: Release of open firmware with System76 EC
|
||||||
|
|
||||||
|
## 2020-10-19
|
||||||
|
|
||||||
|
- Support customizing keyboard at runtime
|
||||||
|
- Add battery charging thresholds
|
||||||
|
- oryp6: Fix smart charger values
|
||||||
|
- Prevent wake when lid is closed
|
||||||
|
|
||||||
|
## 2020-09-22
|
||||||
|
|
||||||
|
- darp6: Release of open firmware with System76 EC
|
||||||
|
- darp6: Fix allocation of memory type range registers
|
||||||
|
|
||||||
|
## 2020-09-17
|
||||||
|
|
||||||
|
- Enable Wake-on-Lan (on supported models)
|
||||||
|
- Add ACPI thermal interface
|
||||||
|
- Fix ESXi keyboard issue
|
||||||
|
|
||||||
|
## 2020-09-03
|
||||||
|
|
||||||
|
- addw2: Release of open firmware with System76 EC
|
||||||
|
|
||||||
|
## 2020-08-24
|
||||||
|
|
||||||
|
- bonw14: Release of open firmware with System76 EC
|
||||||
|
|
||||||
|
## 2020-08-13
|
||||||
|
|
||||||
|
- Add UEFI TPM2 support
|
||||||
|
|
||||||
|
## 2020-08-06
|
||||||
|
|
||||||
|
- Enable ACPI backlight
|
||||||
|
- Add firmware configuration information
|
||||||
|
|
||||||
|
## 2020-07-06
|
||||||
|
|
||||||
|
- oryp6: Release of open firmware with System76 EC
|
||||||
|
|
||||||
|
## 2020-05-20
|
||||||
|
|
||||||
|
- Warn if no bootable media is found
|
||||||
|
|
||||||
|
## 2020-05-15
|
||||||
|
|
||||||
|
- Enable i2c-hid touchpad interface
|
||||||
|
|
||||||
|
## 2020-05-07
|
||||||
|
|
||||||
|
- Fix ghost key debouncing
|
||||||
|
|
||||||
|
## 2020-05-04
|
||||||
|
|
||||||
|
- Improve ghost key handling and reduce key debounce
|
||||||
|
|
||||||
|
## 2020-04-23
|
||||||
|
|
||||||
|
- Fix duplicate release of key after release of function key
|
||||||
|
|
||||||
|
## 2020-04-18
|
||||||
|
|
||||||
|
- lemp9: Update fan curve
|
||||||
|
|
||||||
|
## 2020-04-09
|
||||||
|
|
||||||
|
- lemp9: Release of open firmware with System76 EC
|
||||||
|
|
||||||
|
## 2020-02-05
|
||||||
|
|
||||||
|
- Use descriptive device names
|
||||||
|
- Only show bootable devices
|
||||||
|
|
||||||
|
## 2020-01-13
|
||||||
|
|
||||||
|
- Fix NVIDIA eGPU issues
|
||||||
|
- Iimprove boot order editing
|
||||||
|
|
||||||
|
## 2019-10-31
|
||||||
|
|
||||||
|
- darp6, galp4: Release of open firmware with proprietary EC
|
2
FSP
2
FSP
Submodule FSP updated: 26e31fd803...10eae55b8e
43
LICENSE.md
Normal file
43
LICENSE.md
Normal file
@@ -0,0 +1,43 @@
|
|||||||
|
# License
|
||||||
|
|
||||||
|
System76 Open Firmware consists of multiple projects under different licenses.
|
||||||
|
|
||||||
|
The source components are made available under the following licenses:
|
||||||
|
|
||||||
|
| Component | License |
|
||||||
|
| --------- | ------- |
|
||||||
|
| coreboot | GPL-2.0-only |
|
||||||
|
| edk2 | BSD-2-Clause-Patent |
|
||||||
|
| firmware-setup | GPL-3.0-only |
|
||||||
|
| ec | GPL-3.0-only |
|
||||||
|
| Intel CSME | Proprietary |
|
||||||
|
| Intel FSP | Proprietary |
|
||||||
|
| Intel microcode | Proprietary |
|
||||||
|
|
||||||
|
## Binaries
|
||||||
|
|
||||||
|
### `ec.rom`
|
||||||
|
|
||||||
|
The license for the embedded controller firmware depends on the binary used.
|
||||||
|
|
||||||
|
- System76 EC firmware: GPL-3.0-only
|
||||||
|
- ODM-provided firmware: Proprietary
|
||||||
|
|
||||||
|
### `firmware.rom`
|
||||||
|
|
||||||
|
`firmware.rom` contains multiple projects under different licenses.
|
||||||
|
|
||||||
|
- coreboot: GPL-2.0-only
|
||||||
|
- edk2-based payload: GPL-3.0-only
|
||||||
|
- Intel binaries: Proprietary
|
||||||
|
|
||||||
|
#### Intel binaries
|
||||||
|
|
||||||
|
Intel provides biniaries under a redistributable license, which may be
|
||||||
|
different per binary.
|
||||||
|
|
||||||
|
- `me.rom`: Intel CSME
|
||||||
|
- `Fsp.fd`: [Intel FSP](https://github.com/intel/fsp)
|
||||||
|
- [`FSP_License.pdf`](https://github.com/intel/FSP/blob/master/FSP_License.pdf)
|
||||||
|
- `microcode.rom`: [Intel microcode](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files)
|
||||||
|
- [`license`](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/blob/main/license)
|
49
LICENSES/BSD-2-Clause-Patent.txt
Normal file
49
LICENSES/BSD-2-Clause-Patent.txt
Normal file
@@ -0,0 +1,49 @@
|
|||||||
|
Copyright (c) <YEAR>, <COPYRIGHT HOLDERS>
|
||||||
|
|
||||||
|
Redistribution and use in source and binary forms, with or without
|
||||||
|
modification, are permitted provided that the following conditions are met:
|
||||||
|
|
||||||
|
1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
this list of conditions and the following disclaimer.
|
||||||
|
|
||||||
|
2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
this list of conditions and the following disclaimer in the documentation
|
||||||
|
and/or other materials provided with the distribution.
|
||||||
|
|
||||||
|
Subject to the terms and conditions of this license, each copyright holder
|
||||||
|
and contributor hereby grants to those receiving rights under this license
|
||||||
|
a perpetual, worldwide, non-exclusive, no-charge, royalty-free, irrevocable
|
||||||
|
(except for failure to satisfy the conditions of this license) patent
|
||||||
|
license to make, have made, use, offer to sell, sell, import, and otherwise
|
||||||
|
transfer this software, where such license applies only to those patent
|
||||||
|
claims, already acquired or hereafter acquired, licensable by such copyright
|
||||||
|
holder or contributor that are necessarily infringed by:
|
||||||
|
|
||||||
|
(a) their Contribution(s) (the licensed copyrights of copyright holders and
|
||||||
|
non-copyrightable additions of contributors, in source or binary form)
|
||||||
|
alone; or
|
||||||
|
|
||||||
|
(b) combination of their Contribution(s) with the work of authorship to
|
||||||
|
which such Contribution(s) was added by such copyright holder or
|
||||||
|
contributor, if, at the time the Contribution is added, such addition
|
||||||
|
causes such combination to be necessarily infringed. The patent license
|
||||||
|
shall not apply to any other combinations which include the
|
||||||
|
Contribution.
|
||||||
|
|
||||||
|
Except as expressly stated above, no rights or licenses from any copyright
|
||||||
|
holder or contributor is granted under this license, whether expressly, by
|
||||||
|
implication, estoppel or otherwise.
|
||||||
|
|
||||||
|
DISCLAIMER
|
||||||
|
|
||||||
|
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||||
|
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
|
||||||
|
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||||
|
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||||
|
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||||
|
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||||
|
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||||
|
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
POSSIBILITY OF SUCH DAMAGE.
|
339
LICENSES/GPL-2.0-only.txt
Normal file
339
LICENSES/GPL-2.0-only.txt
Normal file
@@ -0,0 +1,339 @@
|
|||||||
|
GNU GENERAL PUBLIC LICENSE
|
||||||
|
Version 2, June 1991
|
||||||
|
|
||||||
|
Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
|
||||||
|
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
|
||||||
|
Everyone is permitted to copy and distribute verbatim copies
|
||||||
|
of this license document, but changing it is not allowed.
|
||||||
|
|
||||||
|
Preamble
|
||||||
|
|
||||||
|
The licenses for most software are designed to take away your
|
||||||
|
freedom to share and change it. By contrast, the GNU General Public
|
||||||
|
License is intended to guarantee your freedom to share and change free
|
||||||
|
software--to make sure the software is free for all its users. This
|
||||||
|
General Public License applies to most of the Free Software
|
||||||
|
Foundation's software and to any other program whose authors commit to
|
||||||
|
using it. (Some other Free Software Foundation software is covered by
|
||||||
|
the GNU Lesser General Public License instead.) You can apply it to
|
||||||
|
your programs, too.
|
||||||
|
|
||||||
|
When we speak of free software, we are referring to freedom, not
|
||||||
|
price. Our General Public Licenses are designed to make sure that you
|
||||||
|
have the freedom to distribute copies of free software (and charge for
|
||||||
|
this service if you wish), that you receive source code or can get it
|
||||||
|
if you want it, that you can change the software or use pieces of it
|
||||||
|
in new free programs; and that you know you can do these things.
|
||||||
|
|
||||||
|
To protect your rights, we need to make restrictions that forbid
|
||||||
|
anyone to deny you these rights or to ask you to surrender the rights.
|
||||||
|
These restrictions translate to certain responsibilities for you if you
|
||||||
|
distribute copies of the software, or if you modify it.
|
||||||
|
|
||||||
|
For example, if you distribute copies of such a program, whether
|
||||||
|
gratis or for a fee, you must give the recipients all the rights that
|
||||||
|
you have. You must make sure that they, too, receive or can get the
|
||||||
|
source code. And you must show them these terms so they know their
|
||||||
|
rights.
|
||||||
|
|
||||||
|
We protect your rights with two steps: (1) copyright the software, and
|
||||||
|
(2) offer you this license which gives you legal permission to copy,
|
||||||
|
distribute and/or modify the software.
|
||||||
|
|
||||||
|
Also, for each author's protection and ours, we want to make certain
|
||||||
|
that everyone understands that there is no warranty for this free
|
||||||
|
software. If the software is modified by someone else and passed on, we
|
||||||
|
want its recipients to know that what they have is not the original, so
|
||||||
|
that any problems introduced by others will not reflect on the original
|
||||||
|
authors' reputations.
|
||||||
|
|
||||||
|
Finally, any free program is threatened constantly by software
|
||||||
|
patents. We wish to avoid the danger that redistributors of a free
|
||||||
|
program will individually obtain patent licenses, in effect making the
|
||||||
|
program proprietary. To prevent this, we have made it clear that any
|
||||||
|
patent must be licensed for everyone's free use or not licensed at all.
|
||||||
|
|
||||||
|
The precise terms and conditions for copying, distribution and
|
||||||
|
modification follow.
|
||||||
|
|
||||||
|
GNU GENERAL PUBLIC LICENSE
|
||||||
|
TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
|
||||||
|
|
||||||
|
0. This License applies to any program or other work which contains
|
||||||
|
a notice placed by the copyright holder saying it may be distributed
|
||||||
|
under the terms of this General Public License. The "Program", below,
|
||||||
|
refers to any such program or work, and a "work based on the Program"
|
||||||
|
means either the Program or any derivative work under copyright law:
|
||||||
|
that is to say, a work containing the Program or a portion of it,
|
||||||
|
either verbatim or with modifications and/or translated into another
|
||||||
|
language. (Hereinafter, translation is included without limitation in
|
||||||
|
the term "modification".) Each licensee is addressed as "you".
|
||||||
|
|
||||||
|
Activities other than copying, distribution and modification are not
|
||||||
|
covered by this License; they are outside its scope. The act of
|
||||||
|
running the Program is not restricted, and the output from the Program
|
||||||
|
is covered only if its contents constitute a work based on the
|
||||||
|
Program (independent of having been made by running the Program).
|
||||||
|
Whether that is true depends on what the Program does.
|
||||||
|
|
||||||
|
1. You may copy and distribute verbatim copies of the Program's
|
||||||
|
source code as you receive it, in any medium, provided that you
|
||||||
|
conspicuously and appropriately publish on each copy an appropriate
|
||||||
|
copyright notice and disclaimer of warranty; keep intact all the
|
||||||
|
notices that refer to this License and to the absence of any warranty;
|
||||||
|
and give any other recipients of the Program a copy of this License
|
||||||
|
along with the Program.
|
||||||
|
|
||||||
|
You may charge a fee for the physical act of transferring a copy, and
|
||||||
|
you may at your option offer warranty protection in exchange for a fee.
|
||||||
|
|
||||||
|
2. You may modify your copy or copies of the Program or any portion
|
||||||
|
of it, thus forming a work based on the Program, and copy and
|
||||||
|
distribute such modifications or work under the terms of Section 1
|
||||||
|
above, provided that you also meet all of these conditions:
|
||||||
|
|
||||||
|
a) You must cause the modified files to carry prominent notices
|
||||||
|
stating that you changed the files and the date of any change.
|
||||||
|
|
||||||
|
b) You must cause any work that you distribute or publish, that in
|
||||||
|
whole or in part contains or is derived from the Program or any
|
||||||
|
part thereof, to be licensed as a whole at no charge to all third
|
||||||
|
parties under the terms of this License.
|
||||||
|
|
||||||
|
c) If the modified program normally reads commands interactively
|
||||||
|
when run, you must cause it, when started running for such
|
||||||
|
interactive use in the most ordinary way, to print or display an
|
||||||
|
announcement including an appropriate copyright notice and a
|
||||||
|
notice that there is no warranty (or else, saying that you provide
|
||||||
|
a warranty) and that users may redistribute the program under
|
||||||
|
these conditions, and telling the user how to view a copy of this
|
||||||
|
License. (Exception: if the Program itself is interactive but
|
||||||
|
does not normally print such an announcement, your work based on
|
||||||
|
the Program is not required to print an announcement.)
|
||||||
|
|
||||||
|
These requirements apply to the modified work as a whole. If
|
||||||
|
identifiable sections of that work are not derived from the Program,
|
||||||
|
and can be reasonably considered independent and separate works in
|
||||||
|
themselves, then this License, and its terms, do not apply to those
|
||||||
|
sections when you distribute them as separate works. But when you
|
||||||
|
distribute the same sections as part of a whole which is a work based
|
||||||
|
on the Program, the distribution of the whole must be on the terms of
|
||||||
|
this License, whose permissions for other licensees extend to the
|
||||||
|
entire whole, and thus to each and every part regardless of who wrote it.
|
||||||
|
|
||||||
|
Thus, it is not the intent of this section to claim rights or contest
|
||||||
|
your rights to work written entirely by you; rather, the intent is to
|
||||||
|
exercise the right to control the distribution of derivative or
|
||||||
|
collective works based on the Program.
|
||||||
|
|
||||||
|
In addition, mere aggregation of another work not based on the Program
|
||||||
|
with the Program (or with a work based on the Program) on a volume of
|
||||||
|
a storage or distribution medium does not bring the other work under
|
||||||
|
the scope of this License.
|
||||||
|
|
||||||
|
3. You may copy and distribute the Program (or a work based on it,
|
||||||
|
under Section 2) in object code or executable form under the terms of
|
||||||
|
Sections 1 and 2 above provided that you also do one of the following:
|
||||||
|
|
||||||
|
a) Accompany it with the complete corresponding machine-readable
|
||||||
|
source code, which must be distributed under the terms of Sections
|
||||||
|
1 and 2 above on a medium customarily used for software interchange; or,
|
||||||
|
|
||||||
|
b) Accompany it with a written offer, valid for at least three
|
||||||
|
years, to give any third party, for a charge no more than your
|
||||||
|
cost of physically performing source distribution, a complete
|
||||||
|
machine-readable copy of the corresponding source code, to be
|
||||||
|
distributed under the terms of Sections 1 and 2 above on a medium
|
||||||
|
customarily used for software interchange; or,
|
||||||
|
|
||||||
|
c) Accompany it with the information you received as to the offer
|
||||||
|
to distribute corresponding source code. (This alternative is
|
||||||
|
allowed only for noncommercial distribution and only if you
|
||||||
|
received the program in object code or executable form with such
|
||||||
|
an offer, in accord with Subsection b above.)
|
||||||
|
|
||||||
|
The source code for a work means the preferred form of the work for
|
||||||
|
making modifications to it. For an executable work, complete source
|
||||||
|
code means all the source code for all modules it contains, plus any
|
||||||
|
associated interface definition files, plus the scripts used to
|
||||||
|
control compilation and installation of the executable. However, as a
|
||||||
|
special exception, the source code distributed need not include
|
||||||
|
anything that is normally distributed (in either source or binary
|
||||||
|
form) with the major components (compiler, kernel, and so on) of the
|
||||||
|
operating system on which the executable runs, unless that component
|
||||||
|
itself accompanies the executable.
|
||||||
|
|
||||||
|
If distribution of executable or object code is made by offering
|
||||||
|
access to copy from a designated place, then offering equivalent
|
||||||
|
access to copy the source code from the same place counts as
|
||||||
|
distribution of the source code, even though third parties are not
|
||||||
|
compelled to copy the source along with the object code.
|
||||||
|
|
||||||
|
4. You may not copy, modify, sublicense, or distribute the Program
|
||||||
|
except as expressly provided under this License. Any attempt
|
||||||
|
otherwise to copy, modify, sublicense or distribute the Program is
|
||||||
|
void, and will automatically terminate your rights under this License.
|
||||||
|
However, parties who have received copies, or rights, from you under
|
||||||
|
this License will not have their licenses terminated so long as such
|
||||||
|
parties remain in full compliance.
|
||||||
|
|
||||||
|
5. You are not required to accept this License, since you have not
|
||||||
|
signed it. However, nothing else grants you permission to modify or
|
||||||
|
distribute the Program or its derivative works. These actions are
|
||||||
|
prohibited by law if you do not accept this License. Therefore, by
|
||||||
|
modifying or distributing the Program (or any work based on the
|
||||||
|
Program), you indicate your acceptance of this License to do so, and
|
||||||
|
all its terms and conditions for copying, distributing or modifying
|
||||||
|
the Program or works based on it.
|
||||||
|
|
||||||
|
6. Each time you redistribute the Program (or any work based on the
|
||||||
|
Program), the recipient automatically receives a license from the
|
||||||
|
original licensor to copy, distribute or modify the Program subject to
|
||||||
|
these terms and conditions. You may not impose any further
|
||||||
|
restrictions on the recipients' exercise of the rights granted herein.
|
||||||
|
You are not responsible for enforcing compliance by third parties to
|
||||||
|
this License.
|
||||||
|
|
||||||
|
7. If, as a consequence of a court judgment or allegation of patent
|
||||||
|
infringement or for any other reason (not limited to patent issues),
|
||||||
|
conditions are imposed on you (whether by court order, agreement or
|
||||||
|
otherwise) that contradict the conditions of this License, they do not
|
||||||
|
excuse you from the conditions of this License. If you cannot
|
||||||
|
distribute so as to satisfy simultaneously your obligations under this
|
||||||
|
License and any other pertinent obligations, then as a consequence you
|
||||||
|
may not distribute the Program at all. For example, if a patent
|
||||||
|
license would not permit royalty-free redistribution of the Program by
|
||||||
|
all those who receive copies directly or indirectly through you, then
|
||||||
|
the only way you could satisfy both it and this License would be to
|
||||||
|
refrain entirely from distribution of the Program.
|
||||||
|
|
||||||
|
If any portion of this section is held invalid or unenforceable under
|
||||||
|
any particular circumstance, the balance of the section is intended to
|
||||||
|
apply and the section as a whole is intended to apply in other
|
||||||
|
circumstances.
|
||||||
|
|
||||||
|
It is not the purpose of this section to induce you to infringe any
|
||||||
|
patents or other property right claims or to contest validity of any
|
||||||
|
such claims; this section has the sole purpose of protecting the
|
||||||
|
integrity of the free software distribution system, which is
|
||||||
|
implemented by public license practices. Many people have made
|
||||||
|
generous contributions to the wide range of software distributed
|
||||||
|
through that system in reliance on consistent application of that
|
||||||
|
system; it is up to the author/donor to decide if he or she is willing
|
||||||
|
to distribute software through any other system and a licensee cannot
|
||||||
|
impose that choice.
|
||||||
|
|
||||||
|
This section is intended to make thoroughly clear what is believed to
|
||||||
|
be a consequence of the rest of this License.
|
||||||
|
|
||||||
|
8. If the distribution and/or use of the Program is restricted in
|
||||||
|
certain countries either by patents or by copyrighted interfaces, the
|
||||||
|
original copyright holder who places the Program under this License
|
||||||
|
may add an explicit geographical distribution limitation excluding
|
||||||
|
those countries, so that distribution is permitted only in or among
|
||||||
|
countries not thus excluded. In such case, this License incorporates
|
||||||
|
the limitation as if written in the body of this License.
|
||||||
|
|
||||||
|
9. The Free Software Foundation may publish revised and/or new versions
|
||||||
|
of the General Public License from time to time. Such new versions will
|
||||||
|
be similar in spirit to the present version, but may differ in detail to
|
||||||
|
address new problems or concerns.
|
||||||
|
|
||||||
|
Each version is given a distinguishing version number. If the Program
|
||||||
|
specifies a version number of this License which applies to it and "any
|
||||||
|
later version", you have the option of following the terms and conditions
|
||||||
|
either of that version or of any later version published by the Free
|
||||||
|
Software Foundation. If the Program does not specify a version number of
|
||||||
|
this License, you may choose any version ever published by the Free Software
|
||||||
|
Foundation.
|
||||||
|
|
||||||
|
10. If you wish to incorporate parts of the Program into other free
|
||||||
|
programs whose distribution conditions are different, write to the author
|
||||||
|
to ask for permission. For software which is copyrighted by the Free
|
||||||
|
Software Foundation, write to the Free Software Foundation; we sometimes
|
||||||
|
make exceptions for this. Our decision will be guided by the two goals
|
||||||
|
of preserving the free status of all derivatives of our free software and
|
||||||
|
of promoting the sharing and reuse of software generally.
|
||||||
|
|
||||||
|
NO WARRANTY
|
||||||
|
|
||||||
|
11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
|
||||||
|
FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
|
||||||
|
OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
|
||||||
|
PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
|
||||||
|
OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS
|
||||||
|
TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
|
||||||
|
PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
|
||||||
|
REPAIR OR CORRECTION.
|
||||||
|
|
||||||
|
12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
|
||||||
|
WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
|
||||||
|
REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
|
||||||
|
INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
|
||||||
|
OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
|
||||||
|
TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
|
||||||
|
YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
|
||||||
|
PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
|
||||||
|
POSSIBILITY OF SUCH DAMAGES.
|
||||||
|
|
||||||
|
END OF TERMS AND CONDITIONS
|
||||||
|
|
||||||
|
How to Apply These Terms to Your New Programs
|
||||||
|
|
||||||
|
If you develop a new program, and you want it to be of the greatest
|
||||||
|
possible use to the public, the best way to achieve this is to make it
|
||||||
|
free software which everyone can redistribute and change under these terms.
|
||||||
|
|
||||||
|
To do so, attach the following notices to the program. It is safest
|
||||||
|
to attach them to the start of each source file to most effectively
|
||||||
|
convey the exclusion of warranty; and each file should have at least
|
||||||
|
the "copyright" line and a pointer to where the full notice is found.
|
||||||
|
|
||||||
|
<one line to give the program's name and a brief idea of what it does.>
|
||||||
|
Copyright (C) <year> <name of author>
|
||||||
|
|
||||||
|
This program is free software; you can redistribute it and/or modify
|
||||||
|
it under the terms of the GNU General Public License as published by
|
||||||
|
the Free Software Foundation; either version 2 of the License, or
|
||||||
|
(at your option) any later version.
|
||||||
|
|
||||||
|
This program is distributed in the hope that it will be useful,
|
||||||
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
GNU General Public License for more details.
|
||||||
|
|
||||||
|
You should have received a copy of the GNU General Public License along
|
||||||
|
with this program; if not, write to the Free Software Foundation, Inc.,
|
||||||
|
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||||
|
|
||||||
|
Also add information on how to contact you by electronic and paper mail.
|
||||||
|
|
||||||
|
If the program is interactive, make it output a short notice like this
|
||||||
|
when it starts in an interactive mode:
|
||||||
|
|
||||||
|
Gnomovision version 69, Copyright (C) year name of author
|
||||||
|
Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
|
||||||
|
This is free software, and you are welcome to redistribute it
|
||||||
|
under certain conditions; type `show c' for details.
|
||||||
|
|
||||||
|
The hypothetical commands `show w' and `show c' should show the appropriate
|
||||||
|
parts of the General Public License. Of course, the commands you use may
|
||||||
|
be called something other than `show w' and `show c'; they could even be
|
||||||
|
mouse-clicks or menu items--whatever suits your program.
|
||||||
|
|
||||||
|
You should also get your employer (if you work as a programmer) or your
|
||||||
|
school, if any, to sign a "copyright disclaimer" for the program, if
|
||||||
|
necessary. Here is a sample; alter the names:
|
||||||
|
|
||||||
|
Yoyodyne, Inc., hereby disclaims all copyright interest in the program
|
||||||
|
`Gnomovision' (which makes passes at compilers) written by James Hacker.
|
||||||
|
|
||||||
|
<signature of Ty Coon>, 1 April 1989
|
||||||
|
Ty Coon, President of Vice
|
||||||
|
|
||||||
|
This General Public License does not permit incorporating your program into
|
||||||
|
proprietary programs. If your program is a subroutine library, you may
|
||||||
|
consider it more useful to permit linking proprietary applications with the
|
||||||
|
library. If this is what you want to do, use the GNU Lesser General
|
||||||
|
Public License instead of this License.
|
674
LICENSES/GPL-3.0-only.txt
Normal file
674
LICENSES/GPL-3.0-only.txt
Normal file
@@ -0,0 +1,674 @@
|
|||||||
|
GNU GENERAL PUBLIC LICENSE
|
||||||
|
Version 3, 29 June 2007
|
||||||
|
|
||||||
|
Copyright (C) 2007 Free Software Foundation, Inc. <https://fsf.org/>
|
||||||
|
Everyone is permitted to copy and distribute verbatim copies
|
||||||
|
of this license document, but changing it is not allowed.
|
||||||
|
|
||||||
|
Preamble
|
||||||
|
|
||||||
|
The GNU General Public License is a free, copyleft license for
|
||||||
|
software and other kinds of works.
|
||||||
|
|
||||||
|
The licenses for most software and other practical works are designed
|
||||||
|
to take away your freedom to share and change the works. By contrast,
|
||||||
|
the GNU General Public License is intended to guarantee your freedom to
|
||||||
|
share and change all versions of a program--to make sure it remains free
|
||||||
|
software for all its users. We, the Free Software Foundation, use the
|
||||||
|
GNU General Public License for most of our software; it applies also to
|
||||||
|
any other work released this way by its authors. You can apply it to
|
||||||
|
your programs, too.
|
||||||
|
|
||||||
|
When we speak of free software, we are referring to freedom, not
|
||||||
|
price. Our General Public Licenses are designed to make sure that you
|
||||||
|
have the freedom to distribute copies of free software (and charge for
|
||||||
|
them if you wish), that you receive source code or can get it if you
|
||||||
|
want it, that you can change the software or use pieces of it in new
|
||||||
|
free programs, and that you know you can do these things.
|
||||||
|
|
||||||
|
To protect your rights, we need to prevent others from denying you
|
||||||
|
these rights or asking you to surrender the rights. Therefore, you have
|
||||||
|
certain responsibilities if you distribute copies of the software, or if
|
||||||
|
you modify it: responsibilities to respect the freedom of others.
|
||||||
|
|
||||||
|
For example, if you distribute copies of such a program, whether
|
||||||
|
gratis or for a fee, you must pass on to the recipients the same
|
||||||
|
freedoms that you received. You must make sure that they, too, receive
|
||||||
|
or can get the source code. And you must show them these terms so they
|
||||||
|
know their rights.
|
||||||
|
|
||||||
|
Developers that use the GNU GPL protect your rights with two steps:
|
||||||
|
(1) assert copyright on the software, and (2) offer you this License
|
||||||
|
giving you legal permission to copy, distribute and/or modify it.
|
||||||
|
|
||||||
|
For the developers' and authors' protection, the GPL clearly explains
|
||||||
|
that there is no warranty for this free software. For both users' and
|
||||||
|
authors' sake, the GPL requires that modified versions be marked as
|
||||||
|
changed, so that their problems will not be attributed erroneously to
|
||||||
|
authors of previous versions.
|
||||||
|
|
||||||
|
Some devices are designed to deny users access to install or run
|
||||||
|
modified versions of the software inside them, although the manufacturer
|
||||||
|
can do so. This is fundamentally incompatible with the aim of
|
||||||
|
protecting users' freedom to change the software. The systematic
|
||||||
|
pattern of such abuse occurs in the area of products for individuals to
|
||||||
|
use, which is precisely where it is most unacceptable. Therefore, we
|
||||||
|
have designed this version of the GPL to prohibit the practice for those
|
||||||
|
products. If such problems arise substantially in other domains, we
|
||||||
|
stand ready to extend this provision to those domains in future versions
|
||||||
|
of the GPL, as needed to protect the freedom of users.
|
||||||
|
|
||||||
|
Finally, every program is threatened constantly by software patents.
|
||||||
|
States should not allow patents to restrict development and use of
|
||||||
|
software on general-purpose computers, but in those that do, we wish to
|
||||||
|
avoid the special danger that patents applied to a free program could
|
||||||
|
make it effectively proprietary. To prevent this, the GPL assures that
|
||||||
|
patents cannot be used to render the program non-free.
|
||||||
|
|
||||||
|
The precise terms and conditions for copying, distribution and
|
||||||
|
modification follow.
|
||||||
|
|
||||||
|
TERMS AND CONDITIONS
|
||||||
|
|
||||||
|
0. Definitions.
|
||||||
|
|
||||||
|
"This License" refers to version 3 of the GNU General Public License.
|
||||||
|
|
||||||
|
"Copyright" also means copyright-like laws that apply to other kinds of
|
||||||
|
works, such as semiconductor masks.
|
||||||
|
|
||||||
|
"The Program" refers to any copyrightable work licensed under this
|
||||||
|
License. Each licensee is addressed as "you". "Licensees" and
|
||||||
|
"recipients" may be individuals or organizations.
|
||||||
|
|
||||||
|
To "modify" a work means to copy from or adapt all or part of the work
|
||||||
|
in a fashion requiring copyright permission, other than the making of an
|
||||||
|
exact copy. The resulting work is called a "modified version" of the
|
||||||
|
earlier work or a work "based on" the earlier work.
|
||||||
|
|
||||||
|
A "covered work" means either the unmodified Program or a work based
|
||||||
|
on the Program.
|
||||||
|
|
||||||
|
To "propagate" a work means to do anything with it that, without
|
||||||
|
permission, would make you directly or secondarily liable for
|
||||||
|
infringement under applicable copyright law, except executing it on a
|
||||||
|
computer or modifying a private copy. Propagation includes copying,
|
||||||
|
distribution (with or without modification), making available to the
|
||||||
|
public, and in some countries other activities as well.
|
||||||
|
|
||||||
|
To "convey" a work means any kind of propagation that enables other
|
||||||
|
parties to make or receive copies. Mere interaction with a user through
|
||||||
|
a computer network, with no transfer of a copy, is not conveying.
|
||||||
|
|
||||||
|
An interactive user interface displays "Appropriate Legal Notices"
|
||||||
|
to the extent that it includes a convenient and prominently visible
|
||||||
|
feature that (1) displays an appropriate copyright notice, and (2)
|
||||||
|
tells the user that there is no warranty for the work (except to the
|
||||||
|
extent that warranties are provided), that licensees may convey the
|
||||||
|
work under this License, and how to view a copy of this License. If
|
||||||
|
the interface presents a list of user commands or options, such as a
|
||||||
|
menu, a prominent item in the list meets this criterion.
|
||||||
|
|
||||||
|
1. Source Code.
|
||||||
|
|
||||||
|
The "source code" for a work means the preferred form of the work
|
||||||
|
for making modifications to it. "Object code" means any non-source
|
||||||
|
form of a work.
|
||||||
|
|
||||||
|
A "Standard Interface" means an interface that either is an official
|
||||||
|
standard defined by a recognized standards body, or, in the case of
|
||||||
|
interfaces specified for a particular programming language, one that
|
||||||
|
is widely used among developers working in that language.
|
||||||
|
|
||||||
|
The "System Libraries" of an executable work include anything, other
|
||||||
|
than the work as a whole, that (a) is included in the normal form of
|
||||||
|
packaging a Major Component, but which is not part of that Major
|
||||||
|
Component, and (b) serves only to enable use of the work with that
|
||||||
|
Major Component, or to implement a Standard Interface for which an
|
||||||
|
implementation is available to the public in source code form. A
|
||||||
|
"Major Component", in this context, means a major essential component
|
||||||
|
(kernel, window system, and so on) of the specific operating system
|
||||||
|
(if any) on which the executable work runs, or a compiler used to
|
||||||
|
produce the work, or an object code interpreter used to run it.
|
||||||
|
|
||||||
|
The "Corresponding Source" for a work in object code form means all
|
||||||
|
the source code needed to generate, install, and (for an executable
|
||||||
|
work) run the object code and to modify the work, including scripts to
|
||||||
|
control those activities. However, it does not include the work's
|
||||||
|
System Libraries, or general-purpose tools or generally available free
|
||||||
|
programs which are used unmodified in performing those activities but
|
||||||
|
which are not part of the work. For example, Corresponding Source
|
||||||
|
includes interface definition files associated with source files for
|
||||||
|
the work, and the source code for shared libraries and dynamically
|
||||||
|
linked subprograms that the work is specifically designed to require,
|
||||||
|
such as by intimate data communication or control flow between those
|
||||||
|
subprograms and other parts of the work.
|
||||||
|
|
||||||
|
The Corresponding Source need not include anything that users
|
||||||
|
can regenerate automatically from other parts of the Corresponding
|
||||||
|
Source.
|
||||||
|
|
||||||
|
The Corresponding Source for a work in source code form is that
|
||||||
|
same work.
|
||||||
|
|
||||||
|
2. Basic Permissions.
|
||||||
|
|
||||||
|
All rights granted under this License are granted for the term of
|
||||||
|
copyright on the Program, and are irrevocable provided the stated
|
||||||
|
conditions are met. This License explicitly affirms your unlimited
|
||||||
|
permission to run the unmodified Program. The output from running a
|
||||||
|
covered work is covered by this License only if the output, given its
|
||||||
|
content, constitutes a covered work. This License acknowledges your
|
||||||
|
rights of fair use or other equivalent, as provided by copyright law.
|
||||||
|
|
||||||
|
You may make, run and propagate covered works that you do not
|
||||||
|
convey, without conditions so long as your license otherwise remains
|
||||||
|
in force. You may convey covered works to others for the sole purpose
|
||||||
|
of having them make modifications exclusively for you, or provide you
|
||||||
|
with facilities for running those works, provided that you comply with
|
||||||
|
the terms of this License in conveying all material for which you do
|
||||||
|
not control copyright. Those thus making or running the covered works
|
||||||
|
for you must do so exclusively on your behalf, under your direction
|
||||||
|
and control, on terms that prohibit them from making any copies of
|
||||||
|
your copyrighted material outside their relationship with you.
|
||||||
|
|
||||||
|
Conveying under any other circumstances is permitted solely under
|
||||||
|
the conditions stated below. Sublicensing is not allowed; section 10
|
||||||
|
makes it unnecessary.
|
||||||
|
|
||||||
|
3. Protecting Users' Legal Rights From Anti-Circumvention Law.
|
||||||
|
|
||||||
|
No covered work shall be deemed part of an effective technological
|
||||||
|
measure under any applicable law fulfilling obligations under article
|
||||||
|
11 of the WIPO copyright treaty adopted on 20 December 1996, or
|
||||||
|
similar laws prohibiting or restricting circumvention of such
|
||||||
|
measures.
|
||||||
|
|
||||||
|
When you convey a covered work, you waive any legal power to forbid
|
||||||
|
circumvention of technological measures to the extent such circumvention
|
||||||
|
is effected by exercising rights under this License with respect to
|
||||||
|
the covered work, and you disclaim any intention to limit operation or
|
||||||
|
modification of the work as a means of enforcing, against the work's
|
||||||
|
users, your or third parties' legal rights to forbid circumvention of
|
||||||
|
technological measures.
|
||||||
|
|
||||||
|
4. Conveying Verbatim Copies.
|
||||||
|
|
||||||
|
You may convey verbatim copies of the Program's source code as you
|
||||||
|
receive it, in any medium, provided that you conspicuously and
|
||||||
|
appropriately publish on each copy an appropriate copyright notice;
|
||||||
|
keep intact all notices stating that this License and any
|
||||||
|
non-permissive terms added in accord with section 7 apply to the code;
|
||||||
|
keep intact all notices of the absence of any warranty; and give all
|
||||||
|
recipients a copy of this License along with the Program.
|
||||||
|
|
||||||
|
You may charge any price or no price for each copy that you convey,
|
||||||
|
and you may offer support or warranty protection for a fee.
|
||||||
|
|
||||||
|
5. Conveying Modified Source Versions.
|
||||||
|
|
||||||
|
You may convey a work based on the Program, or the modifications to
|
||||||
|
produce it from the Program, in the form of source code under the
|
||||||
|
terms of section 4, provided that you also meet all of these conditions:
|
||||||
|
|
||||||
|
a) The work must carry prominent notices stating that you modified
|
||||||
|
it, and giving a relevant date.
|
||||||
|
|
||||||
|
b) The work must carry prominent notices stating that it is
|
||||||
|
released under this License and any conditions added under section
|
||||||
|
7. This requirement modifies the requirement in section 4 to
|
||||||
|
"keep intact all notices".
|
||||||
|
|
||||||
|
c) You must license the entire work, as a whole, under this
|
||||||
|
License to anyone who comes into possession of a copy. This
|
||||||
|
License will therefore apply, along with any applicable section 7
|
||||||
|
additional terms, to the whole of the work, and all its parts,
|
||||||
|
regardless of how they are packaged. This License gives no
|
||||||
|
permission to license the work in any other way, but it does not
|
||||||
|
invalidate such permission if you have separately received it.
|
||||||
|
|
||||||
|
d) If the work has interactive user interfaces, each must display
|
||||||
|
Appropriate Legal Notices; however, if the Program has interactive
|
||||||
|
interfaces that do not display Appropriate Legal Notices, your
|
||||||
|
work need not make them do so.
|
||||||
|
|
||||||
|
A compilation of a covered work with other separate and independent
|
||||||
|
works, which are not by their nature extensions of the covered work,
|
||||||
|
and which are not combined with it such as to form a larger program,
|
||||||
|
in or on a volume of a storage or distribution medium, is called an
|
||||||
|
"aggregate" if the compilation and its resulting copyright are not
|
||||||
|
used to limit the access or legal rights of the compilation's users
|
||||||
|
beyond what the individual works permit. Inclusion of a covered work
|
||||||
|
in an aggregate does not cause this License to apply to the other
|
||||||
|
parts of the aggregate.
|
||||||
|
|
||||||
|
6. Conveying Non-Source Forms.
|
||||||
|
|
||||||
|
You may convey a covered work in object code form under the terms
|
||||||
|
of sections 4 and 5, provided that you also convey the
|
||||||
|
machine-readable Corresponding Source under the terms of this License,
|
||||||
|
in one of these ways:
|
||||||
|
|
||||||
|
a) Convey the object code in, or embodied in, a physical product
|
||||||
|
(including a physical distribution medium), accompanied by the
|
||||||
|
Corresponding Source fixed on a durable physical medium
|
||||||
|
customarily used for software interchange.
|
||||||
|
|
||||||
|
b) Convey the object code in, or embodied in, a physical product
|
||||||
|
(including a physical distribution medium), accompanied by a
|
||||||
|
written offer, valid for at least three years and valid for as
|
||||||
|
long as you offer spare parts or customer support for that product
|
||||||
|
model, to give anyone who possesses the object code either (1) a
|
||||||
|
copy of the Corresponding Source for all the software in the
|
||||||
|
product that is covered by this License, on a durable physical
|
||||||
|
medium customarily used for software interchange, for a price no
|
||||||
|
more than your reasonable cost of physically performing this
|
||||||
|
conveying of source, or (2) access to copy the
|
||||||
|
Corresponding Source from a network server at no charge.
|
||||||
|
|
||||||
|
c) Convey individual copies of the object code with a copy of the
|
||||||
|
written offer to provide the Corresponding Source. This
|
||||||
|
alternative is allowed only occasionally and noncommercially, and
|
||||||
|
only if you received the object code with such an offer, in accord
|
||||||
|
with subsection 6b.
|
||||||
|
|
||||||
|
d) Convey the object code by offering access from a designated
|
||||||
|
place (gratis or for a charge), and offer equivalent access to the
|
||||||
|
Corresponding Source in the same way through the same place at no
|
||||||
|
further charge. You need not require recipients to copy the
|
||||||
|
Corresponding Source along with the object code. If the place to
|
||||||
|
copy the object code is a network server, the Corresponding Source
|
||||||
|
may be on a different server (operated by you or a third party)
|
||||||
|
that supports equivalent copying facilities, provided you maintain
|
||||||
|
clear directions next to the object code saying where to find the
|
||||||
|
Corresponding Source. Regardless of what server hosts the
|
||||||
|
Corresponding Source, you remain obligated to ensure that it is
|
||||||
|
available for as long as needed to satisfy these requirements.
|
||||||
|
|
||||||
|
e) Convey the object code using peer-to-peer transmission, provided
|
||||||
|
you inform other peers where the object code and Corresponding
|
||||||
|
Source of the work are being offered to the general public at no
|
||||||
|
charge under subsection 6d.
|
||||||
|
|
||||||
|
A separable portion of the object code, whose source code is excluded
|
||||||
|
from the Corresponding Source as a System Library, need not be
|
||||||
|
included in conveying the object code work.
|
||||||
|
|
||||||
|
A "User Product" is either (1) a "consumer product", which means any
|
||||||
|
tangible personal property which is normally used for personal, family,
|
||||||
|
or household purposes, or (2) anything designed or sold for incorporation
|
||||||
|
into a dwelling. In determining whether a product is a consumer product,
|
||||||
|
doubtful cases shall be resolved in favor of coverage. For a particular
|
||||||
|
product received by a particular user, "normally used" refers to a
|
||||||
|
typical or common use of that class of product, regardless of the status
|
||||||
|
of the particular user or of the way in which the particular user
|
||||||
|
actually uses, or expects or is expected to use, the product. A product
|
||||||
|
is a consumer product regardless of whether the product has substantial
|
||||||
|
commercial, industrial or non-consumer uses, unless such uses represent
|
||||||
|
the only significant mode of use of the product.
|
||||||
|
|
||||||
|
"Installation Information" for a User Product means any methods,
|
||||||
|
procedures, authorization keys, or other information required to install
|
||||||
|
and execute modified versions of a covered work in that User Product from
|
||||||
|
a modified version of its Corresponding Source. The information must
|
||||||
|
suffice to ensure that the continued functioning of the modified object
|
||||||
|
code is in no case prevented or interfered with solely because
|
||||||
|
modification has been made.
|
||||||
|
|
||||||
|
If you convey an object code work under this section in, or with, or
|
||||||
|
specifically for use in, a User Product, and the conveying occurs as
|
||||||
|
part of a transaction in which the right of possession and use of the
|
||||||
|
User Product is transferred to the recipient in perpetuity or for a
|
||||||
|
fixed term (regardless of how the transaction is characterized), the
|
||||||
|
Corresponding Source conveyed under this section must be accompanied
|
||||||
|
by the Installation Information. But this requirement does not apply
|
||||||
|
if neither you nor any third party retains the ability to install
|
||||||
|
modified object code on the User Product (for example, the work has
|
||||||
|
been installed in ROM).
|
||||||
|
|
||||||
|
The requirement to provide Installation Information does not include a
|
||||||
|
requirement to continue to provide support service, warranty, or updates
|
||||||
|
for a work that has been modified or installed by the recipient, or for
|
||||||
|
the User Product in which it has been modified or installed. Access to a
|
||||||
|
network may be denied when the modification itself materially and
|
||||||
|
adversely affects the operation of the network or violates the rules and
|
||||||
|
protocols for communication across the network.
|
||||||
|
|
||||||
|
Corresponding Source conveyed, and Installation Information provided,
|
||||||
|
in accord with this section must be in a format that is publicly
|
||||||
|
documented (and with an implementation available to the public in
|
||||||
|
source code form), and must require no special password or key for
|
||||||
|
unpacking, reading or copying.
|
||||||
|
|
||||||
|
7. Additional Terms.
|
||||||
|
|
||||||
|
"Additional permissions" are terms that supplement the terms of this
|
||||||
|
License by making exceptions from one or more of its conditions.
|
||||||
|
Additional permissions that are applicable to the entire Program shall
|
||||||
|
be treated as though they were included in this License, to the extent
|
||||||
|
that they are valid under applicable law. If additional permissions
|
||||||
|
apply only to part of the Program, that part may be used separately
|
||||||
|
under those permissions, but the entire Program remains governed by
|
||||||
|
this License without regard to the additional permissions.
|
||||||
|
|
||||||
|
When you convey a copy of a covered work, you may at your option
|
||||||
|
remove any additional permissions from that copy, or from any part of
|
||||||
|
it. (Additional permissions may be written to require their own
|
||||||
|
removal in certain cases when you modify the work.) You may place
|
||||||
|
additional permissions on material, added by you to a covered work,
|
||||||
|
for which you have or can give appropriate copyright permission.
|
||||||
|
|
||||||
|
Notwithstanding any other provision of this License, for material you
|
||||||
|
add to a covered work, you may (if authorized by the copyright holders of
|
||||||
|
that material) supplement the terms of this License with terms:
|
||||||
|
|
||||||
|
a) Disclaiming warranty or limiting liability differently from the
|
||||||
|
terms of sections 15 and 16 of this License; or
|
||||||
|
|
||||||
|
b) Requiring preservation of specified reasonable legal notices or
|
||||||
|
author attributions in that material or in the Appropriate Legal
|
||||||
|
Notices displayed by works containing it; or
|
||||||
|
|
||||||
|
c) Prohibiting misrepresentation of the origin of that material, or
|
||||||
|
requiring that modified versions of such material be marked in
|
||||||
|
reasonable ways as different from the original version; or
|
||||||
|
|
||||||
|
d) Limiting the use for publicity purposes of names of licensors or
|
||||||
|
authors of the material; or
|
||||||
|
|
||||||
|
e) Declining to grant rights under trademark law for use of some
|
||||||
|
trade names, trademarks, or service marks; or
|
||||||
|
|
||||||
|
f) Requiring indemnification of licensors and authors of that
|
||||||
|
material by anyone who conveys the material (or modified versions of
|
||||||
|
it) with contractual assumptions of liability to the recipient, for
|
||||||
|
any liability that these contractual assumptions directly impose on
|
||||||
|
those licensors and authors.
|
||||||
|
|
||||||
|
All other non-permissive additional terms are considered "further
|
||||||
|
restrictions" within the meaning of section 10. If the Program as you
|
||||||
|
received it, or any part of it, contains a notice stating that it is
|
||||||
|
governed by this License along with a term that is a further
|
||||||
|
restriction, you may remove that term. If a license document contains
|
||||||
|
a further restriction but permits relicensing or conveying under this
|
||||||
|
License, you may add to a covered work material governed by the terms
|
||||||
|
of that license document, provided that the further restriction does
|
||||||
|
not survive such relicensing or conveying.
|
||||||
|
|
||||||
|
If you add terms to a covered work in accord with this section, you
|
||||||
|
must place, in the relevant source files, a statement of the
|
||||||
|
additional terms that apply to those files, or a notice indicating
|
||||||
|
where to find the applicable terms.
|
||||||
|
|
||||||
|
Additional terms, permissive or non-permissive, may be stated in the
|
||||||
|
form of a separately written license, or stated as exceptions;
|
||||||
|
the above requirements apply either way.
|
||||||
|
|
||||||
|
8. Termination.
|
||||||
|
|
||||||
|
You may not propagate or modify a covered work except as expressly
|
||||||
|
provided under this License. Any attempt otherwise to propagate or
|
||||||
|
modify it is void, and will automatically terminate your rights under
|
||||||
|
this License (including any patent licenses granted under the third
|
||||||
|
paragraph of section 11).
|
||||||
|
|
||||||
|
However, if you cease all violation of this License, then your
|
||||||
|
license from a particular copyright holder is reinstated (a)
|
||||||
|
provisionally, unless and until the copyright holder explicitly and
|
||||||
|
finally terminates your license, and (b) permanently, if the copyright
|
||||||
|
holder fails to notify you of the violation by some reasonable means
|
||||||
|
prior to 60 days after the cessation.
|
||||||
|
|
||||||
|
Moreover, your license from a particular copyright holder is
|
||||||
|
reinstated permanently if the copyright holder notifies you of the
|
||||||
|
violation by some reasonable means, this is the first time you have
|
||||||
|
received notice of violation of this License (for any work) from that
|
||||||
|
copyright holder, and you cure the violation prior to 30 days after
|
||||||
|
your receipt of the notice.
|
||||||
|
|
||||||
|
Termination of your rights under this section does not terminate the
|
||||||
|
licenses of parties who have received copies or rights from you under
|
||||||
|
this License. If your rights have been terminated and not permanently
|
||||||
|
reinstated, you do not qualify to receive new licenses for the same
|
||||||
|
material under section 10.
|
||||||
|
|
||||||
|
9. Acceptance Not Required for Having Copies.
|
||||||
|
|
||||||
|
You are not required to accept this License in order to receive or
|
||||||
|
run a copy of the Program. Ancillary propagation of a covered work
|
||||||
|
occurring solely as a consequence of using peer-to-peer transmission
|
||||||
|
to receive a copy likewise does not require acceptance. However,
|
||||||
|
nothing other than this License grants you permission to propagate or
|
||||||
|
modify any covered work. These actions infringe copyright if you do
|
||||||
|
not accept this License. Therefore, by modifying or propagating a
|
||||||
|
covered work, you indicate your acceptance of this License to do so.
|
||||||
|
|
||||||
|
10. Automatic Licensing of Downstream Recipients.
|
||||||
|
|
||||||
|
Each time you convey a covered work, the recipient automatically
|
||||||
|
receives a license from the original licensors, to run, modify and
|
||||||
|
propagate that work, subject to this License. You are not responsible
|
||||||
|
for enforcing compliance by third parties with this License.
|
||||||
|
|
||||||
|
An "entity transaction" is a transaction transferring control of an
|
||||||
|
organization, or substantially all assets of one, or subdividing an
|
||||||
|
organization, or merging organizations. If propagation of a covered
|
||||||
|
work results from an entity transaction, each party to that
|
||||||
|
transaction who receives a copy of the work also receives whatever
|
||||||
|
licenses to the work the party's predecessor in interest had or could
|
||||||
|
give under the previous paragraph, plus a right to possession of the
|
||||||
|
Corresponding Source of the work from the predecessor in interest, if
|
||||||
|
the predecessor has it or can get it with reasonable efforts.
|
||||||
|
|
||||||
|
You may not impose any further restrictions on the exercise of the
|
||||||
|
rights granted or affirmed under this License. For example, you may
|
||||||
|
not impose a license fee, royalty, or other charge for exercise of
|
||||||
|
rights granted under this License, and you may not initiate litigation
|
||||||
|
(including a cross-claim or counterclaim in a lawsuit) alleging that
|
||||||
|
any patent claim is infringed by making, using, selling, offering for
|
||||||
|
sale, or importing the Program or any portion of it.
|
||||||
|
|
||||||
|
11. Patents.
|
||||||
|
|
||||||
|
A "contributor" is a copyright holder who authorizes use under this
|
||||||
|
License of the Program or a work on which the Program is based. The
|
||||||
|
work thus licensed is called the contributor's "contributor version".
|
||||||
|
|
||||||
|
A contributor's "essential patent claims" are all patent claims
|
||||||
|
owned or controlled by the contributor, whether already acquired or
|
||||||
|
hereafter acquired, that would be infringed by some manner, permitted
|
||||||
|
by this License, of making, using, or selling its contributor version,
|
||||||
|
but do not include claims that would be infringed only as a
|
||||||
|
consequence of further modification of the contributor version. For
|
||||||
|
purposes of this definition, "control" includes the right to grant
|
||||||
|
patent sublicenses in a manner consistent with the requirements of
|
||||||
|
this License.
|
||||||
|
|
||||||
|
Each contributor grants you a non-exclusive, worldwide, royalty-free
|
||||||
|
patent license under the contributor's essential patent claims, to
|
||||||
|
make, use, sell, offer for sale, import and otherwise run, modify and
|
||||||
|
propagate the contents of its contributor version.
|
||||||
|
|
||||||
|
In the following three paragraphs, a "patent license" is any express
|
||||||
|
agreement or commitment, however denominated, not to enforce a patent
|
||||||
|
(such as an express permission to practice a patent or covenant not to
|
||||||
|
sue for patent infringement). To "grant" such a patent license to a
|
||||||
|
party means to make such an agreement or commitment not to enforce a
|
||||||
|
patent against the party.
|
||||||
|
|
||||||
|
If you convey a covered work, knowingly relying on a patent license,
|
||||||
|
and the Corresponding Source of the work is not available for anyone
|
||||||
|
to copy, free of charge and under the terms of this License, through a
|
||||||
|
publicly available network server or other readily accessible means,
|
||||||
|
then you must either (1) cause the Corresponding Source to be so
|
||||||
|
available, or (2) arrange to deprive yourself of the benefit of the
|
||||||
|
patent license for this particular work, or (3) arrange, in a manner
|
||||||
|
consistent with the requirements of this License, to extend the patent
|
||||||
|
license to downstream recipients. "Knowingly relying" means you have
|
||||||
|
actual knowledge that, but for the patent license, your conveying the
|
||||||
|
covered work in a country, or your recipient's use of the covered work
|
||||||
|
in a country, would infringe one or more identifiable patents in that
|
||||||
|
country that you have reason to believe are valid.
|
||||||
|
|
||||||
|
If, pursuant to or in connection with a single transaction or
|
||||||
|
arrangement, you convey, or propagate by procuring conveyance of, a
|
||||||
|
covered work, and grant a patent license to some of the parties
|
||||||
|
receiving the covered work authorizing them to use, propagate, modify
|
||||||
|
or convey a specific copy of the covered work, then the patent license
|
||||||
|
you grant is automatically extended to all recipients of the covered
|
||||||
|
work and works based on it.
|
||||||
|
|
||||||
|
A patent license is "discriminatory" if it does not include within
|
||||||
|
the scope of its coverage, prohibits the exercise of, or is
|
||||||
|
conditioned on the non-exercise of one or more of the rights that are
|
||||||
|
specifically granted under this License. You may not convey a covered
|
||||||
|
work if you are a party to an arrangement with a third party that is
|
||||||
|
in the business of distributing software, under which you make payment
|
||||||
|
to the third party based on the extent of your activity of conveying
|
||||||
|
the work, and under which the third party grants, to any of the
|
||||||
|
parties who would receive the covered work from you, a discriminatory
|
||||||
|
patent license (a) in connection with copies of the covered work
|
||||||
|
conveyed by you (or copies made from those copies), or (b) primarily
|
||||||
|
for and in connection with specific products or compilations that
|
||||||
|
contain the covered work, unless you entered into that arrangement,
|
||||||
|
or that patent license was granted, prior to 28 March 2007.
|
||||||
|
|
||||||
|
Nothing in this License shall be construed as excluding or limiting
|
||||||
|
any implied license or other defenses to infringement that may
|
||||||
|
otherwise be available to you under applicable patent law.
|
||||||
|
|
||||||
|
12. No Surrender of Others' Freedom.
|
||||||
|
|
||||||
|
If conditions are imposed on you (whether by court order, agreement or
|
||||||
|
otherwise) that contradict the conditions of this License, they do not
|
||||||
|
excuse you from the conditions of this License. If you cannot convey a
|
||||||
|
covered work so as to satisfy simultaneously your obligations under this
|
||||||
|
License and any other pertinent obligations, then as a consequence you may
|
||||||
|
not convey it at all. For example, if you agree to terms that obligate you
|
||||||
|
to collect a royalty for further conveying from those to whom you convey
|
||||||
|
the Program, the only way you could satisfy both those terms and this
|
||||||
|
License would be to refrain entirely from conveying the Program.
|
||||||
|
|
||||||
|
13. Use with the GNU Affero General Public License.
|
||||||
|
|
||||||
|
Notwithstanding any other provision of this License, you have
|
||||||
|
permission to link or combine any covered work with a work licensed
|
||||||
|
under version 3 of the GNU Affero General Public License into a single
|
||||||
|
combined work, and to convey the resulting work. The terms of this
|
||||||
|
License will continue to apply to the part which is the covered work,
|
||||||
|
but the special requirements of the GNU Affero General Public License,
|
||||||
|
section 13, concerning interaction through a network will apply to the
|
||||||
|
combination as such.
|
||||||
|
|
||||||
|
14. Revised Versions of this License.
|
||||||
|
|
||||||
|
The Free Software Foundation may publish revised and/or new versions of
|
||||||
|
the GNU General Public License from time to time. Such new versions will
|
||||||
|
be similar in spirit to the present version, but may differ in detail to
|
||||||
|
address new problems or concerns.
|
||||||
|
|
||||||
|
Each version is given a distinguishing version number. If the
|
||||||
|
Program specifies that a certain numbered version of the GNU General
|
||||||
|
Public License "or any later version" applies to it, you have the
|
||||||
|
option of following the terms and conditions either of that numbered
|
||||||
|
version or of any later version published by the Free Software
|
||||||
|
Foundation. If the Program does not specify a version number of the
|
||||||
|
GNU General Public License, you may choose any version ever published
|
||||||
|
by the Free Software Foundation.
|
||||||
|
|
||||||
|
If the Program specifies that a proxy can decide which future
|
||||||
|
versions of the GNU General Public License can be used, that proxy's
|
||||||
|
public statement of acceptance of a version permanently authorizes you
|
||||||
|
to choose that version for the Program.
|
||||||
|
|
||||||
|
Later license versions may give you additional or different
|
||||||
|
permissions. However, no additional obligations are imposed on any
|
||||||
|
author or copyright holder as a result of your choosing to follow a
|
||||||
|
later version.
|
||||||
|
|
||||||
|
15. Disclaimer of Warranty.
|
||||||
|
|
||||||
|
THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY
|
||||||
|
APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT
|
||||||
|
HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY
|
||||||
|
OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO,
|
||||||
|
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||||
|
PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM
|
||||||
|
IS WITH YOU. SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF
|
||||||
|
ALL NECESSARY SERVICING, REPAIR OR CORRECTION.
|
||||||
|
|
||||||
|
16. Limitation of Liability.
|
||||||
|
|
||||||
|
IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
|
||||||
|
WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES AND/OR CONVEYS
|
||||||
|
THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY
|
||||||
|
GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE
|
||||||
|
USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF
|
||||||
|
DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD
|
||||||
|
PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER PROGRAMS),
|
||||||
|
EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF
|
||||||
|
SUCH DAMAGES.
|
||||||
|
|
||||||
|
17. Interpretation of Sections 15 and 16.
|
||||||
|
|
||||||
|
If the disclaimer of warranty and limitation of liability provided
|
||||||
|
above cannot be given local legal effect according to their terms,
|
||||||
|
reviewing courts shall apply local law that most closely approximates
|
||||||
|
an absolute waiver of all civil liability in connection with the
|
||||||
|
Program, unless a warranty or assumption of liability accompanies a
|
||||||
|
copy of the Program in return for a fee.
|
||||||
|
|
||||||
|
END OF TERMS AND CONDITIONS
|
||||||
|
|
||||||
|
How to Apply These Terms to Your New Programs
|
||||||
|
|
||||||
|
If you develop a new program, and you want it to be of the greatest
|
||||||
|
possible use to the public, the best way to achieve this is to make it
|
||||||
|
free software which everyone can redistribute and change under these terms.
|
||||||
|
|
||||||
|
To do so, attach the following notices to the program. It is safest
|
||||||
|
to attach them to the start of each source file to most effectively
|
||||||
|
state the exclusion of warranty; and each file should have at least
|
||||||
|
the "copyright" line and a pointer to where the full notice is found.
|
||||||
|
|
||||||
|
<one line to give the program's name and a brief idea of what it does.>
|
||||||
|
Copyright (C) <year> <name of author>
|
||||||
|
|
||||||
|
This program is free software: you can redistribute it and/or modify
|
||||||
|
it under the terms of the GNU General Public License as published by
|
||||||
|
the Free Software Foundation, either version 3 of the License, or
|
||||||
|
(at your option) any later version.
|
||||||
|
|
||||||
|
This program is distributed in the hope that it will be useful,
|
||||||
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
GNU General Public License for more details.
|
||||||
|
|
||||||
|
You should have received a copy of the GNU General Public License
|
||||||
|
along with this program. If not, see <https://www.gnu.org/licenses/>.
|
||||||
|
|
||||||
|
Also add information on how to contact you by electronic and paper mail.
|
||||||
|
|
||||||
|
If the program does terminal interaction, make it output a short
|
||||||
|
notice like this when it starts in an interactive mode:
|
||||||
|
|
||||||
|
<program> Copyright (C) <year> <name of author>
|
||||||
|
This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
|
||||||
|
This is free software, and you are welcome to redistribute it
|
||||||
|
under certain conditions; type `show c' for details.
|
||||||
|
|
||||||
|
The hypothetical commands `show w' and `show c' should show the appropriate
|
||||||
|
parts of the General Public License. Of course, your program's commands
|
||||||
|
might be different; for a GUI interface, you would use an "about box".
|
||||||
|
|
||||||
|
You should also get your employer (if you work as a programmer) or school,
|
||||||
|
if any, to sign a "copyright disclaimer" for the program, if necessary.
|
||||||
|
For more information on this, and how to apply and follow the GNU GPL, see
|
||||||
|
<https://www.gnu.org/licenses/>.
|
||||||
|
|
||||||
|
The GNU General Public License does not permit incorporating your program
|
||||||
|
into proprietary programs. If your program is a subroutine library, you
|
||||||
|
may consider it more useful to permit linking proprietary applications with
|
||||||
|
the library. If this is what you want to do, use the GNU Lesser General
|
||||||
|
Public License instead of this License. But first, please read
|
||||||
|
<https://www.gnu.org/licenses/why-not-lgpl.html>.
|
37
LICENSES/Intel-redist.txt
Normal file
37
LICENSES/Intel-redist.txt
Normal file
@@ -0,0 +1,37 @@
|
|||||||
|
Copyright (c) <YEAR> Intel Corporation.
|
||||||
|
All rights reserved.
|
||||||
|
|
||||||
|
Redistribution.
|
||||||
|
|
||||||
|
Redistribution and use in binary form, without modification, are permitted,
|
||||||
|
provided that the following conditions are met:
|
||||||
|
|
||||||
|
1. Redistributions must reproduce the above copyright notice and the
|
||||||
|
following disclaimer in the documentation and/or other materials provided
|
||||||
|
with the distribution.
|
||||||
|
|
||||||
|
2. Neither the name of Intel Corporation nor the names of its suppliers may
|
||||||
|
be used to endorse or promote products derived from this software without
|
||||||
|
specific prior written permission.
|
||||||
|
|
||||||
|
3. No reverse engineering, decompilation, or disassembly of this software
|
||||||
|
is permitted.
|
||||||
|
|
||||||
|
|
||||||
|
"Binary form" includes any format that is commonly used for electronic
|
||||||
|
conveyance that is a reversible, bit-exact translation of binary
|
||||||
|
representation to ASCII or ISO text, for example "uuencode".
|
||||||
|
|
||||||
|
DISCLAIMER.
|
||||||
|
|
||||||
|
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||||
|
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||||
|
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||||
|
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||||
|
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||||
|
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||||
|
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||||
|
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
POSSIBILITY OF SUCH DAMAGE.
|
57
README.md
57
README.md
@@ -11,9 +11,18 @@ manager:
|
|||||||
- addw2
|
- addw2
|
||||||
- bonw14
|
- bonw14
|
||||||
- darp6
|
- darp6
|
||||||
|
- darp7
|
||||||
- galp4
|
- galp4
|
||||||
|
- galp5
|
||||||
|
- gaze15
|
||||||
|
- gaze16-3050
|
||||||
|
- gaze16-3060
|
||||||
|
- gaze16-3060-b
|
||||||
- lemp9
|
- lemp9
|
||||||
|
- lemp10
|
||||||
- oryp6
|
- oryp6
|
||||||
|
- oryp7
|
||||||
|
- oryp8
|
||||||
|
|
||||||
Other models may be in development or available without support, and can be
|
Other models may be in development or available without support, and can be
|
||||||
seen in the `models/` directory.
|
seen in the `models/` directory.
|
||||||
@@ -23,45 +32,45 @@ using an external programmer. See [flashing](./docs/flashing.md) for details.
|
|||||||
|
|
||||||
### Schematics
|
### Schematics
|
||||||
|
|
||||||
Board schematics can be provided on request by sending an email to
|
System76 customers may request board schematics for their system by sending an
|
||||||
firmware@system76.com with the subject line "Schematics for _model_", where
|
email to firmware@system76.com with the subject line "Schematics for _model_",
|
||||||
_model_ is the name of a directory in the `models/` directory, such as darp6.
|
where _model_ is one of the supported models listed above. Please include the
|
||||||
|
serial number of your system for verification.
|
||||||
|
|
||||||
You may not share these without explicit permission from System76.
|
You may not share these without explicit permission from System76.
|
||||||
|
|
||||||
## Dependencies
|
## Changelog
|
||||||
|
|
||||||
|
For a list of important changes please see the [changelog](./CHANGELOG.md).
|
||||||
|
|
||||||
|
## Building
|
||||||
|
|
||||||
|
Dependencies can be installed with the provided script.
|
||||||
|
|
||||||
### Install toolchain
|
|
||||||
```
|
```
|
||||||
./scripts/deps.sh
|
./scripts/deps.sh
|
||||||
```
|
```
|
||||||
|
|
||||||
### Load Rust environment (or optionally reboot)
|
If rustup was installed for the first time, it will be required to source the
|
||||||
|
environment file it installed to use the correct Rust toolchain.
|
||||||
|
|
||||||
```
|
```
|
||||||
source ~/.cargo/env
|
source ~/.cargo/env
|
||||||
```
|
```
|
||||||
|
|
||||||
### Build firmware, replace qemu with your model (look in the models directory for examples)
|
A script is provided to build the firmware. The available targets for building
|
||||||
|
are the model folders in `models/`. For example, to build for QEMU:
|
||||||
|
|
||||||
```
|
```
|
||||||
./scripts/build.sh qemu
|
./scripts/build.sh qemu
|
||||||
```
|
```
|
||||||
|
|
||||||
### Emulate firmware, only available after building the qemu model
|
Once built, the firmware must be flashed to use. Several scripts are available
|
||||||
```
|
to flash the new firmware, depending on how it is going to be written.
|
||||||
./scripts/qemu.sh
|
|
||||||
```
|
|
||||||
|
|
||||||
## Contents
|
- `scripts/qemu.sh`: [Run the firmware in QEMU](./docs/debugging.md#using-qemu) (specific to the QEMU model)
|
||||||
|
- `scripts/flash.sh`: Flash using the internal flasher
|
||||||
|
- `scripts/ch341a-flash.sh`: Flash using a CH341A programmer
|
||||||
|
- `scripts/spipi-flash.sh`: Flash using a Raspberry Pi
|
||||||
|
|
||||||
- [apps](./apps) - Applications
|
See [Flashing firmware](./docs/flashing.md) for more details.
|
||||||
- [coreboot](https://github.com/system76/coreboot.git) - coreboot README
|
|
||||||
- [docs](./docs) - System76 Open Firmware Documentation
|
|
||||||
- [ec](https://github.com/system76/ec.git) - System76 EC
|
|
||||||
- [edk2](https://github.com/system76/edk2.git) - EDK II Project
|
|
||||||
- [edk2-non-osi](https://github.com/tianocore/edk2-non-osi.git)
|
|
||||||
- [edk2-platforms](https://github.com/system76/edk2-platforms.git) - This branch holds all platforms actively maintained against the
|
|
||||||
- [FSP](https://github.com/IntelFsp/FSP.git) - Intel® Firmware Support Package (Intel® FSP) Binaries
|
|
||||||
- [libs](./libs) - Libraries
|
|
||||||
- [models](./models) - Models
|
|
||||||
- [scripts](./scripts)
|
|
||||||
- [tools](./tools) - Tools
|
|
||||||
|
52
README.md.in
52
README.md.in
@@ -1,52 +0,0 @@
|
|||||||
# System76 Open Firmware
|
|
||||||
|
|
||||||
An open source distribution of firmware utilizing coreboot, EDK2, and System76
|
|
||||||
firmware applications.
|
|
||||||
|
|
||||||
## Supported models
|
|
||||||
|
|
||||||
These models are supported and will receive updates through the firmware
|
|
||||||
manager:
|
|
||||||
|
|
||||||
- addw2
|
|
||||||
- bonw14
|
|
||||||
- darp6
|
|
||||||
- galp4
|
|
||||||
- lemp9
|
|
||||||
- oryp6
|
|
||||||
|
|
||||||
Other models may be in development or available without support, and can be
|
|
||||||
seen in the `models/` directory.
|
|
||||||
|
|
||||||
If the device becomes bricked it will require restoring the current firmware
|
|
||||||
using an external programmer. See [flashing](./docs/flashing.md) for details.
|
|
||||||
|
|
||||||
### Schematics
|
|
||||||
|
|
||||||
Board schematics can be provided on request by sending an email to
|
|
||||||
firmware@system76.com with the subject line "Schematics for _model_", where
|
|
||||||
_model_ is the name of a directory in the `models/` directory, such as darp6.
|
|
||||||
|
|
||||||
You may not share these without explicit permission from System76.
|
|
||||||
|
|
||||||
## Dependencies
|
|
||||||
|
|
||||||
### Install toolchain
|
|
||||||
```
|
|
||||||
./scripts/deps.sh
|
|
||||||
```
|
|
||||||
|
|
||||||
### Load Rust environment (or optionally reboot)
|
|
||||||
```
|
|
||||||
source ~/.cargo/env
|
|
||||||
```
|
|
||||||
|
|
||||||
### Build firmware, replace qemu with your model (look in the models directory for examples)
|
|
||||||
```
|
|
||||||
./scripts/build.sh qemu
|
|
||||||
```
|
|
||||||
|
|
||||||
### Emulate firmware, only available after building the qemu model
|
|
||||||
```
|
|
||||||
./scripts/qemu.sh
|
|
||||||
```
|
|
Submodule apps/firmware-setup updated: c0ecd4e8d5...d016fe3cf3
Submodule apps/firmware-smmstore updated: 0e6b1c1c30...00c44d42ac
Submodule apps/firmware-update updated: cbc5dbcf6f...966de7a858
Submodule apps/gop-policy updated: 4610cc6e2d...fb2f2c04cb
2
coreboot
2
coreboot
Submodule coreboot updated: 8be09c0c61...45fcc5bb6c
@@ -73,6 +73,17 @@ Once coreboot is ported, add its configuration.
|
|||||||
cp coreboot/.config models/<model>/coreboot.config
|
cp coreboot/.config models/<model>/coreboot.config
|
||||||
```
|
```
|
||||||
|
|
||||||
|
### devicetree
|
||||||
|
|
||||||
|
`generate.sh` does not create `devicetree.cb`. Some values for this file can be
|
||||||
|
produced using the `devicetree.py` script.
|
||||||
|
|
||||||
|
## Configuring Intel CSME
|
||||||
|
|
||||||
|
The CSME image may need to be regenerated. Common changes that may be required
|
||||||
|
are disabling Platform Trust Technology (PTT) so the discrete TPM device will
|
||||||
|
work, and changing the Boot Guard profile to disable verified boot.
|
||||||
|
|
||||||
## Porting System76 EC
|
## Porting System76 EC
|
||||||
|
|
||||||
To port System76 EC firmware to a new board, see the EC documentation.
|
To port System76 EC firmware to a new board, see the EC documentation.
|
||||||
|
97
docs/debugging.md
Normal file
97
docs/debugging.md
Normal file
@@ -0,0 +1,97 @@
|
|||||||
|
# Debugging
|
||||||
|
|
||||||
|
## Component
|
||||||
|
|
||||||
|
### coreboot
|
||||||
|
|
||||||
|
coreboot debug logging is enabled by default at the level of `Debug`. This can
|
||||||
|
be changed using `nvramtool` to set the CMOS option `debug_level`.
|
||||||
|
|
||||||
|
```
|
||||||
|
sudo nvramtool -w debug_level=<level>
|
||||||
|
```
|
||||||
|
|
||||||
|
Available log levels are:
|
||||||
|
|
||||||
|
- Emergency
|
||||||
|
- Alert
|
||||||
|
- Critical
|
||||||
|
- Error
|
||||||
|
- Warning
|
||||||
|
- Notice
|
||||||
|
- Info
|
||||||
|
- Debug
|
||||||
|
- Spew
|
||||||
|
|
||||||
|
### edk2
|
||||||
|
|
||||||
|
Modify `./scripts/_build/edk2.sh` so `BUILD_TYPE` is set to `DEBUG` instead of
|
||||||
|
`RELEASE`.
|
||||||
|
|
||||||
|
```sh
|
||||||
|
#BUILD_TYPE=RELEASE
|
||||||
|
BUILD_TYPE=DEBUG
|
||||||
|
```
|
||||||
|
|
||||||
|
The default PCD values are used, so a lot of ouput will be generated. This can
|
||||||
|
have a significant impact on the boot time.
|
||||||
|
|
||||||
|
This also unconditionally enables asserts, so any failures will result in edk2
|
||||||
|
hanging and require a reflash to fix.
|
||||||
|
|
||||||
|
### Rust UEFI apps
|
||||||
|
|
||||||
|
Debug logging can be enabled in the Rust UEFI apps (e.g., `firmware-setup`) by
|
||||||
|
selecting the `debug` feature in `Cargo.toml`.
|
||||||
|
|
||||||
|
## Method
|
||||||
|
|
||||||
|
A couple of methods can be used to get debug logging.
|
||||||
|
|
||||||
|
### Parallel port
|
||||||
|
|
||||||
|
This method requires no soldering of board components.
|
||||||
|
|
||||||
|
See [Debugging the EC firmware](./ec/doc/debugging.md) for details on setting
|
||||||
|
up EC debugging over the parallel port.
|
||||||
|
|
||||||
|
cbmem output can be passed through the EC by enabling the driver in coreboot.
|
||||||
|
Uncomment the config in `models/<model>/coreboot.config` to enable logging the
|
||||||
|
cbmem console through the EC.
|
||||||
|
|
||||||
|
```
|
||||||
|
CONFIG_CONSOLE_SYSTEM76_EC=y
|
||||||
|
```
|
||||||
|
|
||||||
|
edk2 output can be passed through as well by enabling the driver in edk2.
|
||||||
|
This causes boot to be *very* slow, as edk2 generates a lot of output.
|
||||||
|
Uncomment the config in `models/<model>/edk2.config` to enable the driver.
|
||||||
|
|
||||||
|
```
|
||||||
|
SYSTEM76_EC_LOGGING=TRUE
|
||||||
|
```
|
||||||
|
|
||||||
|
### Using QEMU
|
||||||
|
|
||||||
|
A `qemu` target is provided to allow development and debugging in a VM.
|
||||||
|
|
||||||
|
```
|
||||||
|
./scripts/build.sh qemu
|
||||||
|
```
|
||||||
|
|
||||||
|
Install QEMU:
|
||||||
|
|
||||||
|
```sh
|
||||||
|
# Arch
|
||||||
|
sudo pacman -S qemu
|
||||||
|
# Fedora
|
||||||
|
sudo dnf install qemu-system-x86
|
||||||
|
# Ubuntu
|
||||||
|
sudo apt install qemu-system-x86
|
||||||
|
```
|
||||||
|
|
||||||
|
And run the image in a VM:
|
||||||
|
|
||||||
|
```
|
||||||
|
./scripts/qemu.sh
|
||||||
|
```
|
@@ -37,8 +37,10 @@ dot indent and a white paint mark. The silkscreen may also indicate pin 1.
|
|||||||
### CH341A USB programmer - slower, but easier to set up
|
### CH341A USB programmer - slower, but easier to set up
|
||||||
|
|
||||||
These can be purchased from many places for around 15 USD. Make sure that the
|
These can be purchased from many places for around 15 USD. Make sure that the
|
||||||
one you get has a ROM clip. Here is an example:
|
one you get has a ROM clip. Here are some examples:
|
||||||
https://www.amazon.com/Organizer-Socket-Adpter-Programmer-CH341A/dp/B07R5LPTYM
|
- [Amazon.com, Organizer.](https://www.amazon.com/Organizer-Socket-Adpter-Programmer-CH341A/dp/B07R5LPTYM)
|
||||||
|
- [Amazon.com, KeeYees.](https://www.amazon.com/KeeYees-SOIC8-EEPROM-CH341A-Programmer/dp/B07SHSL9X9)
|
||||||
|
- [AliExpress.com, TZT.](https://aliexpress.com/item/32725360255.html)
|
||||||
|
|
||||||
**Then you can follow these steps to flash the ROM chip:**
|
**Then you can follow these steps to flash the ROM chip:**
|
||||||
|
|
||||||
|
@@ -1,16 +1,43 @@
|
|||||||
# Intel Management Engine
|
# Intel Management Engine
|
||||||
|
|
||||||
Intel-based machines by System76 come with the [Intel Management Engine][wiki]
|
[Intel Management Engine][wiki] is a proprietary, mostly undocumented, firmware
|
||||||
disabled. It is a proprietary, mostly undocumented, system that provides many
|
system that provides many extraneous features that are generally not usable or
|
||||||
extraneous features that are generally not usable or useful to our users, with
|
useful to our users, with multiple known vulnerabilities that compromise the
|
||||||
multiple known vulnerabilities that compromise the entire system.
|
entire system.
|
||||||
|
|
||||||
The Intel ME is _required_ (since Nehalem, 2008), so cannot be removed. The
|
The Intel ME is _required_ (since Nehalem, 2008), so cannot be removed. The
|
||||||
[me\_cleaner] project is able to remove non-essential components, but currently
|
[me\_cleaner] project is able to remove non-essential components, but does not
|
||||||
does not support the ME version used on many of our systems. Instead, we [send
|
support the ME version used on many of our systems. Instead, we [send a HECI
|
||||||
a HECI command][heci_disable] to tell the Intel ME to disable runtime
|
command][CB52800] to tell the Intel ME to disable runtime components during
|
||||||
components during early boot.
|
early boot.
|
||||||
|
|
||||||
|
Most Intel-based machines from System76 come with the IME disabled.
|
||||||
|
|
||||||
|
## Configuring
|
||||||
|
|
||||||
|
The IME can be enabled or disabled via the coreboot CMOS option `me_state`.
|
||||||
|
The value can be set using coreboot's nvramtool.
|
||||||
|
|
||||||
|
```
|
||||||
|
make -C coreboot/util/nvramtool
|
||||||
|
sudo ./coreboot/util/nvramtool/nvramtool -w me_state={Enable,Disable}
|
||||||
|
```
|
||||||
|
|
||||||
|
A restart is required for the change to take effect. On the boot after changing
|
||||||
|
the value, the system will perform a global reset (power off again) to complete
|
||||||
|
the change and ensure the IME is operating in a valid state.
|
||||||
|
|
||||||
|
## Tiger Lake-U
|
||||||
|
|
||||||
|
Models using TGL-U processors default to having the IME enabled. TGL-U removes
|
||||||
|
support for S3 and requires S0ix. This requires all CPU, PCH, and PCIe devices
|
||||||
|
to have ACPI defined low power states. With S0ix, the CPU has numerous states
|
||||||
|
for low power, with the lowest being C10. In order to reach this C10 state, the
|
||||||
|
IME must report that it is in a low power state. Disabling the ME with the HAP
|
||||||
|
bit keeps the CPU in the C8 state. This nearly triples the power usage in S0ix
|
||||||
|
suspend, from around 1 watt to around 3 watts.
|
||||||
|
|
||||||
|
|
||||||
[wiki]: https://en.wikipedia.org/wiki/Intel_Management_Engine
|
[wiki]: https://en.wikipedia.org/wiki/Intel_Management_Engine
|
||||||
[me\_cleaner]: https://github.com/corna/me_cleaner
|
[me\_cleaner]: https://github.com/corna/me_cleaner
|
||||||
[heci_disable]: https://github.com/system76/coreboot/blob/011439cb9196d6a71d394ead8c98dfd8ead325d4/src/soc/intel/cannonlake/me.c#L186
|
[CB52800]: https://review.coreboot.org/c/coreboot/+/52800
|
||||||
|
27
docs/uefi.md
Normal file
27
docs/uefi.md
Normal file
@@ -0,0 +1,27 @@
|
|||||||
|
# UEFI
|
||||||
|
|
||||||
|
System76 uses [EDK2](https://github.com/tianocore/edk2) to implement UEFI.
|
||||||
|
|
||||||
|
[coreboot](https://coreboot.org/) is used for Platform Initialization (PI).
|
||||||
|
|
||||||
|
## Booting
|
||||||
|
|
||||||
|
System76 Open Firmware only supports UEFI booting. Legacy BIOS-MBR booting is
|
||||||
|
not supported. `\EFI\BOOT\BOOTX64.EFI` must exist on the EFI System Partition
|
||||||
|
to be considered valid.
|
||||||
|
|
||||||
|
Network functionality is disabled. Native PXE booting is not supported.
|
||||||
|
|
||||||
|
### Secure Boot
|
||||||
|
|
||||||
|
Secure Boot support is currently disabled.
|
||||||
|
|
||||||
|
The implementation from 9elements is in development. If building a custom
|
||||||
|
image, the edk2 config `SECURE_BOOT_ENABLE` can be set to enable support.
|
||||||
|
|
||||||
|
There is currently no firmware UI to view or configure Secure Boot.
|
||||||
|
|
||||||
|
## Shell
|
||||||
|
|
||||||
|
The internal UEFI shell is disabled. A separate binary on a bootable drive
|
||||||
|
must be used to access the shell environment.
|
2
ec
2
ec
Submodule ec updated: 29034569c8...3bc0f72cc6
2
edk2
2
edk2
Submodule edk2 updated: 6a78d4f41d...a2abc5e15f
@@ -4,10 +4,6 @@
|
|||||||
|
|
||||||
- [coreboot-fs](https://gitlab.redox-os.org/redox-os/coreboot-fs.git) - coreboot-fs
|
- [coreboot-fs](https://gitlab.redox-os.org/redox-os/coreboot-fs.git) - coreboot-fs
|
||||||
- [coreboot-table](https://gitlab.redox-os.org/redox-os/coreboot-table.git) - coreboot-table
|
- [coreboot-table](https://gitlab.redox-os.org/redox-os/coreboot-table.git) - coreboot-table
|
||||||
- [ecflash](https://github.com/system76/ecflash.git) - ecflash
|
|
||||||
- [intelflash](https://gitlab.redox-os.org/redox-os/intelflash.git) - intelflash
|
- [intelflash](https://gitlab.redox-os.org/redox-os/intelflash.git) - intelflash
|
||||||
- [intel-spi](https://github.com/system76/intel-spi.git) - intel-spi
|
- [intel-spi](https://github.com/system76/intel-spi.git) - intel-spi
|
||||||
- [smmstore](https://github.com/system76/smmstore.git) - smmstore
|
- [uefi](https://gitlab.redox-os.org/redox-os/uefi.git) - Redox UEFI
|
||||||
- [uefi](https://gitlab.redox-os.org/redox-os/uefi.git)
|
|
||||||
- [uefi_alloc](https://gitlab.redox-os.org/redox-os/uefi_alloc.git)
|
|
||||||
- [uefi_std](https://gitlab.redox-os.org/redox-os/uefi_std.git) - uefi_std
|
|
||||||
|
Submodule libs/coreboot-table updated: df19cf3dc7...4b5543dc86
Submodule libs/ecflash deleted from fc3f098fda
Submodule libs/intel-spi updated: f94574f7c4...9519851e48
Submodule libs/intelflash updated: 7523a1e478...443adc01d3
Submodule libs/smmstore deleted from 4c0e549e31
Submodule libs/uefi updated: d03737a5cb...fcdb04f90d
Submodule libs/uefi_alloc deleted from 4a69eba2ce
Submodule libs/uefi_std deleted from 8557730bf4
@@ -7,18 +7,29 @@
|
|||||||
- [bonw14](./bonw14) - System76 Bonobo WS (bonw14)
|
- [bonw14](./bonw14) - System76 Bonobo WS (bonw14)
|
||||||
- [darp5](./darp5) - System76 Darter Pro (darp5)
|
- [darp5](./darp5) - System76 Darter Pro (darp5)
|
||||||
- [darp6](./darp6) - System76 Darter Pro (darp6)
|
- [darp6](./darp6) - System76 Darter Pro (darp6)
|
||||||
|
- [darp7](./darp7) - System76 Darter Pro (darp7)
|
||||||
|
- [darp8](./darp8) - System76 Darter Pro (darp8)
|
||||||
- [galp2](./galp2) - System76 Galago Pro (galp2)
|
- [galp2](./galp2) - System76 Galago Pro (galp2)
|
||||||
- [galp3](./galp3) - System76 Galago Pro (galp3)
|
- [galp3](./galp3) - System76 Galago Pro (galp3)
|
||||||
- [galp3-b](./galp3-b) - System76 Galago Pro (galp3-b)
|
- [galp3-b](./galp3-b) - System76 Galago Pro (galp3-b)
|
||||||
- [galp3-c](./galp3-c) - System76 Galago Pro (galp3-c)
|
- [galp3-c](./galp3-c) - System76 Galago Pro (galp3-c)
|
||||||
- [galp4](./galp4) - System76 Galago Pro (galp4)
|
- [galp4](./galp4) - System76 Galago Pro (galp4)
|
||||||
- [gaze14_1650_15](./gaze14_1650_15) - System76 Gazelle (gaze14)
|
- [galp5](./galp5) - System76 Galago Pro (galp5)
|
||||||
- [gaze14_1650_17](./gaze14_1650_17) - System76 Gazelle (gaze14)
|
- [gaze14_1650](./gaze14_1650) - System76 Gazelle (gaze14)
|
||||||
- [gaze14_1660ti_15](./gaze14_1660ti_15) - System76 Gazelle (gaze14)
|
- [gaze14_1660ti](./gaze14_1660ti) - System76 Gazelle (gaze14)
|
||||||
- [gaze14_1660ti_17](./gaze14_1660ti_17) - System76 Gazelle (gaze14)
|
|
||||||
- [gaze15](./gaze15) - System76 Gazelle (gaze15)
|
- [gaze15](./gaze15) - System76 Gazelle (gaze15)
|
||||||
|
- [gaze16-3050](./gaze16-3050) - System76 Gazelle (gaze16)
|
||||||
|
- [gaze16-3060](./gaze16-3060) - System76 Gazelle (gaze16)
|
||||||
|
- [gaze16-3060-b](./gaze16-3060-b) - System76 Gazelle (gaze16)
|
||||||
|
- [gaze17-3050](./gaze17-3050) - System76 Gazelle (gaze17)
|
||||||
|
- [gaze17-3060-b](./gaze17-3060-b) - System76 Gazelle (gaze17-3060-b)
|
||||||
|
- [kudu6](./kudu6) - System76 Kudu (kudu6)
|
||||||
|
- [lemp10](./lemp10) - System76 Lemur Pro (lemp10)
|
||||||
|
- [lemp11](./lemp11) - System76 Lemur Pro (lemp11)
|
||||||
- [lemp9](./lemp9) - System76 Lemur Pro (lemp9)
|
- [lemp9](./lemp9) - System76 Lemur Pro (lemp9)
|
||||||
- [oryp5](./oryp5) - System76 Oryx Pro (oryp5)
|
- [oryp5](./oryp5) - System76 Oryx Pro (oryp5)
|
||||||
- [oryp6](./oryp6) - System76 Oryx Pro (oryp6)
|
- [oryp6](./oryp6) - System76 Oryx Pro (oryp6)
|
||||||
|
- [oryp7](./oryp7) - System76 Oryx Pro (oryp7)
|
||||||
|
- [oryp8](./oryp8) - System76 Oryx Pro (oryp8)
|
||||||
- [qemu](./qemu) - QEMU (Virtualization)
|
- [qemu](./qemu) - QEMU (Virtualization)
|
||||||
- [thelio-b1](./thelio-b1) - System76 Thelio (thelio-b1)
|
- [thelio-b1](./thelio-b1) - System76 Thelio (thelio-b1)
|
||||||
|
BIN
models/addw1/IntelGopDriver.efi
(Stored with Git LFS)
BIN
models/addw1/IntelGopDriver.efi
(Stored with Git LFS)
Binary file not shown.
@@ -11,4 +11,4 @@ https://system76.com/guides/addw1
|
|||||||
- HAP: false
|
- HAP: false
|
||||||
- [ME](./me.rom)
|
- [ME](./me.rom)
|
||||||
- Size: 6140 KB
|
- Size: 6140 KB
|
||||||
- Version: 12.0.49.1536
|
- Version: 12.0.85.1919
|
||||||
|
1
models/addw1/chip.txt
Normal file
1
models/addw1/chip.txt
Normal file
@@ -0,0 +1 @@
|
|||||||
|
MX25L12805D
|
@@ -1,845 +1,20 @@
|
|||||||
#
|
|
||||||
# Automatically generated file; DO NOT EDIT.
|
|
||||||
# coreboot configuration
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# General setup
|
|
||||||
#
|
|
||||||
CONFIG_COREBOOT_BUILD=y
|
|
||||||
CONFIG_LOCALVERSION=""
|
|
||||||
CONFIG_CBFS_PREFIX="fallback"
|
|
||||||
CONFIG_COMPILER_GCC=y
|
|
||||||
# CONFIG_COMPILER_LLVM_CLANG is not set
|
|
||||||
# CONFIG_ANY_TOOLCHAIN is not set
|
|
||||||
CONFIG_CCACHE=y
|
|
||||||
# CONFIG_FMD_GENPARSER is not set
|
|
||||||
# CONFIG_UTIL_GENPARSER is not set
|
|
||||||
CONFIG_COMPRESS_RAMSTAGE=y
|
|
||||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
|
||||||
CONFIG_COLLECT_TIMESTAMPS=y
|
|
||||||
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
|
|
||||||
CONFIG_USE_BLOBS=y
|
|
||||||
# CONFIG_USE_AMD_BLOBS is not set
|
|
||||||
# CONFIG_USE_QC_BLOBS is not set
|
|
||||||
# CONFIG_COVERAGE is not set
|
|
||||||
# CONFIG_UBSAN is not set
|
|
||||||
# CONFIG_NO_STAGE_CACHE is not set
|
|
||||||
CONFIG_TSEG_STAGE_CACHE=y
|
|
||||||
# CONFIG_UPDATE_IMAGE is not set
|
|
||||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
|
||||||
# CONFIG_FW_CONFIG is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Mainboard
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# Important: Run 'make distclean' before switching boards
|
|
||||||
#
|
|
||||||
# CONFIG_VENDOR_51NB is not set
|
|
||||||
# CONFIG_VENDOR_ADLINK is not set
|
|
||||||
# CONFIG_VENDOR_AMD is not set
|
|
||||||
# CONFIG_VENDOR_AOPEN is not set
|
|
||||||
# CONFIG_VENDOR_APPLE is not set
|
|
||||||
# CONFIG_VENDOR_ASROCK is not set
|
|
||||||
# CONFIG_VENDOR_ASUS is not set
|
|
||||||
# CONFIG_VENDOR_BAP is not set
|
|
||||||
# CONFIG_VENDOR_BIOSTAR is not set
|
|
||||||
# CONFIG_VENDOR_CAVIUM is not set
|
|
||||||
# CONFIG_VENDOR_COMPULAB is not set
|
|
||||||
# CONFIG_VENDOR_DELL is not set
|
|
||||||
# CONFIG_VENDOR_ELMEX is not set
|
|
||||||
# CONFIG_VENDOR_EMULATION is not set
|
|
||||||
# CONFIG_VENDOR_FACEBOOK is not set
|
|
||||||
# CONFIG_VENDOR_FOXCONN is not set
|
|
||||||
# CONFIG_VENDOR_GETAC is not set
|
|
||||||
# CONFIG_VENDOR_GIGABYTE is not set
|
|
||||||
# CONFIG_VENDOR_GIZMOSPHERE is not set
|
|
||||||
# CONFIG_VENDOR_GOOGLE is not set
|
|
||||||
# CONFIG_VENDOR_HP is not set
|
|
||||||
# CONFIG_VENDOR_IBASE is not set
|
|
||||||
# CONFIG_VENDOR_INTEL is not set
|
|
||||||
# CONFIG_VENDOR_JETWAY is not set
|
|
||||||
# CONFIG_VENDOR_KONTRON is not set
|
|
||||||
# CONFIG_VENDOR_LENOVO is not set
|
|
||||||
# CONFIG_VENDOR_LIBRETREND is not set
|
|
||||||
# CONFIG_VENDOR_LIPPERT is not set
|
|
||||||
# CONFIG_VENDOR_MSI is not set
|
|
||||||
# CONFIG_VENDOR_OCP is not set
|
|
||||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
|
||||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
|
||||||
# CONFIG_VENDOR_PCENGINES is not set
|
|
||||||
# CONFIG_VENDOR_PORTWELL is not set
|
|
||||||
# CONFIG_VENDOR_PRODRIVE is not set
|
|
||||||
# CONFIG_VENDOR_PROTECTLI is not set
|
|
||||||
# CONFIG_VENDOR_PURISM is not set
|
|
||||||
# CONFIG_VENDOR_RAZER is not set
|
|
||||||
# CONFIG_VENDOR_RODA is not set
|
|
||||||
# CONFIG_VENDOR_SAMSUNG is not set
|
|
||||||
# CONFIG_VENDOR_SAPPHIRE is not set
|
|
||||||
# CONFIG_VENDOR_SCALEWAY is not set
|
|
||||||
# CONFIG_VENDOR_SIEMENS is not set
|
|
||||||
# CONFIG_VENDOR_SIFIVE is not set
|
|
||||||
# CONFIG_VENDOR_SUPERMICRO is not set
|
|
||||||
CONFIG_VENDOR_SYSTEM76=y
|
CONFIG_VENDOR_SYSTEM76=y
|
||||||
# CONFIG_VENDOR_TI is not set
|
CONFIG_BOARD_SYSTEM76_ADDW1=y
|
||||||
# CONFIG_VENDOR_UP is not set
|
CONFIG_CCACHE=y
|
||||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
CONFIG_CONSOLE_SERIAL=n
|
||||||
CONFIG_MAINBOARD_PART_NUMBER="addw1"
|
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
||||||
CONFIG_MAINBOARD_VERSION="addw1"
|
CONFIG_HAVE_IFD_BIN=y
|
||||||
CONFIG_MAINBOARD_DIR="system76/addw1"
|
CONFIG_HAVE_ME_BIN=y
|
||||||
CONFIG_MAX_CPUS=16
|
|
||||||
CONFIG_DIMM_MAX=2
|
|
||||||
CONFIG_DIMM_SPD_SIZE=512
|
|
||||||
CONFIG_FMDFILE=""
|
|
||||||
# CONFIG_NO_POST is not set
|
|
||||||
CONFIG_MAINBOARD_VENDOR="System76"
|
|
||||||
CONFIG_ONBOARD_VGA_IS_PRIMARY=y
|
|
||||||
# CONFIG_VGA_BIOS is not set
|
|
||||||
CONFIG_CBFS_SIZE=0xA00000
|
|
||||||
CONFIG_DEVICETREE="devicetree.cb"
|
|
||||||
CONFIG_C_ENV_BOOTBLOCK_SIZE=0xC000
|
|
||||||
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="System76"
|
|
||||||
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
|
|
||||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xe00
|
|
||||||
# CONFIG_POST_IO is not set
|
|
||||||
CONFIG_OVERRIDE_DEVICETREE=""
|
|
||||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
|
||||||
CONFIG_UART_FOR_CONSOLE=2
|
|
||||||
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
|
|
||||||
# CONFIG_VBOOT is not set
|
|
||||||
CONFIG_DCACHE_RAM_BASE=0xfef00000
|
|
||||||
CONFIG_DCACHE_RAM_SIZE=0x40000
|
|
||||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x20400
|
|
||||||
CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
|
|
||||||
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
|
|
||||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
|
||||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
|
||||||
# CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS is not set
|
|
||||||
CONFIG_TPM_INIT=y
|
|
||||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
|
||||||
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
||||||
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
||||||
# CONFIG_CONSOLE_SERIAL is not set
|
CONFIG_PAYLOAD_ELF=y
|
||||||
CONFIG_TPM_PIRQ=0x0
|
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
||||||
CONFIG_PCIEXP_HOTPLUG_BUSES=32
|
|
||||||
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
|
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
|
||||||
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
|
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
|
||||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Adder WS"
|
CONFIG_POST_IO=n
|
||||||
CONFIG_HAVE_IFD_BIN=y
|
|
||||||
CONFIG_ADD_FSP_BINARIES=y
|
|
||||||
CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
|
|
||||||
CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
|
|
||||||
CONFIG_FSP_S_CBFS="fsps.bin"
|
|
||||||
CONFIG_FSP_M_CBFS="fspm.bin"
|
|
||||||
CONFIG_PS2K_EISAID="PNP0303"
|
|
||||||
CONFIG_PS2M_EISAID="PNP0F13"
|
|
||||||
CONFIG_PCIEXP_L1_SUB_STATE=y
|
|
||||||
CONFIG_PCIEXP_CLK_PM=y
|
|
||||||
CONFIG_CONSOLE_POST=y
|
|
||||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
|
||||||
CONFIG_HEAP_SIZE=0x8000
|
|
||||||
# CONFIG_POST_DEVICE is not set
|
|
||||||
CONFIG_BOARD_SYSTEM76_ADDW1=y
|
|
||||||
# CONFIG_BOARD_SYSTEM76_ADDW2 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_BONW14 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP4 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_DARP6 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_15 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_17 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_15 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_17 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE15 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP2 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP3 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP3_B is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_LEMP9 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_ORYP5 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_ORYP6 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_THELIO_B1 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP3_C is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_DARP5 is not set
|
|
||||||
CONFIG_FSP_HEADER_PATH="3rdparty/fsp/CoffeeLakeFspBinPkg/Include/"
|
|
||||||
CONFIG_FSP_FD_PATH="3rdparty/fsp/CoffeeLakeFspBinPkg/Fsp.fd"
|
|
||||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x1558
|
|
||||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x65d1
|
|
||||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
|
||||||
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
|
||||||
CONFIG_COREBOOT_ROMSIZE_KB=16384
|
|
||||||
CONFIG_ROM_SIZE=0x01000000
|
|
||||||
CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
|
|
||||||
CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
|
|
||||||
CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
|
|
||||||
# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
|
|
||||||
CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
|
|
||||||
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
|
|
||||||
CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
|
|
||||||
CONFIG_SYSTEM_TYPE_LAPTOP=y
|
|
||||||
# CONFIG_SYSTEM_TYPE_TABLET is not set
|
|
||||||
# CONFIG_SYSTEM_TYPE_DETACHABLE is not set
|
|
||||||
# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set
|
|
||||||
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Chipset
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# SoC
|
|
||||||
#
|
|
||||||
CONFIG_CPU_SPECIFIC_OPTIONS=y
|
|
||||||
CONFIG_X86_RESET_VECTOR=0xfffffff0
|
|
||||||
CONFIG_ROMSTAGE_ADDR=0x2000000
|
|
||||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
|
||||||
CONFIG_RAMBASE=0xe00000
|
|
||||||
CONFIG_CPU_ADDR_BITS=36
|
|
||||||
# CONFIG_CHECK_REV_IN_OPROM_NAME is not set
|
|
||||||
CONFIG_CONSOLE_UART_BASE_ADDRESS=0xfe032000
|
|
||||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
|
||||||
CONFIG_SMM_RESERVED_SIZE=0x200000
|
|
||||||
CONFIG_SMM_MODULE_STACK_SIZE=0x800
|
|
||||||
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
|
|
||||||
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=216
|
|
||||||
CONFIG_FSP_TEMP_RAM_SIZE=0x10000
|
|
||||||
# CONFIG_SOC_CAVIUM_CN81XX is not set
|
|
||||||
CONFIG_ARCH_ARMV8_EXTENSION=0
|
|
||||||
CONFIG_STACK_SIZE=0x1000
|
|
||||||
# CONFIG_SOC_CAVIUM_COMMON is not set
|
|
||||||
# CONFIG_SOC_INTEL_GLK is not set
|
|
||||||
CONFIG_PCR_BASE_ADDRESS=0xfd000000
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
|
|
||||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
|
||||||
# CONFIG_NHLT_DMIC_1CH_16B is not set
|
|
||||||
# CONFIG_NHLT_DMIC_2CH_16B is not set
|
|
||||||
# CONFIG_NHLT_DMIC_4CH_16B is not set
|
|
||||||
# CONFIG_NHLT_MAX98357 is not set
|
|
||||||
# CONFIG_NHLT_DA7219 is not set
|
|
||||||
CONFIG_IFD_CHIPSET="cnl"
|
|
||||||
CONFIG_CPU_BCLK_MHZ=100
|
|
||||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
|
|
||||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=3
|
|
||||||
CONFIG_SOC_INTEL_I2C_DEV_MAX=4
|
|
||||||
CONFIG_PCIEXP_ASPM=y
|
|
||||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
|
||||||
CONFIG_IED_REGION_SIZE=0x400000
|
|
||||||
CONFIG_SOC_INTEL_CANNONLAKE_BASE=y
|
|
||||||
CONFIG_SOC_INTEL_CANNONLAKE_ALTERNATE_HEADERS=y
|
|
||||||
CONFIG_SOC_INTEL_COFFEELAKE=y
|
|
||||||
CONFIG_SOC_INTEL_CANNONLAKE_PCH_H=y
|
|
||||||
# CONFIG_NHLT_MAX98373 is not set
|
|
||||||
CONFIG_MAX_ROOT_PORTS=24
|
|
||||||
CONFIG_MAX_PCIE_CLOCKS=16
|
|
||||||
# CONFIG_MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE is not set
|
|
||||||
CONFIG_USE_CANNONLAKE_CAR_NEM_ENHANCED=y
|
|
||||||
# CONFIG_USE_CANNONLAKE_FSP_CAR is not set
|
|
||||||
CONFIG_SOC_INTEL_CANNONLAKE_DEBUG_CONSENT=0
|
|
||||||
CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
|
|
||||||
CONFIG_UART_PCI_ADDR=0x0
|
|
||||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Intel SoC Common Code
|
|
||||||
#
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
|
|
||||||
# CONFIG_INTEL_CAR_NEM is not set
|
|
||||||
# CONFIG_INTEL_CAR_CQOS is not set
|
|
||||||
CONFIG_INTEL_CAR_NEM_ENHANCED=y
|
|
||||||
# CONFIG_USE_INTEL_FSP_MP_INIT is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_DTT is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
|
|
||||||
CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
|
|
||||||
CONFIG_SOC_INTEL_CONFIGURE_DDI_A_4_LANES=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_IMC is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
|
|
||||||
# CONFIG_PMC_INVALID_READ_AFTER_WRITE is not set
|
|
||||||
CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_MMC_OVERRIDE is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_MAX is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_256MB is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_128MB is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_64MB is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_32MB is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_1MB is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_DISABLED=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
|
|
||||||
# CONFIG_HECI_DISABLE_USING_SMM is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
|
|
||||||
CONFIG_SA_PCIEX_LENGTH=0x10000000
|
|
||||||
# CONFIG_SA_ENABLE_IMR is not set
|
|
||||||
# CONFIG_SA_ENABLE_DPR is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
|
|
||||||
CONFIG_USE_LEGACY_8254_TIMER=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
|
|
||||||
CONFIG_INTEL_LPSS_UART_FOR_CONSOLE=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Intel SoC Common PCH Code
|
|
||||||
#
|
|
||||||
CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
|
|
||||||
CONFIG_PCH_SPECIFIC_OPTIONS=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Intel SoC Common coreboot stages
|
|
||||||
#
|
|
||||||
CONFIG_SOC_INTEL_COMMON_RESET=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
|
|
||||||
# CONFIG_ACPI_CONSOLE is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_ACPI is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_NHLT=y
|
|
||||||
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
|
|
||||||
# CONFIG_SOC_MEDIATEK_MT8173 is not set
|
|
||||||
# CONFIG_SOC_MEDIATEK_MT8183 is not set
|
|
||||||
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
|
|
||||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
|
||||||
# CONFIG_SOC_QUALCOMM_COMMON is not set
|
|
||||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
|
||||||
# CONFIG_SOC_QC_IPQ806X is not set
|
|
||||||
# CONFIG_SOC_QUALCOMM_QCS405 is not set
|
|
||||||
# CONFIG_SOC_QUALCOMM_SC7180 is not set
|
|
||||||
# CONFIG_SOC_QUALCOMM_SDM845 is not set
|
|
||||||
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
|
|
||||||
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
|
|
||||||
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
|
|
||||||
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
|
|
||||||
# CONFIG_SOC_UCB_RISCV is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# CPU
|
|
||||||
#
|
|
||||||
# CONFIG_CPU_AMD_AGESA is not set
|
|
||||||
# CONFIG_CPU_AMD_PI is not set
|
|
||||||
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
|
|
||||||
CONFIG_SSE2=y
|
|
||||||
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
|
|
||||||
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
|
|
||||||
CONFIG_CPU_INTEL_COMMON=y
|
|
||||||
CONFIG_ENABLE_VMX=y
|
|
||||||
CONFIG_SET_IA32_FC_LOCK_BIT=y
|
|
||||||
CONFIG_CPU_INTEL_COMMON_SMM=y
|
|
||||||
CONFIG_MICROCODE_UPDATE_PRE_RAM=y
|
|
||||||
# CONFIG_CPU_TI_AM335X is not set
|
|
||||||
# CONFIG_PARALLEL_CPU_INIT is not set
|
|
||||||
CONFIG_PARALLEL_MP=y
|
|
||||||
CONFIG_PARALLEL_MP_AP_WORK=y
|
|
||||||
# CONFIG_UDELAY_LAPIC is not set
|
|
||||||
CONFIG_UDELAY_TSC=y
|
|
||||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
|
||||||
# CONFIG_TSC_SYNC_LFENCE is not set
|
|
||||||
# CONFIG_TSC_SYNC_MFENCE is not set
|
|
||||||
CONFIG_LOGICAL_CPUS=y
|
|
||||||
CONFIG_HAVE_SMI_HANDLER=y
|
|
||||||
# CONFIG_NO_SMM is not set
|
|
||||||
# CONFIG_SMM_ASEG is not set
|
|
||||||
CONFIG_SMM_TSEG=y
|
|
||||||
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
|
|
||||||
CONFIG_SMM_STUB_STACK_SIZE=0x400
|
|
||||||
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
|
|
||||||
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
|
|
||||||
# CONFIG_X86_AMD_FIXED_MTRRS is not set
|
|
||||||
# CONFIG_X86_AMD_INIT_SIPI is not set
|
|
||||||
# CONFIG_SOC_SETS_MSRS is not set
|
|
||||||
CONFIG_SMP=y
|
|
||||||
CONFIG_SSE=y
|
|
||||||
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
|
||||||
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
|
|
||||||
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
|
|
||||||
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
|
||||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
|
|
||||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
|
||||||
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Northbridge
|
|
||||||
#
|
|
||||||
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
|
|
||||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
|
||||||
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
|
|
||||||
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
|
|
||||||
|
|
||||||
#
|
|
||||||
# Southbridge
|
|
||||||
#
|
|
||||||
# CONFIG_AMD_SB_CIMX is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
|
|
||||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7 is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9 is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_SILVERMONT is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
|
|
||||||
# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG is not set
|
|
||||||
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
|
|
||||||
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
|
|
||||||
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Super I/O
|
|
||||||
#
|
|
||||||
# CONFIG_SUPERIO_ASPEED_AST2400 is not set
|
|
||||||
# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
|
|
||||||
# CONFIG_SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND is not set
|
|
||||||
# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Embedded Controllers
|
|
||||||
#
|
|
||||||
# CONFIG_EC_51NB_NPCE985LA0DX is not set
|
|
||||||
# CONFIG_EC_GOOGLE_CHROMEEC_SKUID is not set
|
|
||||||
# CONFIG_EC_GOOGLE_WILCO is not set
|
|
||||||
CONFIG_EC_SYSTEM76_EC=y
|
|
||||||
CONFIG_EC_SYSTEM76_EC_BAT_THRESHOLDS=y
|
|
||||||
CONFIG_EC_SYSTEM76_EC_COLOR_KEYBOARD=y
|
|
||||||
CONFIG_EC_SYSTEM76_EC_DGPU=y
|
|
||||||
CONFIG_EC_SYSTEM76_EC_OLED=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Intel Firmware
|
|
||||||
#
|
|
||||||
CONFIG_HAVE_ME_BIN=y
|
|
||||||
# CONFIG_MAINBOARD_USES_IFD_GBE_REGION is not set
|
|
||||||
# CONFIG_MAINBOARD_USES_IFD_EC_REGION is not set
|
|
||||||
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
|
|
||||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
|
||||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
|
||||||
# CONFIG_CAVIUM_BDK is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
|
|
||||||
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
|
|
||||||
# CONFIG_UEFI_2_4_BINDING is not set
|
|
||||||
# CONFIG_UDK_2015_BINDING is not set
|
|
||||||
CONFIG_UDK_2017_BINDING=y
|
|
||||||
# CONFIG_UDK_202005_BINDING is not set
|
|
||||||
CONFIG_UDK_2013_VERSION=2013
|
|
||||||
CONFIG_UDK_2015_VERSION=2015
|
|
||||||
CONFIG_UDK_2017_VERSION=2017
|
|
||||||
CONFIG_UDK_202005_VERSION=202005
|
|
||||||
CONFIG_UDK_VERSION=2017
|
|
||||||
# CONFIG_USE_SIEMENS_HWILIB is not set
|
|
||||||
# CONFIG_ARM_LPAE is not set
|
|
||||||
CONFIG_ARCH_X86=y
|
|
||||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
|
||||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
|
||||||
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
|
||||||
CONFIG_ARCH_POSTCAR_X86_32=y
|
|
||||||
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
|
||||||
# CONFIG_ARCH_POSTCAR_X86_64 is not set
|
|
||||||
# CONFIG_USE_MARCH_586 is not set
|
|
||||||
# CONFIG_AP_IN_SIPI_WAIT is not set
|
|
||||||
# CONFIG_SIPI_VECTOR_IN_ROM is not set
|
|
||||||
CONFIG_RAMTOP=0x1000000
|
|
||||||
CONFIG_NUM_IPI_STARTS=2
|
|
||||||
CONFIG_PC80_SYSTEM=y
|
|
||||||
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
|
|
||||||
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
|
|
||||||
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
|
|
||||||
# CONFIG_HPET_ADDRESS_OVERRIDE is not set
|
|
||||||
CONFIG_HPET_ADDRESS=0xfed00000
|
|
||||||
CONFIG_ID_SECTION_OFFSET=0x80
|
|
||||||
CONFIG_POSTCAR_STAGE=y
|
|
||||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
|
||||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
|
||||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
|
||||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
|
||||||
# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
|
|
||||||
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
|
||||||
# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
|
|
||||||
CONFIG_IDT_IN_EVERY_STAGE=y
|
|
||||||
CONFIG_HAVE_CF9_RESET=y
|
|
||||||
# CONFIG_PIRQ_ROUTE is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Devices
|
|
||||||
#
|
|
||||||
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
|
||||||
CONFIG_HAVE_FSP_GOP=y
|
|
||||||
# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
|
|
||||||
# CONFIG_VGA_ROM_RUN is not set
|
|
||||||
CONFIG_RUN_FSP_GOP=y
|
CONFIG_RUN_FSP_GOP=y
|
||||||
# CONFIG_NO_GFX_INIT is not set
|
|
||||||
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Display
|
|
||||||
#
|
|
||||||
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
|
|
||||||
CONFIG_LINEAR_FRAMEBUFFER=y
|
|
||||||
# CONFIG_BOOTSPLASH is not set
|
|
||||||
CONFIG_PCI=y
|
|
||||||
# CONFIG_NO_MMCONF_SUPPORT is not set
|
|
||||||
CONFIG_MMCONF_SUPPORT=y
|
|
||||||
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
|
|
||||||
CONFIG_HT_CHAIN_UNITID_BASE=0
|
|
||||||
CONFIG_HT_CHAIN_END_UNITID_BASE=0
|
|
||||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
|
||||||
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
|
||||||
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
|
|
||||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
|
||||||
CONFIG_PCIEXP_HOTPLUG=y
|
|
||||||
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
|
|
||||||
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
|
|
||||||
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
|
|
||||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
|
||||||
CONFIG_INTEL_GMA_HAVE_VBT=y
|
|
||||||
CONFIG_INTEL_GMA_ADD_VBT=y
|
|
||||||
# CONFIG_SOFTWARE_I2C is not set
|
|
||||||
# CONFIG_RESOURCE_ALLOCATOR_V3 is not set
|
|
||||||
CONFIG_RESOURCE_ALLOCATOR_V4=y
|
|
||||||
# CONFIG_XHCI_UTILS is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Generic Drivers
|
|
||||||
#
|
|
||||||
# CONFIG_DRIVERS_AS3722_RTC is not set
|
|
||||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
|
||||||
# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
|
|
||||||
# CONFIG_ELOG is not set
|
|
||||||
# CONFIG_GIC is not set
|
|
||||||
# CONFIG_IPMI_KCS is not set
|
|
||||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
|
||||||
CONFIG_CACHE_MRC_SETTINGS=y
|
|
||||||
CONFIG_MRC_SETTINGS_PROTECT=y
|
|
||||||
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
|
|
||||||
# CONFIG_MRC_SETTINGS_VARIABLE_DATA is not set
|
|
||||||
# CONFIG_MRC_WRITE_NV_LATE is not set
|
|
||||||
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
|
|
||||||
# CONFIG_RT8168_SUPPORT_LEGACY_VPD_MAC is not set
|
|
||||||
# CONFIG_RT8168_SET_LED_MODE is not set
|
|
||||||
CONFIG_SMMSTORE=y
|
CONFIG_SMMSTORE=y
|
||||||
# CONFIG_SMMSTORE_IN_CBFS is not set
|
CONFIG_SMMSTORE_V2=y
|
||||||
CONFIG_SMMSTORE_REGION="SMMSTORE"
|
CONFIG_USE_OPTION_TABLE=y
|
||||||
CONFIG_SMMSTORE_FILENAME="smm_store"
|
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
||||||
CONFIG_SMMSTORE_SIZE=0x40000
|
#CONFIG_CONSOLE_SYSTEM76_EC=y
|
||||||
CONFIG_SPI_FLASH=y
|
|
||||||
# CONFIG_SPI_SDCARD is not set
|
|
||||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
|
||||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
|
|
||||||
CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
|
|
||||||
CONFIG_SPI_FLASH_SMM=y
|
|
||||||
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
|
||||||
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
|
|
||||||
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
|
|
||||||
CONFIG_DRIVERS_UART=y
|
|
||||||
CONFIG_NO_UART_ON_SUPERIO=y
|
|
||||||
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
|
|
||||||
# CONFIG_UART_OVERRIDE_REFCLK is not set
|
|
||||||
CONFIG_DRIVERS_UART_8250MEM=y
|
|
||||||
CONFIG_DRIVERS_UART_8250MEM_32=y
|
|
||||||
# CONFIG_HAVE_UART_SPECIAL is not set
|
|
||||||
# CONFIG_DRIVERS_UART_PL011 is not set
|
|
||||||
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
|
|
||||||
# CONFIG_HAVE_USBDEBUG is not set
|
|
||||||
# CONFIG_HAVE_USBDEBUG_OPTIONS is not set
|
|
||||||
# CONFIG_VPD is not set
|
|
||||||
CONFIG_DRIVERS_GENERIC_WIFI=y
|
|
||||||
# CONFIG_USE_SAR is not set
|
|
||||||
# CONFIG_DRIVERS_AMD_PI is not set
|
|
||||||
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
|
||||||
# CONFIG_DRIVERS_GFX_GENERIC is not set
|
|
||||||
CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
|
||||||
# CONFIG_DRIVERS_I2C_DESIGNWARE_DEBUG is not set
|
|
||||||
CONFIG_DRIVERS_I2C_GENERIC=y
|
|
||||||
CONFIG_DRIVERS_I2C_HID=y
|
|
||||||
# CONFIG_DRIVERS_I2C_MAX98373 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_MAX98390 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_MAX98927 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_PCA9538 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_PCF8523 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_PTN3460 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_RT1011 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_RT5663 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_RTD2132 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_RX6110SA is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_SX9310 is not set
|
|
||||||
CONFIG_DRIVERS_I2C_TAS5825M=y
|
|
||||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
|
|
||||||
# CONFIG_DRIVERS_INTEL_DPTF is not set
|
|
||||||
CONFIG_FSP_USE_REPO=y
|
|
||||||
# CONFIG_DISPLAY_HOBS is not set
|
|
||||||
# CONFIG_DISPLAY_UPD_DATA is not set
|
|
||||||
CONFIG_PLATFORM_USES_FSP2_0=y
|
|
||||||
# CONFIG_PLATFORM_USES_FSP2_1 is not set
|
|
||||||
# CONFIG_PLATFORM_USES_FSP2_2 is not set
|
|
||||||
CONFIG_HAVE_INTEL_FSP_REPO=y
|
|
||||||
# CONFIG_FSP_CAR is not set
|
|
||||||
CONFIG_FSP_M_XIP=y
|
|
||||||
# CONFIG_FSP_T_XIP is not set
|
|
||||||
CONFIG_FSP_USES_CB_STACK=y
|
|
||||||
CONFIG_HAVE_FSP_LOGO_SUPPORT=y
|
|
||||||
# CONFIG_FSP2_0_DISPLAY_LOGO is not set
|
|
||||||
CONFIG_FSP_COMPRESS_FSP_S_LZMA=y
|
|
||||||
# CONFIG_INTEL_DDI is not set
|
|
||||||
# CONFIG_INTEL_EDID is not set
|
|
||||||
# CONFIG_INTEL_INT15 is not set
|
|
||||||
CONFIG_INTEL_GMA_ACPI=y
|
|
||||||
CONFIG_INTEL_GMA_BCLV_WIDTH=16
|
|
||||||
CONFIG_INTEL_GMA_BCLM_WIDTH=16
|
|
||||||
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
|
|
||||||
# CONFIG_INTEL_GMA_SWSMISCI is not set
|
|
||||||
# CONFIG_DRIVER_INTEL_I210 is not set
|
|
||||||
# CONFIG_DRIVERS_INTEL_ISH is not set
|
|
||||||
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
|
|
||||||
# CONFIG_DRIVERS_INTEL_PMC is not set
|
|
||||||
# CONFIG_HAVE_INTEL_PTT is not set
|
|
||||||
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
|
|
||||||
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
|
|
||||||
CONFIG_FRU_DEVICE_ID=0
|
|
||||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
|
||||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
|
||||||
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
|
||||||
CONFIG_DRIVERS_MC146818=y
|
|
||||||
CONFIG_MAINBOARD_HAS_LPC_TPM=y
|
|
||||||
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
|
||||||
# CONFIG_DRIVERS_RICOH_RCE822 is not set
|
|
||||||
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
|
|
||||||
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
|
|
||||||
# CONFIG_DRIVERS_SIL_3114 is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_SPI_TPM is not set
|
|
||||||
CONFIG_DRIVERS_SYSTEM76_DGPU=y
|
|
||||||
# CONFIG_DRIVER_TI_TPS65090 is not set
|
|
||||||
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
|
|
||||||
# CONFIG_DRIVERS_USB_ACPI is not set
|
|
||||||
# CONFIG_DRIVERS_USB_PCI_XHCI is not set
|
|
||||||
# CONFIG_COMMONLIB_STORAGE is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Security
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# Verified Boot (vboot)
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# Trusted Platform Module
|
|
||||||
#
|
|
||||||
CONFIG_TPM2=y
|
|
||||||
CONFIG_MAINBOARD_HAS_TPM2=y
|
|
||||||
# CONFIG_DEBUG_TPM is not set
|
|
||||||
CONFIG_TPM_RDRESP_NEED_DELAY=y
|
|
||||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Memory initialization
|
|
||||||
#
|
|
||||||
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
|
|
||||||
# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
|
|
||||||
# CONFIG_INTEL_TXT is not set
|
|
||||||
# CONFIG_STM is not set
|
|
||||||
CONFIG_BOOTMEDIA_LOCK_NONE=y
|
|
||||||
# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
|
|
||||||
# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
|
|
||||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
|
||||||
CONFIG_ACPI_HAVE_PCAT_8259=y
|
|
||||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
|
||||||
CONFIG_HAVE_ACPI_TABLES=y
|
|
||||||
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
|
|
||||||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|
||||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
|
||||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
|
||||||
CONFIG_RTC=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Console
|
|
||||||
#
|
|
||||||
CONFIG_BOOTBLOCK_CONSOLE=y
|
|
||||||
CONFIG_POSTCAR_CONSOLE=y
|
|
||||||
CONFIG_SQUELCH_EARLY_SMP=y
|
|
||||||
CONFIG_FIXED_UART_FOR_CONSOLE=y
|
|
||||||
# CONFIG_SPKMODEM is not set
|
|
||||||
# CONFIG_CONSOLE_NE2K is not set
|
|
||||||
CONFIG_CONSOLE_CBMEM=y
|
|
||||||
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
|
|
||||||
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
|
|
||||||
# CONFIG_CONSOLE_SPI_FLASH is not set
|
|
||||||
# CONFIG_CONSOLE_SYSTEM76_EC is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
|
|
||||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
|
||||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
|
|
||||||
# CONFIG_CMOS_POST is not set
|
|
||||||
# CONFIG_DEFAULT_POST_ON_LPC is not set
|
|
||||||
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
|
|
||||||
CONFIG_HWBASE_DEBUG_CB=y
|
|
||||||
CONFIG_HAVE_ACPI_RESUME=y
|
|
||||||
# CONFIG_DISABLE_ACPI_HIBERNATE is not set
|
|
||||||
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
|
||||||
# CONFIG_NO_MONOTONIC_TIMER is not set
|
|
||||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
|
||||||
# CONFIG_TIMER_QUEUE is not set
|
|
||||||
# CONFIG_HAVE_OPTION_TABLE is not set
|
|
||||||
# CONFIG_PCI_IO_CFG_EXT is not set
|
|
||||||
CONFIG_IOAPIC=y
|
|
||||||
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
|
|
||||||
# CONFIG_GFXUMA is not set
|
|
||||||
CONFIG_ACPI_NHLT=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# System tables
|
|
||||||
#
|
|
||||||
# CONFIG_GENERATE_MP_TABLE is not set
|
|
||||||
# CONFIG_GENERATE_PIRQ_TABLE is not set
|
|
||||||
CONFIG_GENERATE_SMBIOS_TABLES=y
|
|
||||||
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
|
|
||||||
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
|
|
||||||
|
|
||||||
#
|
|
||||||
# Payload
|
|
||||||
#
|
|
||||||
# CONFIG_PAYLOAD_NONE is not set
|
|
||||||
CONFIG_PAYLOAD_ELF=y
|
|
||||||
# CONFIG_PAYLOAD_FILO is not set
|
|
||||||
# CONFIG_PAYLOAD_GRUB2 is not set
|
|
||||||
# CONFIG_PAYLOAD_LINUXBOOT is not set
|
|
||||||
# CONFIG_PAYLOAD_SEABIOS is not set
|
|
||||||
# CONFIG_PAYLOAD_UBOOT is not set
|
|
||||||
# CONFIG_PAYLOAD_YABITS is not set
|
|
||||||
# CONFIG_PAYLOAD_LINUX is not set
|
|
||||||
# CONFIG_PAYLOAD_TIANOCORE is not set
|
|
||||||
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
|
||||||
CONFIG_PAYLOAD_OPTIONS=""
|
|
||||||
# CONFIG_PXE is not set
|
|
||||||
# CONFIG_COMPRESSED_PAYLOAD_NONE is not set
|
|
||||||
CONFIG_COMPRESSED_PAYLOAD_LZMA=y
|
|
||||||
# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set
|
|
||||||
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
|
|
||||||
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Secondary Payloads
|
|
||||||
#
|
|
||||||
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
|
|
||||||
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
|
|
||||||
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Debugging
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# CPU Debug Settings
|
|
||||||
#
|
|
||||||
CONFIG_HAVE_DISPLAY_MTRRS=y
|
|
||||||
# CONFIG_DISPLAY_MTRRS is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# BLOB Debug Settings
|
|
||||||
#
|
|
||||||
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
|
|
||||||
# CONFIG_DISPLAY_FSP_HEADER is not set
|
|
||||||
# CONFIG_VERIFY_HOBS is not set
|
|
||||||
CONFIG_DISPLAY_FSP_VERSION_INFO=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# General Debug Settings
|
|
||||||
#
|
|
||||||
# CONFIG_GDB_STUB is not set
|
|
||||||
# CONFIG_FATAL_ASSERTS is not set
|
|
||||||
CONFIG_HAVE_DEBUG_GPIO=y
|
|
||||||
# CONFIG_DEBUG_GPIO is not set
|
|
||||||
# CONFIG_DEBUG_CBFS is not set
|
|
||||||
# CONFIG_HAVE_DEBUG_RAM_SETUP is not set
|
|
||||||
CONFIG_HAVE_DEBUG_SMBUS=y
|
|
||||||
# CONFIG_DEBUG_SMBUS is not set
|
|
||||||
# CONFIG_DEBUG_SMI is not set
|
|
||||||
# CONFIG_DEBUG_MALLOC is not set
|
|
||||||
# CONFIG_DEBUG_CONSOLE_INIT is not set
|
|
||||||
# CONFIG_DEBUG_SPI_FLASH is not set
|
|
||||||
# CONFIG_TRACE is not set
|
|
||||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
|
||||||
# CONFIG_DEBUG_ADA_CODE is not set
|
|
||||||
CONFIG_HAVE_EM100_SUPPORT=y
|
|
||||||
# CONFIG_EM100 is not set
|
|
||||||
CONFIG_NO_EDID_FILL_FB=y
|
|
||||||
CONFIG_SPD_READ_BY_WORD=y
|
|
||||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
|
||||||
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
|
|
||||||
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
|
|
||||||
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
|
|
||||||
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
|
|
||||||
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
|
|
||||||
CONFIG_REG_SCRIPT=y
|
|
||||||
CONFIG_MAX_REBOOT_CNT=3
|
|
||||||
# CONFIG_NO_XIP_EARLY_STAGES is not set
|
|
||||||
# CONFIG_EARLY_CBMEM_LIST is not set
|
|
||||||
CONFIG_RELOCATABLE_MODULES=y
|
|
||||||
CONFIG_GENERIC_GPIO_LIB=y
|
|
||||||
CONFIG_HAVE_BOOTBLOCK=y
|
|
||||||
CONFIG_HAVE_ROMSTAGE=y
|
|
||||||
CONFIG_HAVE_RAMSTAGE=y
|
|
||||||
|
9
models/addw1/edk2.config
Normal file
9
models/addw1/edk2.config
Normal file
@@ -0,0 +1,9 @@
|
|||||||
|
BOOTLOADER=COREBOOT
|
||||||
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
|
SHELL_TYPE=NONE
|
||||||
|
TPM_ENABLE=TRUE
|
||||||
|
#SYSTEM76_EC_LOGGING=TRUE
|
BIN
models/addw1/fd.rom
(Stored with Git LFS)
BIN
models/addw1/fd.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/addw1/me.rom
(Stored with Git LFS)
BIN
models/addw1/me.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/addw2/IntelGopDriver.efi
(Stored with Git LFS)
BIN
models/addw2/IntelGopDriver.efi
(Stored with Git LFS)
Binary file not shown.
@@ -11,4 +11,4 @@ https://system76.com/guides/addw2
|
|||||||
- HAP: false
|
- HAP: false
|
||||||
- [ME](./me.rom)
|
- [ME](./me.rom)
|
||||||
- Size: 4092 KB
|
- Size: 4092 KB
|
||||||
- Version: 14.0.30.1114
|
- Version: 14.0.60.1807
|
||||||
|
@@ -1,848 +1,20 @@
|
|||||||
#
|
|
||||||
# Automatically generated file; DO NOT EDIT.
|
|
||||||
# coreboot configuration
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# General setup
|
|
||||||
#
|
|
||||||
CONFIG_COREBOOT_BUILD=y
|
|
||||||
CONFIG_LOCALVERSION=""
|
|
||||||
CONFIG_CBFS_PREFIX="fallback"
|
|
||||||
CONFIG_COMPILER_GCC=y
|
|
||||||
# CONFIG_COMPILER_LLVM_CLANG is not set
|
|
||||||
# CONFIG_ANY_TOOLCHAIN is not set
|
|
||||||
CONFIG_CCACHE=y
|
|
||||||
# CONFIG_FMD_GENPARSER is not set
|
|
||||||
# CONFIG_UTIL_GENPARSER is not set
|
|
||||||
CONFIG_COMPRESS_RAMSTAGE=y
|
|
||||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
|
||||||
CONFIG_COLLECT_TIMESTAMPS=y
|
|
||||||
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
|
|
||||||
CONFIG_USE_BLOBS=y
|
|
||||||
# CONFIG_USE_AMD_BLOBS is not set
|
|
||||||
# CONFIG_USE_QC_BLOBS is not set
|
|
||||||
# CONFIG_COVERAGE is not set
|
|
||||||
# CONFIG_UBSAN is not set
|
|
||||||
# CONFIG_NO_STAGE_CACHE is not set
|
|
||||||
CONFIG_TSEG_STAGE_CACHE=y
|
|
||||||
# CONFIG_UPDATE_IMAGE is not set
|
|
||||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
|
||||||
# CONFIG_FW_CONFIG is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Mainboard
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# Important: Run 'make distclean' before switching boards
|
|
||||||
#
|
|
||||||
# CONFIG_VENDOR_51NB is not set
|
|
||||||
# CONFIG_VENDOR_ADLINK is not set
|
|
||||||
# CONFIG_VENDOR_AMD is not set
|
|
||||||
# CONFIG_VENDOR_AOPEN is not set
|
|
||||||
# CONFIG_VENDOR_APPLE is not set
|
|
||||||
# CONFIG_VENDOR_ASROCK is not set
|
|
||||||
# CONFIG_VENDOR_ASUS is not set
|
|
||||||
# CONFIG_VENDOR_BAP is not set
|
|
||||||
# CONFIG_VENDOR_BIOSTAR is not set
|
|
||||||
# CONFIG_VENDOR_CAVIUM is not set
|
|
||||||
# CONFIG_VENDOR_COMPULAB is not set
|
|
||||||
# CONFIG_VENDOR_DELL is not set
|
|
||||||
# CONFIG_VENDOR_ELMEX is not set
|
|
||||||
# CONFIG_VENDOR_EMULATION is not set
|
|
||||||
# CONFIG_VENDOR_FACEBOOK is not set
|
|
||||||
# CONFIG_VENDOR_FOXCONN is not set
|
|
||||||
# CONFIG_VENDOR_GETAC is not set
|
|
||||||
# CONFIG_VENDOR_GIGABYTE is not set
|
|
||||||
# CONFIG_VENDOR_GIZMOSPHERE is not set
|
|
||||||
# CONFIG_VENDOR_GOOGLE is not set
|
|
||||||
# CONFIG_VENDOR_HP is not set
|
|
||||||
# CONFIG_VENDOR_IBASE is not set
|
|
||||||
# CONFIG_VENDOR_INTEL is not set
|
|
||||||
# CONFIG_VENDOR_JETWAY is not set
|
|
||||||
# CONFIG_VENDOR_KONTRON is not set
|
|
||||||
# CONFIG_VENDOR_LENOVO is not set
|
|
||||||
# CONFIG_VENDOR_LIBRETREND is not set
|
|
||||||
# CONFIG_VENDOR_LIPPERT is not set
|
|
||||||
# CONFIG_VENDOR_MSI is not set
|
|
||||||
# CONFIG_VENDOR_OCP is not set
|
|
||||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
|
||||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
|
||||||
# CONFIG_VENDOR_PCENGINES is not set
|
|
||||||
# CONFIG_VENDOR_PORTWELL is not set
|
|
||||||
# CONFIG_VENDOR_PRODRIVE is not set
|
|
||||||
# CONFIG_VENDOR_PROTECTLI is not set
|
|
||||||
# CONFIG_VENDOR_PURISM is not set
|
|
||||||
# CONFIG_VENDOR_RAZER is not set
|
|
||||||
# CONFIG_VENDOR_RODA is not set
|
|
||||||
# CONFIG_VENDOR_SAMSUNG is not set
|
|
||||||
# CONFIG_VENDOR_SAPPHIRE is not set
|
|
||||||
# CONFIG_VENDOR_SCALEWAY is not set
|
|
||||||
# CONFIG_VENDOR_SIEMENS is not set
|
|
||||||
# CONFIG_VENDOR_SIFIVE is not set
|
|
||||||
# CONFIG_VENDOR_SUPERMICRO is not set
|
|
||||||
CONFIG_VENDOR_SYSTEM76=y
|
CONFIG_VENDOR_SYSTEM76=y
|
||||||
# CONFIG_VENDOR_TI is not set
|
CONFIG_BOARD_SYSTEM76_ADDW2=y
|
||||||
# CONFIG_VENDOR_UP is not set
|
CONFIG_CCACHE=y
|
||||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
CONFIG_CONSOLE_SERIAL=n
|
||||||
CONFIG_MAINBOARD_PART_NUMBER="addw2"
|
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
||||||
CONFIG_MAINBOARD_VERSION="addw2"
|
CONFIG_HAVE_IFD_BIN=y
|
||||||
CONFIG_MAINBOARD_DIR="system76/addw2"
|
CONFIG_HAVE_ME_BIN=y
|
||||||
CONFIG_MAX_CPUS=16
|
|
||||||
CONFIG_VGA_BIOS_ID="8086,9bc4"
|
|
||||||
CONFIG_DIMM_MAX=2
|
|
||||||
CONFIG_DIMM_SPD_SIZE=512
|
|
||||||
CONFIG_FMDFILE=""
|
|
||||||
# CONFIG_NO_POST is not set
|
|
||||||
CONFIG_MAINBOARD_VENDOR="System76"
|
|
||||||
CONFIG_ONBOARD_VGA_IS_PRIMARY=y
|
|
||||||
# CONFIG_VGA_BIOS is not set
|
|
||||||
CONFIG_CBFS_SIZE=0xA00000
|
|
||||||
CONFIG_DEVICETREE="devicetree.cb"
|
|
||||||
CONFIG_VGA_BIOS_FILE="pci8086,9bc4.rom"
|
|
||||||
CONFIG_C_ENV_BOOTBLOCK_SIZE=0xC000
|
|
||||||
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="System76"
|
|
||||||
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
|
|
||||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xe00
|
|
||||||
# CONFIG_POST_IO is not set
|
|
||||||
CONFIG_OVERRIDE_DEVICETREE=""
|
|
||||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
|
||||||
CONFIG_UART_FOR_CONSOLE=2
|
|
||||||
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
|
|
||||||
# CONFIG_VBOOT is not set
|
|
||||||
CONFIG_DCACHE_RAM_BASE=0xfef00000
|
|
||||||
CONFIG_DCACHE_RAM_SIZE=0x40000
|
|
||||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x20400
|
|
||||||
CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
|
|
||||||
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
|
|
||||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
|
||||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
|
||||||
# CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS is not set
|
|
||||||
CONFIG_TPM_INIT=y
|
|
||||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
|
||||||
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
||||||
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
||||||
# CONFIG_CONSOLE_SERIAL is not set
|
CONFIG_PAYLOAD_ELF=y
|
||||||
CONFIG_TPM_PIRQ=0x0
|
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
||||||
CONFIG_PCIEXP_HOTPLUG_BUSES=32
|
|
||||||
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
|
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
|
||||||
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
|
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
|
||||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Adder WS"
|
CONFIG_POST_IO=n
|
||||||
CONFIG_HAVE_IFD_BIN=y
|
|
||||||
CONFIG_ADD_FSP_BINARIES=y
|
|
||||||
CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
|
|
||||||
CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
|
|
||||||
CONFIG_FSP_S_CBFS="fsps.bin"
|
|
||||||
CONFIG_FSP_M_CBFS="fspm.bin"
|
|
||||||
CONFIG_PS2K_EISAID="PNP0303"
|
|
||||||
CONFIG_PS2M_EISAID="PNP0F13"
|
|
||||||
CONFIG_PCIEXP_L1_SUB_STATE=y
|
|
||||||
CONFIG_PCIEXP_CLK_PM=y
|
|
||||||
CONFIG_CONSOLE_POST=y
|
|
||||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
|
||||||
CONFIG_HEAP_SIZE=0x8000
|
|
||||||
# CONFIG_POST_DEVICE is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_ADDW1 is not set
|
|
||||||
CONFIG_BOARD_SYSTEM76_ADDW2=y
|
|
||||||
# CONFIG_BOARD_SYSTEM76_BONW14 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP4 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_DARP6 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_15 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_17 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_15 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_17 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE15 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP2 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP3 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP3_B is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_LEMP9 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_ORYP5 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_ORYP6 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_THELIO_B1 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP3_C is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_DARP5 is not set
|
|
||||||
CONFIG_FSP_HEADER_PATH="3rdparty/fsp/CometLakeFspBinPkg/CometLake1/Include/"
|
|
||||||
CONFIG_FSP_FD_PATH="3rdparty/fsp/CometLakeFspBinPkg/CometLake1/FSP.fd"
|
|
||||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x1558
|
|
||||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x65e1
|
|
||||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
|
||||||
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
|
||||||
CONFIG_COREBOOT_ROMSIZE_KB=16384
|
|
||||||
CONFIG_ROM_SIZE=0x01000000
|
|
||||||
CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
|
|
||||||
CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
|
|
||||||
CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
|
|
||||||
# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
|
|
||||||
CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
|
|
||||||
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
|
|
||||||
CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
|
|
||||||
CONFIG_SYSTEM_TYPE_LAPTOP=y
|
|
||||||
# CONFIG_SYSTEM_TYPE_TABLET is not set
|
|
||||||
# CONFIG_SYSTEM_TYPE_DETACHABLE is not set
|
|
||||||
# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set
|
|
||||||
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Chipset
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# SoC
|
|
||||||
#
|
|
||||||
CONFIG_CPU_SPECIFIC_OPTIONS=y
|
|
||||||
CONFIG_X86_RESET_VECTOR=0xfffffff0
|
|
||||||
CONFIG_ROMSTAGE_ADDR=0x2000000
|
|
||||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
|
||||||
CONFIG_RAMBASE=0xe00000
|
|
||||||
CONFIG_CPU_ADDR_BITS=36
|
|
||||||
# CONFIG_CHECK_REV_IN_OPROM_NAME is not set
|
|
||||||
CONFIG_CONSOLE_UART_BASE_ADDRESS=0xfe032000
|
|
||||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
|
||||||
CONFIG_SMM_RESERVED_SIZE=0x200000
|
|
||||||
CONFIG_SMM_MODULE_STACK_SIZE=0x800
|
|
||||||
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
|
|
||||||
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=216
|
|
||||||
CONFIG_FSP_TEMP_RAM_SIZE=0x10000
|
|
||||||
# CONFIG_SOC_CAVIUM_CN81XX is not set
|
|
||||||
CONFIG_ARCH_ARMV8_EXTENSION=0
|
|
||||||
CONFIG_STACK_SIZE=0x1000
|
|
||||||
# CONFIG_SOC_CAVIUM_COMMON is not set
|
|
||||||
# CONFIG_SOC_INTEL_GLK is not set
|
|
||||||
CONFIG_PCR_BASE_ADDRESS=0xfd000000
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
|
|
||||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
|
||||||
# CONFIG_NHLT_DMIC_1CH_16B is not set
|
|
||||||
# CONFIG_NHLT_DMIC_2CH_16B is not set
|
|
||||||
# CONFIG_NHLT_DMIC_4CH_16B is not set
|
|
||||||
# CONFIG_NHLT_MAX98357 is not set
|
|
||||||
# CONFIG_NHLT_DA7219 is not set
|
|
||||||
CONFIG_IFD_CHIPSET="cnl"
|
|
||||||
CONFIG_CPU_BCLK_MHZ=100
|
|
||||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
|
|
||||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=3
|
|
||||||
CONFIG_SOC_INTEL_I2C_DEV_MAX=4
|
|
||||||
CONFIG_PCIEXP_ASPM=y
|
|
||||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
|
||||||
CONFIG_IED_REGION_SIZE=0x400000
|
|
||||||
CONFIG_SOC_INTEL_CANNONLAKE_BASE=y
|
|
||||||
CONFIG_SOC_INTEL_CANNONLAKE_ALTERNATE_HEADERS=y
|
|
||||||
CONFIG_SOC_INTEL_COMETLAKE=y
|
|
||||||
CONFIG_SOC_INTEL_CANNONLAKE_PCH_H=y
|
|
||||||
# CONFIG_NHLT_MAX98373 is not set
|
|
||||||
CONFIG_MAX_ROOT_PORTS=24
|
|
||||||
CONFIG_MAX_PCIE_CLOCKS=16
|
|
||||||
# CONFIG_MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE is not set
|
|
||||||
CONFIG_USE_CANNONLAKE_CAR_NEM_ENHANCED=y
|
|
||||||
# CONFIG_USE_CANNONLAKE_FSP_CAR is not set
|
|
||||||
CONFIG_SOC_INTEL_CANNONLAKE_DEBUG_CONSENT=0
|
|
||||||
CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
|
|
||||||
CONFIG_UART_PCI_ADDR=0x0
|
|
||||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Intel SoC Common Code
|
|
||||||
#
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
|
|
||||||
# CONFIG_INTEL_CAR_NEM is not set
|
|
||||||
# CONFIG_INTEL_CAR_CQOS is not set
|
|
||||||
CONFIG_INTEL_CAR_NEM_ENHANCED=y
|
|
||||||
# CONFIG_USE_INTEL_FSP_MP_INIT is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_DTT is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
|
|
||||||
CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
|
|
||||||
CONFIG_SOC_INTEL_CONFIGURE_DDI_A_4_LANES=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_IMC is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
|
|
||||||
# CONFIG_PMC_INVALID_READ_AFTER_WRITE is not set
|
|
||||||
CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_MMC_OVERRIDE is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_MAX is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_256MB is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_128MB is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_64MB is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_32MB is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_1MB is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_DISABLED=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
|
|
||||||
# CONFIG_HECI_DISABLE_USING_SMM is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
|
|
||||||
CONFIG_SA_PCIEX_LENGTH=0x10000000
|
|
||||||
# CONFIG_SA_ENABLE_IMR is not set
|
|
||||||
# CONFIG_SA_ENABLE_DPR is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
|
|
||||||
CONFIG_USE_LEGACY_8254_TIMER=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
|
|
||||||
CONFIG_INTEL_LPSS_UART_FOR_CONSOLE=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Intel SoC Common PCH Code
|
|
||||||
#
|
|
||||||
CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
|
|
||||||
CONFIG_PCH_SPECIFIC_OPTIONS=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Intel SoC Common coreboot stages
|
|
||||||
#
|
|
||||||
CONFIG_SOC_INTEL_COMMON_RESET=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
|
|
||||||
# CONFIG_ACPI_CONSOLE is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_ACPI is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_NHLT=y
|
|
||||||
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
|
|
||||||
# CONFIG_SOC_MEDIATEK_MT8173 is not set
|
|
||||||
# CONFIG_SOC_MEDIATEK_MT8183 is not set
|
|
||||||
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
|
|
||||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
|
||||||
# CONFIG_SOC_QUALCOMM_COMMON is not set
|
|
||||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
|
||||||
# CONFIG_SOC_QC_IPQ806X is not set
|
|
||||||
# CONFIG_SOC_QUALCOMM_QCS405 is not set
|
|
||||||
# CONFIG_SOC_QUALCOMM_SC7180 is not set
|
|
||||||
# CONFIG_SOC_QUALCOMM_SDM845 is not set
|
|
||||||
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
|
|
||||||
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
|
|
||||||
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
|
|
||||||
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
|
|
||||||
# CONFIG_SOC_UCB_RISCV is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# CPU
|
|
||||||
#
|
|
||||||
# CONFIG_CPU_AMD_AGESA is not set
|
|
||||||
# CONFIG_CPU_AMD_PI is not set
|
|
||||||
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
|
|
||||||
CONFIG_SSE2=y
|
|
||||||
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
|
|
||||||
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
|
|
||||||
CONFIG_CPU_INTEL_COMMON=y
|
|
||||||
CONFIG_ENABLE_VMX=y
|
|
||||||
CONFIG_SET_IA32_FC_LOCK_BIT=y
|
|
||||||
CONFIG_CPU_INTEL_COMMON_SMM=y
|
|
||||||
CONFIG_MICROCODE_UPDATE_PRE_RAM=y
|
|
||||||
# CONFIG_CPU_TI_AM335X is not set
|
|
||||||
# CONFIG_PARALLEL_CPU_INIT is not set
|
|
||||||
CONFIG_PARALLEL_MP=y
|
|
||||||
CONFIG_PARALLEL_MP_AP_WORK=y
|
|
||||||
# CONFIG_UDELAY_LAPIC is not set
|
|
||||||
CONFIG_UDELAY_TSC=y
|
|
||||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
|
||||||
# CONFIG_TSC_SYNC_LFENCE is not set
|
|
||||||
# CONFIG_TSC_SYNC_MFENCE is not set
|
|
||||||
CONFIG_LOGICAL_CPUS=y
|
|
||||||
CONFIG_HAVE_SMI_HANDLER=y
|
|
||||||
# CONFIG_NO_SMM is not set
|
|
||||||
# CONFIG_SMM_ASEG is not set
|
|
||||||
CONFIG_SMM_TSEG=y
|
|
||||||
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
|
|
||||||
CONFIG_SMM_STUB_STACK_SIZE=0x400
|
|
||||||
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
|
|
||||||
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
|
|
||||||
# CONFIG_X86_AMD_FIXED_MTRRS is not set
|
|
||||||
# CONFIG_X86_AMD_INIT_SIPI is not set
|
|
||||||
# CONFIG_SOC_SETS_MSRS is not set
|
|
||||||
CONFIG_SMP=y
|
|
||||||
CONFIG_SSE=y
|
|
||||||
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
|
||||||
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
|
|
||||||
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
|
|
||||||
# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
|
|
||||||
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
|
|
||||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
|
||||||
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
|
||||||
CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
|
|
||||||
|
|
||||||
#
|
|
||||||
# Northbridge
|
|
||||||
#
|
|
||||||
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
|
|
||||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
|
||||||
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
|
|
||||||
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
|
|
||||||
|
|
||||||
#
|
|
||||||
# Southbridge
|
|
||||||
#
|
|
||||||
# CONFIG_AMD_SB_CIMX is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
|
|
||||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7 is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9 is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_SILVERMONT is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
|
|
||||||
# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG is not set
|
|
||||||
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
|
|
||||||
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
|
|
||||||
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Super I/O
|
|
||||||
#
|
|
||||||
# CONFIG_SUPERIO_ASPEED_AST2400 is not set
|
|
||||||
# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
|
|
||||||
# CONFIG_SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND is not set
|
|
||||||
# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Embedded Controllers
|
|
||||||
#
|
|
||||||
# CONFIG_EC_51NB_NPCE985LA0DX is not set
|
|
||||||
# CONFIG_EC_GOOGLE_CHROMEEC_SKUID is not set
|
|
||||||
# CONFIG_EC_GOOGLE_WILCO is not set
|
|
||||||
CONFIG_EC_SYSTEM76_EC=y
|
|
||||||
CONFIG_EC_SYSTEM76_EC_BAT_THRESHOLDS=y
|
|
||||||
CONFIG_EC_SYSTEM76_EC_COLOR_KEYBOARD=y
|
|
||||||
CONFIG_EC_SYSTEM76_EC_DGPU=y
|
|
||||||
CONFIG_EC_SYSTEM76_EC_OLED=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Intel Firmware
|
|
||||||
#
|
|
||||||
CONFIG_HAVE_ME_BIN=y
|
|
||||||
# CONFIG_MAINBOARD_USES_IFD_GBE_REGION is not set
|
|
||||||
# CONFIG_MAINBOARD_USES_IFD_EC_REGION is not set
|
|
||||||
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
|
|
||||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
|
||||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
|
||||||
# CONFIG_CAVIUM_BDK is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
|
|
||||||
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
|
|
||||||
# CONFIG_UEFI_2_4_BINDING is not set
|
|
||||||
# CONFIG_UDK_2015_BINDING is not set
|
|
||||||
CONFIG_UDK_2017_BINDING=y
|
|
||||||
# CONFIG_UDK_202005_BINDING is not set
|
|
||||||
CONFIG_UDK_2013_VERSION=2013
|
|
||||||
CONFIG_UDK_2015_VERSION=2015
|
|
||||||
CONFIG_UDK_2017_VERSION=2017
|
|
||||||
CONFIG_UDK_202005_VERSION=202005
|
|
||||||
CONFIG_UDK_VERSION=2017
|
|
||||||
# CONFIG_USE_SIEMENS_HWILIB is not set
|
|
||||||
# CONFIG_ARM_LPAE is not set
|
|
||||||
CONFIG_ARCH_X86=y
|
|
||||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
|
||||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
|
||||||
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
|
||||||
CONFIG_ARCH_POSTCAR_X86_32=y
|
|
||||||
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
|
||||||
# CONFIG_ARCH_POSTCAR_X86_64 is not set
|
|
||||||
# CONFIG_USE_MARCH_586 is not set
|
|
||||||
# CONFIG_AP_IN_SIPI_WAIT is not set
|
|
||||||
# CONFIG_SIPI_VECTOR_IN_ROM is not set
|
|
||||||
CONFIG_RAMTOP=0x1000000
|
|
||||||
CONFIG_NUM_IPI_STARTS=2
|
|
||||||
CONFIG_PC80_SYSTEM=y
|
|
||||||
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
|
|
||||||
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
|
|
||||||
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
|
|
||||||
# CONFIG_HPET_ADDRESS_OVERRIDE is not set
|
|
||||||
CONFIG_HPET_ADDRESS=0xfed00000
|
|
||||||
CONFIG_ID_SECTION_OFFSET=0x80
|
|
||||||
CONFIG_POSTCAR_STAGE=y
|
|
||||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
|
||||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
|
||||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
|
||||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
|
||||||
# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
|
|
||||||
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
|
||||||
# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
|
|
||||||
CONFIG_IDT_IN_EVERY_STAGE=y
|
|
||||||
CONFIG_HAVE_CF9_RESET=y
|
|
||||||
# CONFIG_PIRQ_ROUTE is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Devices
|
|
||||||
#
|
|
||||||
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
|
||||||
CONFIG_HAVE_FSP_GOP=y
|
|
||||||
# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
|
|
||||||
# CONFIG_VGA_ROM_RUN is not set
|
|
||||||
CONFIG_RUN_FSP_GOP=y
|
CONFIG_RUN_FSP_GOP=y
|
||||||
# CONFIG_NO_GFX_INIT is not set
|
|
||||||
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Display
|
|
||||||
#
|
|
||||||
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
|
|
||||||
CONFIG_LINEAR_FRAMEBUFFER=y
|
|
||||||
# CONFIG_BOOTSPLASH is not set
|
|
||||||
CONFIG_PCI=y
|
|
||||||
# CONFIG_NO_MMCONF_SUPPORT is not set
|
|
||||||
CONFIG_MMCONF_SUPPORT=y
|
|
||||||
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
|
|
||||||
CONFIG_HT_CHAIN_UNITID_BASE=0
|
|
||||||
CONFIG_HT_CHAIN_END_UNITID_BASE=0
|
|
||||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
|
||||||
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
|
||||||
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
|
|
||||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
|
||||||
CONFIG_PCIEXP_HOTPLUG=y
|
|
||||||
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
|
|
||||||
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
|
|
||||||
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
|
|
||||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
|
||||||
CONFIG_INTEL_GMA_HAVE_VBT=y
|
|
||||||
CONFIG_INTEL_GMA_ADD_VBT=y
|
|
||||||
# CONFIG_SOFTWARE_I2C is not set
|
|
||||||
# CONFIG_RESOURCE_ALLOCATOR_V3 is not set
|
|
||||||
CONFIG_RESOURCE_ALLOCATOR_V4=y
|
|
||||||
# CONFIG_XHCI_UTILS is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Generic Drivers
|
|
||||||
#
|
|
||||||
# CONFIG_DRIVERS_AS3722_RTC is not set
|
|
||||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
|
||||||
# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
|
|
||||||
# CONFIG_ELOG is not set
|
|
||||||
# CONFIG_GIC is not set
|
|
||||||
# CONFIG_IPMI_KCS is not set
|
|
||||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
|
||||||
CONFIG_CACHE_MRC_SETTINGS=y
|
|
||||||
CONFIG_MRC_SETTINGS_PROTECT=y
|
|
||||||
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
|
|
||||||
# CONFIG_MRC_SETTINGS_VARIABLE_DATA is not set
|
|
||||||
# CONFIG_MRC_WRITE_NV_LATE is not set
|
|
||||||
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
|
|
||||||
# CONFIG_RT8168_SUPPORT_LEGACY_VPD_MAC is not set
|
|
||||||
# CONFIG_RT8168_SET_LED_MODE is not set
|
|
||||||
CONFIG_SMMSTORE=y
|
CONFIG_SMMSTORE=y
|
||||||
# CONFIG_SMMSTORE_IN_CBFS is not set
|
CONFIG_SMMSTORE_V2=y
|
||||||
CONFIG_SMMSTORE_REGION="SMMSTORE"
|
CONFIG_USE_OPTION_TABLE=y
|
||||||
CONFIG_SMMSTORE_FILENAME="smm_store"
|
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
||||||
CONFIG_SMMSTORE_SIZE=0x40000
|
#CONFIG_CONSOLE_SYSTEM76_EC=y
|
||||||
CONFIG_SPI_FLASH=y
|
|
||||||
# CONFIG_SPI_SDCARD is not set
|
|
||||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
|
||||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
|
|
||||||
CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
|
|
||||||
CONFIG_SPI_FLASH_SMM=y
|
|
||||||
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
|
||||||
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
|
|
||||||
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
|
|
||||||
CONFIG_DRIVERS_UART=y
|
|
||||||
CONFIG_NO_UART_ON_SUPERIO=y
|
|
||||||
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
|
|
||||||
# CONFIG_UART_OVERRIDE_REFCLK is not set
|
|
||||||
CONFIG_DRIVERS_UART_8250MEM=y
|
|
||||||
CONFIG_DRIVERS_UART_8250MEM_32=y
|
|
||||||
# CONFIG_HAVE_UART_SPECIAL is not set
|
|
||||||
# CONFIG_DRIVERS_UART_PL011 is not set
|
|
||||||
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
|
|
||||||
# CONFIG_HAVE_USBDEBUG is not set
|
|
||||||
# CONFIG_HAVE_USBDEBUG_OPTIONS is not set
|
|
||||||
# CONFIG_VPD is not set
|
|
||||||
CONFIG_DRIVERS_GENERIC_WIFI=y
|
|
||||||
# CONFIG_USE_SAR is not set
|
|
||||||
# CONFIG_DRIVERS_AMD_PI is not set
|
|
||||||
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
|
||||||
# CONFIG_DRIVERS_GFX_GENERIC is not set
|
|
||||||
CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
|
||||||
# CONFIG_DRIVERS_I2C_DESIGNWARE_DEBUG is not set
|
|
||||||
CONFIG_DRIVERS_I2C_GENERIC=y
|
|
||||||
CONFIG_DRIVERS_I2C_HID=y
|
|
||||||
# CONFIG_DRIVERS_I2C_MAX98373 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_MAX98390 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_MAX98927 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_PCA9538 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_PCF8523 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_PTN3460 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_RT1011 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_RT5663 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_RTD2132 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_RX6110SA is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_SX9310 is not set
|
|
||||||
CONFIG_DRIVERS_I2C_TAS5825M=y
|
|
||||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
|
|
||||||
# CONFIG_DRIVERS_INTEL_DPTF is not set
|
|
||||||
CONFIG_FSP_USE_REPO=y
|
|
||||||
# CONFIG_DISPLAY_HOBS is not set
|
|
||||||
# CONFIG_DISPLAY_UPD_DATA is not set
|
|
||||||
CONFIG_PLATFORM_USES_FSP2_0=y
|
|
||||||
# CONFIG_PLATFORM_USES_FSP2_1 is not set
|
|
||||||
# CONFIG_PLATFORM_USES_FSP2_2 is not set
|
|
||||||
CONFIG_HAVE_INTEL_FSP_REPO=y
|
|
||||||
# CONFIG_FSP_CAR is not set
|
|
||||||
CONFIG_FSP_M_XIP=y
|
|
||||||
# CONFIG_FSP_T_XIP is not set
|
|
||||||
CONFIG_FSP_USES_CB_STACK=y
|
|
||||||
CONFIG_HAVE_FSP_LOGO_SUPPORT=y
|
|
||||||
# CONFIG_FSP2_0_DISPLAY_LOGO is not set
|
|
||||||
CONFIG_FSP_COMPRESS_FSP_S_LZMA=y
|
|
||||||
# CONFIG_INTEL_DDI is not set
|
|
||||||
# CONFIG_INTEL_EDID is not set
|
|
||||||
# CONFIG_INTEL_INT15 is not set
|
|
||||||
CONFIG_INTEL_GMA_ACPI=y
|
|
||||||
CONFIG_INTEL_GMA_BCLV_WIDTH=16
|
|
||||||
CONFIG_INTEL_GMA_BCLM_WIDTH=16
|
|
||||||
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
|
|
||||||
# CONFIG_INTEL_GMA_SWSMISCI is not set
|
|
||||||
# CONFIG_DRIVER_INTEL_I210 is not set
|
|
||||||
# CONFIG_DRIVERS_INTEL_ISH is not set
|
|
||||||
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
|
|
||||||
# CONFIG_DRIVERS_INTEL_PMC is not set
|
|
||||||
# CONFIG_HAVE_INTEL_PTT is not set
|
|
||||||
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
|
|
||||||
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
|
|
||||||
CONFIG_FRU_DEVICE_ID=0
|
|
||||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
|
||||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
|
||||||
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
|
||||||
CONFIG_DRIVERS_MC146818=y
|
|
||||||
CONFIG_MAINBOARD_HAS_LPC_TPM=y
|
|
||||||
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
|
||||||
# CONFIG_DRIVERS_RICOH_RCE822 is not set
|
|
||||||
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
|
|
||||||
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
|
|
||||||
# CONFIG_DRIVERS_SIL_3114 is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_SPI_TPM is not set
|
|
||||||
CONFIG_DRIVERS_SYSTEM76_DGPU=y
|
|
||||||
# CONFIG_DRIVER_TI_TPS65090 is not set
|
|
||||||
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
|
|
||||||
# CONFIG_DRIVERS_USB_ACPI is not set
|
|
||||||
# CONFIG_DRIVERS_USB_PCI_XHCI is not set
|
|
||||||
# CONFIG_COMMONLIB_STORAGE is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Security
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# Verified Boot (vboot)
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# Trusted Platform Module
|
|
||||||
#
|
|
||||||
CONFIG_TPM2=y
|
|
||||||
CONFIG_MAINBOARD_HAS_TPM2=y
|
|
||||||
# CONFIG_DEBUG_TPM is not set
|
|
||||||
CONFIG_TPM_RDRESP_NEED_DELAY=y
|
|
||||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Memory initialization
|
|
||||||
#
|
|
||||||
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
|
|
||||||
# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
|
|
||||||
# CONFIG_INTEL_TXT is not set
|
|
||||||
# CONFIG_STM is not set
|
|
||||||
CONFIG_BOOTMEDIA_LOCK_NONE=y
|
|
||||||
# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
|
|
||||||
# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
|
|
||||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
|
||||||
CONFIG_ACPI_HAVE_PCAT_8259=y
|
|
||||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
|
||||||
CONFIG_HAVE_ACPI_TABLES=y
|
|
||||||
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
|
|
||||||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|
||||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
|
||||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
|
||||||
CONFIG_RTC=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Console
|
|
||||||
#
|
|
||||||
CONFIG_BOOTBLOCK_CONSOLE=y
|
|
||||||
CONFIG_POSTCAR_CONSOLE=y
|
|
||||||
CONFIG_SQUELCH_EARLY_SMP=y
|
|
||||||
CONFIG_FIXED_UART_FOR_CONSOLE=y
|
|
||||||
# CONFIG_SPKMODEM is not set
|
|
||||||
# CONFIG_CONSOLE_NE2K is not set
|
|
||||||
CONFIG_CONSOLE_CBMEM=y
|
|
||||||
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
|
|
||||||
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
|
|
||||||
# CONFIG_CONSOLE_SPI_FLASH is not set
|
|
||||||
# CONFIG_CONSOLE_SYSTEM76_EC is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
|
|
||||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
|
||||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
|
|
||||||
# CONFIG_CMOS_POST is not set
|
|
||||||
# CONFIG_DEFAULT_POST_ON_LPC is not set
|
|
||||||
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
|
|
||||||
CONFIG_HWBASE_DEBUG_CB=y
|
|
||||||
CONFIG_HAVE_ACPI_RESUME=y
|
|
||||||
# CONFIG_DISABLE_ACPI_HIBERNATE is not set
|
|
||||||
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
|
||||||
# CONFIG_NO_MONOTONIC_TIMER is not set
|
|
||||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
|
||||||
# CONFIG_TIMER_QUEUE is not set
|
|
||||||
# CONFIG_HAVE_OPTION_TABLE is not set
|
|
||||||
# CONFIG_PCI_IO_CFG_EXT is not set
|
|
||||||
CONFIG_IOAPIC=y
|
|
||||||
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
|
|
||||||
# CONFIG_GFXUMA is not set
|
|
||||||
CONFIG_ACPI_NHLT=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# System tables
|
|
||||||
#
|
|
||||||
# CONFIG_GENERATE_MP_TABLE is not set
|
|
||||||
# CONFIG_GENERATE_PIRQ_TABLE is not set
|
|
||||||
CONFIG_GENERATE_SMBIOS_TABLES=y
|
|
||||||
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
|
|
||||||
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
|
|
||||||
|
|
||||||
#
|
|
||||||
# Payload
|
|
||||||
#
|
|
||||||
# CONFIG_PAYLOAD_NONE is not set
|
|
||||||
CONFIG_PAYLOAD_ELF=y
|
|
||||||
# CONFIG_PAYLOAD_FILO is not set
|
|
||||||
# CONFIG_PAYLOAD_GRUB2 is not set
|
|
||||||
# CONFIG_PAYLOAD_LINUXBOOT is not set
|
|
||||||
# CONFIG_PAYLOAD_SEABIOS is not set
|
|
||||||
# CONFIG_PAYLOAD_UBOOT is not set
|
|
||||||
# CONFIG_PAYLOAD_YABITS is not set
|
|
||||||
# CONFIG_PAYLOAD_LINUX is not set
|
|
||||||
# CONFIG_PAYLOAD_TIANOCORE is not set
|
|
||||||
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
|
||||||
CONFIG_PAYLOAD_OPTIONS=""
|
|
||||||
# CONFIG_PXE is not set
|
|
||||||
# CONFIG_COMPRESSED_PAYLOAD_NONE is not set
|
|
||||||
CONFIG_COMPRESSED_PAYLOAD_LZMA=y
|
|
||||||
# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set
|
|
||||||
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
|
|
||||||
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Secondary Payloads
|
|
||||||
#
|
|
||||||
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
|
|
||||||
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
|
|
||||||
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Debugging
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# CPU Debug Settings
|
|
||||||
#
|
|
||||||
CONFIG_HAVE_DISPLAY_MTRRS=y
|
|
||||||
# CONFIG_DISPLAY_MTRRS is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# BLOB Debug Settings
|
|
||||||
#
|
|
||||||
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
|
|
||||||
# CONFIG_DISPLAY_FSP_HEADER is not set
|
|
||||||
# CONFIG_VERIFY_HOBS is not set
|
|
||||||
CONFIG_DISPLAY_FSP_VERSION_INFO=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# General Debug Settings
|
|
||||||
#
|
|
||||||
# CONFIG_GDB_STUB is not set
|
|
||||||
# CONFIG_FATAL_ASSERTS is not set
|
|
||||||
CONFIG_HAVE_DEBUG_GPIO=y
|
|
||||||
# CONFIG_DEBUG_GPIO is not set
|
|
||||||
# CONFIG_DEBUG_CBFS is not set
|
|
||||||
# CONFIG_HAVE_DEBUG_RAM_SETUP is not set
|
|
||||||
CONFIG_HAVE_DEBUG_SMBUS=y
|
|
||||||
# CONFIG_DEBUG_SMBUS is not set
|
|
||||||
# CONFIG_DEBUG_SMI is not set
|
|
||||||
# CONFIG_DEBUG_MALLOC is not set
|
|
||||||
# CONFIG_DEBUG_CONSOLE_INIT is not set
|
|
||||||
# CONFIG_DEBUG_SPI_FLASH is not set
|
|
||||||
# CONFIG_TRACE is not set
|
|
||||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
|
||||||
# CONFIG_DEBUG_ADA_CODE is not set
|
|
||||||
CONFIG_HAVE_EM100_SUPPORT=y
|
|
||||||
# CONFIG_EM100 is not set
|
|
||||||
CONFIG_NO_EDID_FILL_FB=y
|
|
||||||
CONFIG_SPD_READ_BY_WORD=y
|
|
||||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
|
||||||
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
|
|
||||||
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
|
|
||||||
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
|
|
||||||
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
|
|
||||||
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
|
|
||||||
CONFIG_REG_SCRIPT=y
|
|
||||||
CONFIG_MAX_REBOOT_CNT=3
|
|
||||||
# CONFIG_NO_XIP_EARLY_STAGES is not set
|
|
||||||
# CONFIG_EARLY_CBMEM_LIST is not set
|
|
||||||
CONFIG_RELOCATABLE_MODULES=y
|
|
||||||
CONFIG_GENERIC_GPIO_LIB=y
|
|
||||||
CONFIG_HAVE_BOOTBLOCK=y
|
|
||||||
CONFIG_HAVE_ROMSTAGE=y
|
|
||||||
CONFIG_HAVE_RAMSTAGE=y
|
|
||||||
|
9
models/addw2/edk2.config
Normal file
9
models/addw2/edk2.config
Normal file
@@ -0,0 +1,9 @@
|
|||||||
|
BOOTLOADER=COREBOOT
|
||||||
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
|
SHELL_TYPE=NONE
|
||||||
|
TPM_ENABLE=TRUE
|
||||||
|
#SYSTEM76_EC_LOGGING=TRUE
|
BIN
models/addw2/fd.rom
(Stored with Git LFS)
BIN
models/addw2/fd.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/addw2/me.rom
(Stored with Git LFS)
BIN
models/addw2/me.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/addw2/microcode.rom
(Stored with Git LFS)
BIN
models/addw2/microcode.rom
(Stored with Git LFS)
Binary file not shown.
@@ -9,4 +9,4 @@
|
|||||||
- HAP: false
|
- HAP: false
|
||||||
- [ME](./me.rom)
|
- [ME](./me.rom)
|
||||||
- Size: 4092 KB
|
- Size: 4092 KB
|
||||||
- Version: 14.0.30.1114
|
- Version: 14.0.60.1807
|
||||||
|
@@ -1,836 +1,20 @@
|
|||||||
#
|
|
||||||
# Automatically generated file; DO NOT EDIT.
|
|
||||||
# coreboot configuration
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# General setup
|
|
||||||
#
|
|
||||||
CONFIG_COREBOOT_BUILD=y
|
|
||||||
CONFIG_LOCALVERSION=""
|
|
||||||
CONFIG_CBFS_PREFIX="fallback"
|
|
||||||
CONFIG_COMPILER_GCC=y
|
|
||||||
# CONFIG_COMPILER_LLVM_CLANG is not set
|
|
||||||
# CONFIG_ANY_TOOLCHAIN is not set
|
|
||||||
CONFIG_CCACHE=y
|
|
||||||
# CONFIG_FMD_GENPARSER is not set
|
|
||||||
# CONFIG_UTIL_GENPARSER is not set
|
|
||||||
CONFIG_COMPRESS_RAMSTAGE=y
|
|
||||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
|
||||||
CONFIG_COLLECT_TIMESTAMPS=y
|
|
||||||
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
|
|
||||||
CONFIG_USE_BLOBS=y
|
|
||||||
# CONFIG_USE_AMD_BLOBS is not set
|
|
||||||
# CONFIG_USE_QC_BLOBS is not set
|
|
||||||
# CONFIG_COVERAGE is not set
|
|
||||||
# CONFIG_UBSAN is not set
|
|
||||||
# CONFIG_NO_STAGE_CACHE is not set
|
|
||||||
CONFIG_TSEG_STAGE_CACHE=y
|
|
||||||
# CONFIG_UPDATE_IMAGE is not set
|
|
||||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
|
||||||
# CONFIG_FW_CONFIG is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Mainboard
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# Important: Run 'make distclean' before switching boards
|
|
||||||
#
|
|
||||||
# CONFIG_VENDOR_51NB is not set
|
|
||||||
# CONFIG_VENDOR_ADLINK is not set
|
|
||||||
# CONFIG_VENDOR_AMD is not set
|
|
||||||
# CONFIG_VENDOR_AOPEN is not set
|
|
||||||
# CONFIG_VENDOR_APPLE is not set
|
|
||||||
# CONFIG_VENDOR_ASROCK is not set
|
|
||||||
# CONFIG_VENDOR_ASUS is not set
|
|
||||||
# CONFIG_VENDOR_BAP is not set
|
|
||||||
# CONFIG_VENDOR_BIOSTAR is not set
|
|
||||||
# CONFIG_VENDOR_CAVIUM is not set
|
|
||||||
# CONFIG_VENDOR_COMPULAB is not set
|
|
||||||
# CONFIG_VENDOR_DELL is not set
|
|
||||||
# CONFIG_VENDOR_ELMEX is not set
|
|
||||||
# CONFIG_VENDOR_EMULATION is not set
|
|
||||||
# CONFIG_VENDOR_FACEBOOK is not set
|
|
||||||
# CONFIG_VENDOR_FOXCONN is not set
|
|
||||||
# CONFIG_VENDOR_GETAC is not set
|
|
||||||
# CONFIG_VENDOR_GIGABYTE is not set
|
|
||||||
# CONFIG_VENDOR_GIZMOSPHERE is not set
|
|
||||||
# CONFIG_VENDOR_GOOGLE is not set
|
|
||||||
# CONFIG_VENDOR_HP is not set
|
|
||||||
# CONFIG_VENDOR_IBASE is not set
|
|
||||||
# CONFIG_VENDOR_INTEL is not set
|
|
||||||
# CONFIG_VENDOR_JETWAY is not set
|
|
||||||
# CONFIG_VENDOR_KONTRON is not set
|
|
||||||
# CONFIG_VENDOR_LENOVO is not set
|
|
||||||
# CONFIG_VENDOR_LIBRETREND is not set
|
|
||||||
# CONFIG_VENDOR_LIPPERT is not set
|
|
||||||
# CONFIG_VENDOR_MSI is not set
|
|
||||||
# CONFIG_VENDOR_OCP is not set
|
|
||||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
|
||||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
|
||||||
# CONFIG_VENDOR_PCENGINES is not set
|
|
||||||
# CONFIG_VENDOR_PORTWELL is not set
|
|
||||||
# CONFIG_VENDOR_PRODRIVE is not set
|
|
||||||
# CONFIG_VENDOR_PROTECTLI is not set
|
|
||||||
# CONFIG_VENDOR_PURISM is not set
|
|
||||||
# CONFIG_VENDOR_RAZER is not set
|
|
||||||
# CONFIG_VENDOR_RODA is not set
|
|
||||||
# CONFIG_VENDOR_SAMSUNG is not set
|
|
||||||
# CONFIG_VENDOR_SAPPHIRE is not set
|
|
||||||
# CONFIG_VENDOR_SCALEWAY is not set
|
|
||||||
# CONFIG_VENDOR_SIEMENS is not set
|
|
||||||
# CONFIG_VENDOR_SIFIVE is not set
|
|
||||||
# CONFIG_VENDOR_SUPERMICRO is not set
|
|
||||||
CONFIG_VENDOR_SYSTEM76=y
|
CONFIG_VENDOR_SYSTEM76=y
|
||||||
# CONFIG_VENDOR_TI is not set
|
CONFIG_BOARD_SYSTEM76_BONW14=y
|
||||||
# CONFIG_VENDOR_UP is not set
|
CONFIG_CCACHE=y
|
||||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
CONFIG_CONSOLE_SERIAL=n
|
||||||
CONFIG_MAINBOARD_PART_NUMBER="bonw14"
|
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
||||||
CONFIG_MAINBOARD_VERSION="bonw14"
|
CONFIG_HAVE_IFD_BIN=y
|
||||||
CONFIG_MAINBOARD_DIR="system76/bonw14"
|
CONFIG_HAVE_ME_BIN=y
|
||||||
CONFIG_MAX_CPUS=20
|
|
||||||
CONFIG_DIMM_MAX=4
|
|
||||||
CONFIG_DIMM_SPD_SIZE=512
|
|
||||||
CONFIG_FMDFILE=""
|
|
||||||
# CONFIG_NO_POST is not set
|
|
||||||
CONFIG_MAINBOARD_VENDOR="System76"
|
|
||||||
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
|
|
||||||
# CONFIG_VGA_BIOS is not set
|
|
||||||
CONFIG_CBFS_SIZE=0xA00000
|
|
||||||
CONFIG_DEVICETREE="devicetree.cb"
|
|
||||||
CONFIG_C_ENV_BOOTBLOCK_SIZE=0xC000
|
|
||||||
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="System76"
|
|
||||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xe00
|
|
||||||
# CONFIG_POST_IO is not set
|
|
||||||
CONFIG_OVERRIDE_DEVICETREE=""
|
|
||||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
|
||||||
CONFIG_UART_FOR_CONSOLE=2
|
|
||||||
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
|
|
||||||
# CONFIG_VBOOT is not set
|
|
||||||
CONFIG_DCACHE_RAM_BASE=0xfef00000
|
|
||||||
CONFIG_DCACHE_RAM_SIZE=0x40000
|
|
||||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x20400
|
|
||||||
CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
|
|
||||||
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
|
|
||||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
|
||||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
|
||||||
# CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS is not set
|
|
||||||
CONFIG_TPM_INIT=y
|
|
||||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
|
||||||
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
||||||
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
||||||
# CONFIG_CONSOLE_SERIAL is not set
|
CONFIG_NO_GFX_INIT=y
|
||||||
CONFIG_TPM_PIRQ=0x0
|
CONFIG_PAYLOAD_ELF=y
|
||||||
CONFIG_PCIEXP_HOTPLUG_BUSES=32
|
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
||||||
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
|
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
|
||||||
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
|
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
|
||||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Bonobo WS"
|
CONFIG_POST_IO=n
|
||||||
CONFIG_HAVE_IFD_BIN=y
|
|
||||||
CONFIG_ADD_FSP_BINARIES=y
|
|
||||||
CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
|
|
||||||
CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
|
|
||||||
CONFIG_FSP_S_CBFS="fsps.bin"
|
|
||||||
CONFIG_FSP_M_CBFS="fspm.bin"
|
|
||||||
CONFIG_PS2K_EISAID="PNP0303"
|
|
||||||
CONFIG_PS2M_EISAID="PNP0F13"
|
|
||||||
CONFIG_PCIEXP_L1_SUB_STATE=y
|
|
||||||
CONFIG_PCIEXP_CLK_PM=y
|
|
||||||
CONFIG_CONSOLE_POST=y
|
|
||||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
|
||||||
CONFIG_HEAP_SIZE=0x8000
|
|
||||||
# CONFIG_POST_DEVICE is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_ADDW1 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_ADDW2 is not set
|
|
||||||
CONFIG_BOARD_SYSTEM76_BONW14=y
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP4 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_DARP6 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_15 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_17 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_15 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_17 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE15 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP2 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP3 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP3_B is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_LEMP9 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_ORYP5 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_ORYP6 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_THELIO_B1 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP3_C is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_DARP5 is not set
|
|
||||||
CONFIG_FSP_HEADER_PATH="3rdparty/fsp/CometLakeFspBinPkg/CometLakeS/Include/"
|
|
||||||
CONFIG_FSP_FD_PATH="3rdparty/fsp/CometLakeFspBinPkg/CometLakeS/FSP.fd"
|
|
||||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x1558
|
|
||||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x7714
|
|
||||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
|
||||||
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
|
||||||
CONFIG_COREBOOT_ROMSIZE_KB=16384
|
|
||||||
CONFIG_ROM_SIZE=0x01000000
|
|
||||||
CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
|
|
||||||
CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
|
|
||||||
CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
|
|
||||||
# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
|
|
||||||
CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
|
|
||||||
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
|
|
||||||
CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
|
|
||||||
CONFIG_SYSTEM_TYPE_LAPTOP=y
|
|
||||||
# CONFIG_SYSTEM_TYPE_TABLET is not set
|
|
||||||
# CONFIG_SYSTEM_TYPE_DETACHABLE is not set
|
|
||||||
# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set
|
|
||||||
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Chipset
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# SoC
|
|
||||||
#
|
|
||||||
CONFIG_CPU_SPECIFIC_OPTIONS=y
|
|
||||||
CONFIG_X86_RESET_VECTOR=0xfffffff0
|
|
||||||
CONFIG_ROMSTAGE_ADDR=0x2000000
|
|
||||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
|
||||||
CONFIG_RAMBASE=0xe00000
|
|
||||||
CONFIG_CPU_ADDR_BITS=36
|
|
||||||
# CONFIG_CHECK_REV_IN_OPROM_NAME is not set
|
|
||||||
CONFIG_CONSOLE_UART_BASE_ADDRESS=0xfe032000
|
|
||||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
|
||||||
CONFIG_SMM_RESERVED_SIZE=0x200000
|
|
||||||
CONFIG_SMM_MODULE_STACK_SIZE=0x800
|
|
||||||
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
|
|
||||||
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=216
|
|
||||||
CONFIG_FSP_TEMP_RAM_SIZE=0x10000
|
|
||||||
# CONFIG_SOC_CAVIUM_CN81XX is not set
|
|
||||||
CONFIG_ARCH_ARMV8_EXTENSION=0
|
|
||||||
CONFIG_STACK_SIZE=0x1000
|
|
||||||
# CONFIG_SOC_CAVIUM_COMMON is not set
|
|
||||||
# CONFIG_SOC_INTEL_GLK is not set
|
|
||||||
CONFIG_PCR_BASE_ADDRESS=0xfd000000
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
|
|
||||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
|
||||||
# CONFIG_NHLT_DMIC_1CH_16B is not set
|
|
||||||
# CONFIG_NHLT_DMIC_2CH_16B is not set
|
|
||||||
# CONFIG_NHLT_DMIC_4CH_16B is not set
|
|
||||||
# CONFIG_NHLT_MAX98357 is not set
|
|
||||||
# CONFIG_NHLT_DA7219 is not set
|
|
||||||
CONFIG_IFD_CHIPSET="cnl"
|
|
||||||
CONFIG_CPU_BCLK_MHZ=100
|
|
||||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
|
|
||||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=3
|
|
||||||
CONFIG_SOC_INTEL_I2C_DEV_MAX=4
|
|
||||||
CONFIG_PCIEXP_ASPM=y
|
|
||||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
|
||||||
CONFIG_IED_REGION_SIZE=0x400000
|
|
||||||
CONFIG_SOC_INTEL_CANNONLAKE_BASE=y
|
|
||||||
CONFIG_SOC_INTEL_CANNONLAKE_ALTERNATE_HEADERS=y
|
|
||||||
CONFIG_SOC_INTEL_COMETLAKE=y
|
|
||||||
CONFIG_SOC_INTEL_CANNONLAKE_PCH_H=y
|
|
||||||
# CONFIG_NHLT_MAX98373 is not set
|
|
||||||
CONFIG_MAX_ROOT_PORTS=24
|
|
||||||
CONFIG_MAX_PCIE_CLOCKS=16
|
|
||||||
# CONFIG_MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE is not set
|
|
||||||
CONFIG_USE_CANNONLAKE_CAR_NEM_ENHANCED=y
|
|
||||||
# CONFIG_USE_CANNONLAKE_FSP_CAR is not set
|
|
||||||
CONFIG_SOC_INTEL_CANNONLAKE_DEBUG_CONSENT=0
|
|
||||||
CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
|
|
||||||
CONFIG_UART_PCI_ADDR=0x0
|
|
||||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Intel SoC Common Code
|
|
||||||
#
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
|
|
||||||
# CONFIG_INTEL_CAR_NEM is not set
|
|
||||||
# CONFIG_INTEL_CAR_CQOS is not set
|
|
||||||
CONFIG_INTEL_CAR_NEM_ENHANCED=y
|
|
||||||
# CONFIG_USE_INTEL_FSP_MP_INIT is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_DTT is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
|
|
||||||
CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
|
|
||||||
CONFIG_SOC_INTEL_CONFIGURE_DDI_A_4_LANES=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_IMC is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
|
|
||||||
# CONFIG_PMC_INVALID_READ_AFTER_WRITE is not set
|
|
||||||
CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_MMC_OVERRIDE is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_MAX is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_256MB is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_128MB is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_64MB is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_32MB is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_1MB is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_DISABLED=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
|
|
||||||
# CONFIG_HECI_DISABLE_USING_SMM is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
|
|
||||||
CONFIG_SA_PCIEX_LENGTH=0x10000000
|
|
||||||
# CONFIG_SA_ENABLE_IMR is not set
|
|
||||||
# CONFIG_SA_ENABLE_DPR is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
|
|
||||||
CONFIG_USE_LEGACY_8254_TIMER=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
|
|
||||||
CONFIG_INTEL_LPSS_UART_FOR_CONSOLE=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Intel SoC Common PCH Code
|
|
||||||
#
|
|
||||||
CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
|
|
||||||
CONFIG_PCH_SPECIFIC_OPTIONS=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Intel SoC Common coreboot stages
|
|
||||||
#
|
|
||||||
CONFIG_SOC_INTEL_COMMON_RESET=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
|
|
||||||
# CONFIG_ACPI_CONSOLE is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_ACPI is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_NHLT=y
|
|
||||||
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
|
|
||||||
# CONFIG_SOC_MEDIATEK_MT8173 is not set
|
|
||||||
# CONFIG_SOC_MEDIATEK_MT8183 is not set
|
|
||||||
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
|
|
||||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
|
||||||
# CONFIG_SOC_QUALCOMM_COMMON is not set
|
|
||||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
|
||||||
# CONFIG_SOC_QC_IPQ806X is not set
|
|
||||||
# CONFIG_SOC_QUALCOMM_QCS405 is not set
|
|
||||||
# CONFIG_SOC_QUALCOMM_SC7180 is not set
|
|
||||||
# CONFIG_SOC_QUALCOMM_SDM845 is not set
|
|
||||||
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
|
|
||||||
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
|
|
||||||
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
|
|
||||||
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
|
|
||||||
# CONFIG_SOC_UCB_RISCV is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# CPU
|
|
||||||
#
|
|
||||||
# CONFIG_CPU_AMD_AGESA is not set
|
|
||||||
# CONFIG_CPU_AMD_PI is not set
|
|
||||||
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
|
|
||||||
CONFIG_SSE2=y
|
|
||||||
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
|
|
||||||
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
|
|
||||||
CONFIG_CPU_INTEL_COMMON=y
|
|
||||||
CONFIG_ENABLE_VMX=y
|
|
||||||
CONFIG_SET_IA32_FC_LOCK_BIT=y
|
|
||||||
CONFIG_CPU_INTEL_COMMON_SMM=y
|
|
||||||
CONFIG_MICROCODE_UPDATE_PRE_RAM=y
|
|
||||||
# CONFIG_CPU_TI_AM335X is not set
|
|
||||||
# CONFIG_PARALLEL_CPU_INIT is not set
|
|
||||||
CONFIG_PARALLEL_MP=y
|
|
||||||
CONFIG_PARALLEL_MP_AP_WORK=y
|
|
||||||
# CONFIG_UDELAY_LAPIC is not set
|
|
||||||
CONFIG_UDELAY_TSC=y
|
|
||||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
|
||||||
# CONFIG_TSC_SYNC_LFENCE is not set
|
|
||||||
# CONFIG_TSC_SYNC_MFENCE is not set
|
|
||||||
CONFIG_LOGICAL_CPUS=y
|
|
||||||
CONFIG_HAVE_SMI_HANDLER=y
|
|
||||||
# CONFIG_NO_SMM is not set
|
|
||||||
# CONFIG_SMM_ASEG is not set
|
|
||||||
CONFIG_SMM_TSEG=y
|
|
||||||
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
|
|
||||||
CONFIG_SMM_STUB_STACK_SIZE=0x400
|
|
||||||
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
|
|
||||||
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
|
|
||||||
# CONFIG_X86_AMD_FIXED_MTRRS is not set
|
|
||||||
# CONFIG_X86_AMD_INIT_SIPI is not set
|
|
||||||
# CONFIG_SOC_SETS_MSRS is not set
|
|
||||||
CONFIG_SMP=y
|
|
||||||
CONFIG_SSE=y
|
|
||||||
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
|
||||||
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
|
|
||||||
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
|
|
||||||
# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
|
|
||||||
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
|
|
||||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
|
||||||
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
|
||||||
CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
|
|
||||||
|
|
||||||
#
|
|
||||||
# Northbridge
|
|
||||||
#
|
|
||||||
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
|
|
||||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
|
||||||
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
|
|
||||||
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
|
|
||||||
|
|
||||||
#
|
|
||||||
# Southbridge
|
|
||||||
#
|
|
||||||
# CONFIG_AMD_SB_CIMX is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
|
|
||||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7 is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9 is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_SILVERMONT is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
|
|
||||||
# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG is not set
|
|
||||||
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
|
|
||||||
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
|
|
||||||
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Super I/O
|
|
||||||
#
|
|
||||||
# CONFIG_SUPERIO_ASPEED_AST2400 is not set
|
|
||||||
# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
|
|
||||||
# CONFIG_SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND is not set
|
|
||||||
# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Embedded Controllers
|
|
||||||
#
|
|
||||||
# CONFIG_EC_51NB_NPCE985LA0DX is not set
|
|
||||||
# CONFIG_EC_GOOGLE_CHROMEEC_SKUID is not set
|
|
||||||
# CONFIG_EC_GOOGLE_WILCO is not set
|
|
||||||
CONFIG_EC_SYSTEM76_EC=y
|
|
||||||
CONFIG_EC_SYSTEM76_EC_BAT_THRESHOLDS=y
|
|
||||||
CONFIG_EC_SYSTEM76_EC_COLOR_KEYBOARD=y
|
|
||||||
CONFIG_EC_SYSTEM76_EC_DGPU=y
|
|
||||||
# CONFIG_EC_SYSTEM76_EC_OLED is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Intel Firmware
|
|
||||||
#
|
|
||||||
CONFIG_HAVE_ME_BIN=y
|
|
||||||
# CONFIG_MAINBOARD_USES_IFD_GBE_REGION is not set
|
|
||||||
# CONFIG_MAINBOARD_USES_IFD_EC_REGION is not set
|
|
||||||
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
|
|
||||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
|
||||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
|
||||||
# CONFIG_CAVIUM_BDK is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
|
|
||||||
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
|
|
||||||
# CONFIG_UEFI_2_4_BINDING is not set
|
|
||||||
# CONFIG_UDK_2015_BINDING is not set
|
|
||||||
CONFIG_UDK_2017_BINDING=y
|
|
||||||
# CONFIG_UDK_202005_BINDING is not set
|
|
||||||
CONFIG_UDK_2013_VERSION=2013
|
|
||||||
CONFIG_UDK_2015_VERSION=2015
|
|
||||||
CONFIG_UDK_2017_VERSION=2017
|
|
||||||
CONFIG_UDK_202005_VERSION=202005
|
|
||||||
CONFIG_UDK_VERSION=2017
|
|
||||||
# CONFIG_USE_SIEMENS_HWILIB is not set
|
|
||||||
# CONFIG_ARM_LPAE is not set
|
|
||||||
CONFIG_ARCH_X86=y
|
|
||||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
|
||||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
|
||||||
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
|
||||||
CONFIG_ARCH_POSTCAR_X86_32=y
|
|
||||||
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
|
||||||
# CONFIG_ARCH_POSTCAR_X86_64 is not set
|
|
||||||
# CONFIG_USE_MARCH_586 is not set
|
|
||||||
# CONFIG_AP_IN_SIPI_WAIT is not set
|
|
||||||
# CONFIG_SIPI_VECTOR_IN_ROM is not set
|
|
||||||
CONFIG_RAMTOP=0x1000000
|
|
||||||
CONFIG_NUM_IPI_STARTS=2
|
|
||||||
CONFIG_PC80_SYSTEM=y
|
|
||||||
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
|
|
||||||
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
|
|
||||||
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
|
|
||||||
# CONFIG_HPET_ADDRESS_OVERRIDE is not set
|
|
||||||
CONFIG_HPET_ADDRESS=0xfed00000
|
|
||||||
CONFIG_ID_SECTION_OFFSET=0x80
|
|
||||||
CONFIG_POSTCAR_STAGE=y
|
|
||||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
|
||||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
|
||||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
|
||||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
|
||||||
# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
|
|
||||||
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
|
||||||
# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
|
|
||||||
CONFIG_IDT_IN_EVERY_STAGE=y
|
|
||||||
CONFIG_HAVE_CF9_RESET=y
|
|
||||||
# CONFIG_PIRQ_ROUTE is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Devices
|
|
||||||
#
|
|
||||||
CONFIG_HAVE_FSP_GOP=y
|
|
||||||
# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
|
|
||||||
# CONFIG_VGA_ROM_RUN is not set
|
|
||||||
# CONFIG_RUN_FSP_GOP is not set
|
|
||||||
CONFIG_NO_GFX_INIT=y
|
|
||||||
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
|
|
||||||
CONFIG_PCI=y
|
|
||||||
# CONFIG_NO_MMCONF_SUPPORT is not set
|
|
||||||
CONFIG_MMCONF_SUPPORT=y
|
|
||||||
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
|
|
||||||
CONFIG_HT_CHAIN_UNITID_BASE=0
|
|
||||||
CONFIG_HT_CHAIN_END_UNITID_BASE=0
|
|
||||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
|
||||||
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
|
||||||
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
|
|
||||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
|
||||||
CONFIG_PCIEXP_HOTPLUG=y
|
|
||||||
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
|
|
||||||
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
|
|
||||||
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
|
|
||||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
|
||||||
# CONFIG_INTEL_GMA_ADD_VBT is not set
|
|
||||||
# CONFIG_SOFTWARE_I2C is not set
|
|
||||||
# CONFIG_RESOURCE_ALLOCATOR_V3 is not set
|
|
||||||
CONFIG_RESOURCE_ALLOCATOR_V4=y
|
|
||||||
# CONFIG_XHCI_UTILS is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Generic Drivers
|
|
||||||
#
|
|
||||||
# CONFIG_DRIVERS_AS3722_RTC is not set
|
|
||||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
|
||||||
# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
|
|
||||||
# CONFIG_ELOG is not set
|
|
||||||
# CONFIG_GIC is not set
|
|
||||||
# CONFIG_IPMI_KCS is not set
|
|
||||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
|
||||||
CONFIG_CACHE_MRC_SETTINGS=y
|
|
||||||
CONFIG_MRC_SETTINGS_PROTECT=y
|
|
||||||
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
|
|
||||||
# CONFIG_MRC_SETTINGS_VARIABLE_DATA is not set
|
|
||||||
# CONFIG_MRC_WRITE_NV_LATE is not set
|
|
||||||
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
|
|
||||||
# CONFIG_RT8168_SUPPORT_LEGACY_VPD_MAC is not set
|
|
||||||
# CONFIG_RT8168_SET_LED_MODE is not set
|
|
||||||
CONFIG_SMMSTORE=y
|
CONFIG_SMMSTORE=y
|
||||||
# CONFIG_SMMSTORE_IN_CBFS is not set
|
CONFIG_SMMSTORE_V2=y
|
||||||
CONFIG_SMMSTORE_REGION="SMMSTORE"
|
CONFIG_USE_OPTION_TABLE=y
|
||||||
CONFIG_SMMSTORE_FILENAME="smm_store"
|
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
||||||
CONFIG_SMMSTORE_SIZE=0x40000
|
#CONFIG_CONSOLE_SYSTEM76_EC=y
|
||||||
CONFIG_SPI_FLASH=y
|
|
||||||
# CONFIG_SPI_SDCARD is not set
|
|
||||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
|
||||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
|
|
||||||
CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
|
|
||||||
CONFIG_SPI_FLASH_SMM=y
|
|
||||||
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
|
||||||
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
|
|
||||||
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
|
|
||||||
CONFIG_DRIVERS_UART=y
|
|
||||||
CONFIG_NO_UART_ON_SUPERIO=y
|
|
||||||
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
|
|
||||||
# CONFIG_UART_OVERRIDE_REFCLK is not set
|
|
||||||
CONFIG_DRIVERS_UART_8250MEM=y
|
|
||||||
CONFIG_DRIVERS_UART_8250MEM_32=y
|
|
||||||
# CONFIG_HAVE_UART_SPECIAL is not set
|
|
||||||
# CONFIG_DRIVERS_UART_PL011 is not set
|
|
||||||
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
|
|
||||||
# CONFIG_HAVE_USBDEBUG is not set
|
|
||||||
# CONFIG_HAVE_USBDEBUG_OPTIONS is not set
|
|
||||||
# CONFIG_VPD is not set
|
|
||||||
CONFIG_DRIVERS_GENERIC_WIFI=y
|
|
||||||
# CONFIG_USE_SAR is not set
|
|
||||||
# CONFIG_DRIVERS_AMD_PI is not set
|
|
||||||
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
|
||||||
# CONFIG_DRIVERS_GFX_GENERIC is not set
|
|
||||||
CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
|
||||||
# CONFIG_DRIVERS_I2C_DESIGNWARE_DEBUG is not set
|
|
||||||
CONFIG_DRIVERS_I2C_GENERIC=y
|
|
||||||
CONFIG_DRIVERS_I2C_HID=y
|
|
||||||
# CONFIG_DRIVERS_I2C_MAX98373 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_MAX98390 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_MAX98927 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_PCA9538 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_PCF8523 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_PTN3460 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_RT1011 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_RT5663 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_RTD2132 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_RX6110SA is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_SX9310 is not set
|
|
||||||
CONFIG_DRIVERS_I2C_TAS5825M=y
|
|
||||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
|
|
||||||
# CONFIG_DRIVERS_INTEL_DPTF is not set
|
|
||||||
CONFIG_FSP_USE_REPO=y
|
|
||||||
# CONFIG_DISPLAY_HOBS is not set
|
|
||||||
# CONFIG_DISPLAY_UPD_DATA is not set
|
|
||||||
CONFIG_PLATFORM_USES_FSP2_0=y
|
|
||||||
# CONFIG_PLATFORM_USES_FSP2_1 is not set
|
|
||||||
# CONFIG_PLATFORM_USES_FSP2_2 is not set
|
|
||||||
CONFIG_HAVE_INTEL_FSP_REPO=y
|
|
||||||
# CONFIG_FSP_CAR is not set
|
|
||||||
CONFIG_FSP_M_XIP=y
|
|
||||||
# CONFIG_FSP_T_XIP is not set
|
|
||||||
CONFIG_FSP_USES_CB_STACK=y
|
|
||||||
CONFIG_HAVE_FSP_LOGO_SUPPORT=y
|
|
||||||
# CONFIG_FSP2_0_DISPLAY_LOGO is not set
|
|
||||||
CONFIG_FSP_COMPRESS_FSP_S_LZMA=y
|
|
||||||
# CONFIG_INTEL_DDI is not set
|
|
||||||
# CONFIG_INTEL_EDID is not set
|
|
||||||
# CONFIG_INTEL_INT15 is not set
|
|
||||||
CONFIG_INTEL_GMA_ACPI=y
|
|
||||||
CONFIG_INTEL_GMA_BCLV_WIDTH=16
|
|
||||||
CONFIG_INTEL_GMA_BCLM_WIDTH=16
|
|
||||||
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
|
|
||||||
# CONFIG_INTEL_GMA_SWSMISCI is not set
|
|
||||||
# CONFIG_DRIVER_INTEL_I210 is not set
|
|
||||||
# CONFIG_DRIVERS_INTEL_ISH is not set
|
|
||||||
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
|
|
||||||
# CONFIG_DRIVERS_INTEL_PMC is not set
|
|
||||||
# CONFIG_HAVE_INTEL_PTT is not set
|
|
||||||
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
|
|
||||||
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
|
|
||||||
CONFIG_FRU_DEVICE_ID=0
|
|
||||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
|
||||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
|
||||||
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
|
||||||
CONFIG_DRIVERS_MC146818=y
|
|
||||||
CONFIG_MAINBOARD_HAS_LPC_TPM=y
|
|
||||||
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
|
||||||
# CONFIG_DRIVERS_RICOH_RCE822 is not set
|
|
||||||
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
|
|
||||||
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
|
|
||||||
# CONFIG_DRIVERS_SIL_3114 is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_SPI_TPM is not set
|
|
||||||
CONFIG_DRIVERS_SYSTEM76_DGPU=y
|
|
||||||
# CONFIG_DRIVER_TI_TPS65090 is not set
|
|
||||||
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
|
|
||||||
# CONFIG_DRIVERS_USB_ACPI is not set
|
|
||||||
# CONFIG_DRIVERS_USB_PCI_XHCI is not set
|
|
||||||
# CONFIG_COMMONLIB_STORAGE is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Security
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# Verified Boot (vboot)
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# Trusted Platform Module
|
|
||||||
#
|
|
||||||
CONFIG_TPM2=y
|
|
||||||
CONFIG_MAINBOARD_HAS_TPM2=y
|
|
||||||
# CONFIG_DEBUG_TPM is not set
|
|
||||||
CONFIG_TPM_RDRESP_NEED_DELAY=y
|
|
||||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Memory initialization
|
|
||||||
#
|
|
||||||
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
|
|
||||||
# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
|
|
||||||
# CONFIG_INTEL_TXT is not set
|
|
||||||
# CONFIG_STM is not set
|
|
||||||
CONFIG_BOOTMEDIA_LOCK_NONE=y
|
|
||||||
# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
|
|
||||||
# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
|
|
||||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
|
||||||
CONFIG_ACPI_HAVE_PCAT_8259=y
|
|
||||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
|
||||||
CONFIG_HAVE_ACPI_TABLES=y
|
|
||||||
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
|
|
||||||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|
||||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
|
||||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
|
||||||
CONFIG_RTC=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Console
|
|
||||||
#
|
|
||||||
CONFIG_BOOTBLOCK_CONSOLE=y
|
|
||||||
CONFIG_POSTCAR_CONSOLE=y
|
|
||||||
CONFIG_SQUELCH_EARLY_SMP=y
|
|
||||||
CONFIG_FIXED_UART_FOR_CONSOLE=y
|
|
||||||
# CONFIG_SPKMODEM is not set
|
|
||||||
# CONFIG_CONSOLE_NE2K is not set
|
|
||||||
CONFIG_CONSOLE_CBMEM=y
|
|
||||||
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
|
|
||||||
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
|
|
||||||
# CONFIG_CONSOLE_SPI_FLASH is not set
|
|
||||||
# CONFIG_CONSOLE_SYSTEM76_EC is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
|
|
||||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
|
||||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
|
|
||||||
# CONFIG_CMOS_POST is not set
|
|
||||||
# CONFIG_DEFAULT_POST_ON_LPC is not set
|
|
||||||
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
|
|
||||||
CONFIG_HWBASE_DEBUG_CB=y
|
|
||||||
CONFIG_HAVE_ACPI_RESUME=y
|
|
||||||
# CONFIG_DISABLE_ACPI_HIBERNATE is not set
|
|
||||||
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
|
||||||
# CONFIG_NO_MONOTONIC_TIMER is not set
|
|
||||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
|
||||||
# CONFIG_TIMER_QUEUE is not set
|
|
||||||
# CONFIG_HAVE_OPTION_TABLE is not set
|
|
||||||
# CONFIG_PCI_IO_CFG_EXT is not set
|
|
||||||
CONFIG_IOAPIC=y
|
|
||||||
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
|
|
||||||
# CONFIG_GFXUMA is not set
|
|
||||||
CONFIG_ACPI_NHLT=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# System tables
|
|
||||||
#
|
|
||||||
# CONFIG_GENERATE_MP_TABLE is not set
|
|
||||||
# CONFIG_GENERATE_PIRQ_TABLE is not set
|
|
||||||
CONFIG_GENERATE_SMBIOS_TABLES=y
|
|
||||||
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
|
|
||||||
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
|
|
||||||
|
|
||||||
#
|
|
||||||
# Payload
|
|
||||||
#
|
|
||||||
# CONFIG_PAYLOAD_NONE is not set
|
|
||||||
CONFIG_PAYLOAD_ELF=y
|
|
||||||
# CONFIG_PAYLOAD_FILO is not set
|
|
||||||
# CONFIG_PAYLOAD_GRUB2 is not set
|
|
||||||
# CONFIG_PAYLOAD_LINUXBOOT is not set
|
|
||||||
# CONFIG_PAYLOAD_SEABIOS is not set
|
|
||||||
# CONFIG_PAYLOAD_UBOOT is not set
|
|
||||||
# CONFIG_PAYLOAD_YABITS is not set
|
|
||||||
# CONFIG_PAYLOAD_LINUX is not set
|
|
||||||
# CONFIG_PAYLOAD_TIANOCORE is not set
|
|
||||||
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
|
||||||
CONFIG_PAYLOAD_OPTIONS=""
|
|
||||||
# CONFIG_PXE is not set
|
|
||||||
# CONFIG_COMPRESSED_PAYLOAD_NONE is not set
|
|
||||||
CONFIG_COMPRESSED_PAYLOAD_LZMA=y
|
|
||||||
# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set
|
|
||||||
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
|
|
||||||
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Secondary Payloads
|
|
||||||
#
|
|
||||||
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
|
|
||||||
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
|
|
||||||
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Debugging
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# CPU Debug Settings
|
|
||||||
#
|
|
||||||
CONFIG_HAVE_DISPLAY_MTRRS=y
|
|
||||||
# CONFIG_DISPLAY_MTRRS is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# BLOB Debug Settings
|
|
||||||
#
|
|
||||||
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
|
|
||||||
# CONFIG_DISPLAY_FSP_HEADER is not set
|
|
||||||
# CONFIG_VERIFY_HOBS is not set
|
|
||||||
CONFIG_DISPLAY_FSP_VERSION_INFO=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# General Debug Settings
|
|
||||||
#
|
|
||||||
# CONFIG_GDB_STUB is not set
|
|
||||||
# CONFIG_FATAL_ASSERTS is not set
|
|
||||||
CONFIG_HAVE_DEBUG_GPIO=y
|
|
||||||
# CONFIG_DEBUG_GPIO is not set
|
|
||||||
# CONFIG_DEBUG_CBFS is not set
|
|
||||||
# CONFIG_HAVE_DEBUG_RAM_SETUP is not set
|
|
||||||
CONFIG_HAVE_DEBUG_SMBUS=y
|
|
||||||
# CONFIG_DEBUG_SMBUS is not set
|
|
||||||
# CONFIG_DEBUG_SMI is not set
|
|
||||||
# CONFIG_DEBUG_MALLOC is not set
|
|
||||||
# CONFIG_DEBUG_CONSOLE_INIT is not set
|
|
||||||
# CONFIG_DEBUG_SPI_FLASH is not set
|
|
||||||
# CONFIG_TRACE is not set
|
|
||||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
|
||||||
# CONFIG_DEBUG_ADA_CODE is not set
|
|
||||||
CONFIG_HAVE_EM100_SUPPORT=y
|
|
||||||
# CONFIG_EM100 is not set
|
|
||||||
CONFIG_NO_EDID_FILL_FB=y
|
|
||||||
CONFIG_SPD_READ_BY_WORD=y
|
|
||||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
|
||||||
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
|
|
||||||
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
|
|
||||||
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
|
|
||||||
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
|
|
||||||
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
|
|
||||||
CONFIG_REG_SCRIPT=y
|
|
||||||
CONFIG_MAX_REBOOT_CNT=3
|
|
||||||
# CONFIG_NO_XIP_EARLY_STAGES is not set
|
|
||||||
# CONFIG_EARLY_CBMEM_LIST is not set
|
|
||||||
CONFIG_RELOCATABLE_MODULES=y
|
|
||||||
CONFIG_GENERIC_GPIO_LIB=y
|
|
||||||
CONFIG_HAVE_BOOTBLOCK=y
|
|
||||||
CONFIG_HAVE_ROMSTAGE=y
|
|
||||||
CONFIG_HAVE_RAMSTAGE=y
|
|
||||||
|
9
models/bonw14/edk2.config
Normal file
9
models/bonw14/edk2.config
Normal file
@@ -0,0 +1,9 @@
|
|||||||
|
BOOTLOADER=COREBOOT
|
||||||
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
|
SHELL_TYPE=NONE
|
||||||
|
TPM_ENABLE=TRUE
|
||||||
|
#SYSTEM76_EC_LOGGING=TRUE
|
BIN
models/bonw14/fd.rom
(Stored with Git LFS)
BIN
models/bonw14/fd.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/bonw14/me.rom
(Stored with Git LFS)
BIN
models/bonw14/me.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/bonw14/microcode.rom
(Stored with Git LFS)
BIN
models/bonw14/microcode.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/darp5/IntelGopDriver.efi
(Stored with Git LFS)
BIN
models/darp5/IntelGopDriver.efi
(Stored with Git LFS)
Binary file not shown.
@@ -1 +1 @@
|
|||||||
GD25Q128C
|
GD25Q127C/GD25Q128C
|
||||||
|
@@ -1,854 +1,20 @@
|
|||||||
#
|
|
||||||
# Automatically generated file; DO NOT EDIT.
|
|
||||||
# coreboot configuration
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# General setup
|
|
||||||
#
|
|
||||||
CONFIG_COREBOOT_BUILD=y
|
|
||||||
CONFIG_LOCALVERSION=""
|
|
||||||
CONFIG_CBFS_PREFIX="fallback"
|
|
||||||
CONFIG_COMPILER_GCC=y
|
|
||||||
# CONFIG_COMPILER_LLVM_CLANG is not set
|
|
||||||
# CONFIG_ANY_TOOLCHAIN is not set
|
|
||||||
CONFIG_CCACHE=y
|
|
||||||
# CONFIG_FMD_GENPARSER is not set
|
|
||||||
# CONFIG_UTIL_GENPARSER is not set
|
|
||||||
CONFIG_USE_OPTION_TABLE=y
|
|
||||||
# CONFIG_STATIC_OPTION_TABLE is not set
|
|
||||||
CONFIG_COMPRESS_RAMSTAGE=y
|
|
||||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
|
||||||
CONFIG_COLLECT_TIMESTAMPS=y
|
|
||||||
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
|
|
||||||
CONFIG_USE_BLOBS=y
|
|
||||||
# CONFIG_USE_AMD_BLOBS is not set
|
|
||||||
# CONFIG_USE_QC_BLOBS is not set
|
|
||||||
# CONFIG_COVERAGE is not set
|
|
||||||
# CONFIG_UBSAN is not set
|
|
||||||
# CONFIG_NO_STAGE_CACHE is not set
|
|
||||||
CONFIG_TSEG_STAGE_CACHE=y
|
|
||||||
# CONFIG_UPDATE_IMAGE is not set
|
|
||||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
|
||||||
# CONFIG_FW_CONFIG is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Mainboard
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# Important: Run 'make distclean' before switching boards
|
|
||||||
#
|
|
||||||
# CONFIG_VENDOR_51NB is not set
|
|
||||||
# CONFIG_VENDOR_ADLINK is not set
|
|
||||||
# CONFIG_VENDOR_AMD is not set
|
|
||||||
# CONFIG_VENDOR_AOPEN is not set
|
|
||||||
# CONFIG_VENDOR_APPLE is not set
|
|
||||||
# CONFIG_VENDOR_ASROCK is not set
|
|
||||||
# CONFIG_VENDOR_ASUS is not set
|
|
||||||
# CONFIG_VENDOR_BAP is not set
|
|
||||||
# CONFIG_VENDOR_BIOSTAR is not set
|
|
||||||
# CONFIG_VENDOR_CAVIUM is not set
|
|
||||||
# CONFIG_VENDOR_COMPULAB is not set
|
|
||||||
# CONFIG_VENDOR_DELL is not set
|
|
||||||
# CONFIG_VENDOR_ELMEX is not set
|
|
||||||
# CONFIG_VENDOR_EMULATION is not set
|
|
||||||
# CONFIG_VENDOR_FACEBOOK is not set
|
|
||||||
# CONFIG_VENDOR_FOXCONN is not set
|
|
||||||
# CONFIG_VENDOR_GETAC is not set
|
|
||||||
# CONFIG_VENDOR_GIGABYTE is not set
|
|
||||||
# CONFIG_VENDOR_GIZMOSPHERE is not set
|
|
||||||
# CONFIG_VENDOR_GOOGLE is not set
|
|
||||||
# CONFIG_VENDOR_HP is not set
|
|
||||||
# CONFIG_VENDOR_IBASE is not set
|
|
||||||
# CONFIG_VENDOR_INTEL is not set
|
|
||||||
# CONFIG_VENDOR_JETWAY is not set
|
|
||||||
# CONFIG_VENDOR_KONTRON is not set
|
|
||||||
# CONFIG_VENDOR_LENOVO is not set
|
|
||||||
# CONFIG_VENDOR_LIBRETREND is not set
|
|
||||||
# CONFIG_VENDOR_LIPPERT is not set
|
|
||||||
# CONFIG_VENDOR_MSI is not set
|
|
||||||
# CONFIG_VENDOR_OCP is not set
|
|
||||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
|
||||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
|
||||||
# CONFIG_VENDOR_PCENGINES is not set
|
|
||||||
# CONFIG_VENDOR_PORTWELL is not set
|
|
||||||
# CONFIG_VENDOR_PRODRIVE is not set
|
|
||||||
# CONFIG_VENDOR_PROTECTLI is not set
|
|
||||||
# CONFIG_VENDOR_PURISM is not set
|
|
||||||
# CONFIG_VENDOR_RAZER is not set
|
|
||||||
# CONFIG_VENDOR_RODA is not set
|
|
||||||
# CONFIG_VENDOR_SAMSUNG is not set
|
|
||||||
# CONFIG_VENDOR_SAPPHIRE is not set
|
|
||||||
# CONFIG_VENDOR_SCALEWAY is not set
|
|
||||||
# CONFIG_VENDOR_SIEMENS is not set
|
|
||||||
# CONFIG_VENDOR_SIFIVE is not set
|
|
||||||
# CONFIG_VENDOR_SUPERMICRO is not set
|
|
||||||
CONFIG_VENDOR_SYSTEM76=y
|
CONFIG_VENDOR_SYSTEM76=y
|
||||||
# CONFIG_VENDOR_TI is not set
|
CONFIG_BOARD_SYSTEM76_DARP5=y
|
||||||
# CONFIG_VENDOR_UP is not set
|
CONFIG_CCACHE=y
|
||||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
CONFIG_CONSOLE_SERIAL=n
|
||||||
CONFIG_MAINBOARD_PART_NUMBER="darp5"
|
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
||||||
CONFIG_MAINBOARD_VERSION="darp5"
|
CONFIG_HAVE_IFD_BIN=y
|
||||||
CONFIG_MAINBOARD_DIR="system76/whl-u"
|
CONFIG_HAVE_ME_BIN=y
|
||||||
CONFIG_MAX_CPUS=8
|
|
||||||
CONFIG_VGA_BIOS_ID="8086,3ea0"
|
|
||||||
CONFIG_DIMM_MAX=2
|
|
||||||
CONFIG_DIMM_SPD_SIZE=512
|
|
||||||
CONFIG_FMDFILE=""
|
|
||||||
# CONFIG_NO_POST is not set
|
|
||||||
CONFIG_MAINBOARD_VENDOR="System76"
|
|
||||||
CONFIG_ONBOARD_VGA_IS_PRIMARY=y
|
|
||||||
# CONFIG_VGA_BIOS is not set
|
|
||||||
CONFIG_CBFS_SIZE=0xA00000
|
|
||||||
CONFIG_VARIANT_DIR="darp5"
|
|
||||||
CONFIG_DEVICETREE="devicetree.cb"
|
|
||||||
CONFIG_VGA_BIOS_FILE="pci8086,3ea0.rom"
|
|
||||||
CONFIG_C_ENV_BOOTBLOCK_SIZE=0xC000
|
|
||||||
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="System76"
|
|
||||||
CONFIG_INTEL_GMA_VBT_FILE="$(FIRMWARE_OPEN_MODEL_DIR)/vbt.rom"
|
|
||||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xe00
|
|
||||||
# CONFIG_POST_IO is not set
|
|
||||||
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
|
|
||||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
|
||||||
CONFIG_UART_FOR_CONSOLE=2
|
|
||||||
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
|
|
||||||
# CONFIG_VBOOT is not set
|
|
||||||
CONFIG_DCACHE_RAM_BASE=0xfef00000
|
|
||||||
CONFIG_DCACHE_RAM_SIZE=0x40000
|
|
||||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x20400
|
|
||||||
CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
|
|
||||||
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
|
|
||||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
|
||||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
|
||||||
# CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS is not set
|
|
||||||
CONFIG_TPM_INIT=y
|
|
||||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
|
||||||
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
||||||
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
||||||
# CONFIG_CONSOLE_SERIAL is not set
|
CONFIG_PAYLOAD_ELF=y
|
||||||
CONFIG_TPM_PIRQ=0x0
|
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
||||||
CONFIG_PCIEXP_HOTPLUG_BUSES=32
|
|
||||||
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
|
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
|
||||||
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
|
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
|
||||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Darter Pro"
|
CONFIG_POST_IO=n
|
||||||
CONFIG_HAVE_IFD_BIN=y
|
|
||||||
CONFIG_ADD_FSP_BINARIES=y
|
|
||||||
CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
|
|
||||||
CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
|
|
||||||
CONFIG_FSP_S_CBFS="fsps.bin"
|
|
||||||
CONFIG_FSP_M_CBFS="fspm.bin"
|
|
||||||
CONFIG_PS2K_EISAID="PNP0303"
|
|
||||||
CONFIG_PS2M_EISAID="PNP0F13"
|
|
||||||
CONFIG_PCIEXP_L1_SUB_STATE=y
|
|
||||||
CONFIG_PCIEXP_CLK_PM=y
|
|
||||||
CONFIG_CONSOLE_POST=y
|
|
||||||
CONFIG_PXE_ROM_ID="10ec,8168"
|
|
||||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
|
||||||
CONFIG_HEAP_SIZE=0x8000
|
|
||||||
# CONFIG_POST_DEVICE is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_ADDW1 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_ADDW2 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_BONW14 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP4 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_DARP6 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_15 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_17 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_15 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_17 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE15 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP2 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP3 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP3_B is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_LEMP9 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_ORYP5 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_ORYP6 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_THELIO_B1 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP3_C is not set
|
|
||||||
CONFIG_BOARD_SYSTEM76_DARP5=y
|
|
||||||
CONFIG_FSP_HEADER_PATH="3rdparty/fsp/CoffeeLakeFspBinPkg/Include/"
|
|
||||||
CONFIG_FSP_FD_PATH="3rdparty/fsp/CoffeeLakeFspBinPkg/Fsp.fd"
|
|
||||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x1558
|
|
||||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x1325
|
|
||||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
|
||||||
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
|
||||||
CONFIG_COREBOOT_ROMSIZE_KB=16384
|
|
||||||
CONFIG_ROM_SIZE=0x01000000
|
|
||||||
CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
|
|
||||||
CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
|
|
||||||
CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
|
|
||||||
# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
|
|
||||||
CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
|
|
||||||
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
|
|
||||||
CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
|
|
||||||
CONFIG_SYSTEM_TYPE_LAPTOP=y
|
|
||||||
# CONFIG_SYSTEM_TYPE_TABLET is not set
|
|
||||||
# CONFIG_SYSTEM_TYPE_DETACHABLE is not set
|
|
||||||
# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set
|
|
||||||
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Chipset
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# SoC
|
|
||||||
#
|
|
||||||
CONFIG_CPU_SPECIFIC_OPTIONS=y
|
|
||||||
CONFIG_X86_RESET_VECTOR=0xfffffff0
|
|
||||||
CONFIG_ROMSTAGE_ADDR=0x2000000
|
|
||||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
|
||||||
CONFIG_RAMBASE=0xe00000
|
|
||||||
CONFIG_CPU_ADDR_BITS=36
|
|
||||||
# CONFIG_CHECK_REV_IN_OPROM_NAME is not set
|
|
||||||
CONFIG_CONSOLE_UART_BASE_ADDRESS=0xfe032000
|
|
||||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
|
||||||
CONFIG_SMM_RESERVED_SIZE=0x200000
|
|
||||||
CONFIG_SMM_MODULE_STACK_SIZE=0x800
|
|
||||||
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
|
|
||||||
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=216
|
|
||||||
CONFIG_FSP_TEMP_RAM_SIZE=0x10000
|
|
||||||
# CONFIG_SOC_CAVIUM_CN81XX is not set
|
|
||||||
CONFIG_ARCH_ARMV8_EXTENSION=0
|
|
||||||
CONFIG_STACK_SIZE=0x1000
|
|
||||||
# CONFIG_SOC_CAVIUM_COMMON is not set
|
|
||||||
# CONFIG_SOC_INTEL_GLK is not set
|
|
||||||
CONFIG_PCR_BASE_ADDRESS=0xfd000000
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
|
|
||||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
|
||||||
# CONFIG_NHLT_DMIC_1CH_16B is not set
|
|
||||||
# CONFIG_NHLT_DMIC_2CH_16B is not set
|
|
||||||
# CONFIG_NHLT_DMIC_4CH_16B is not set
|
|
||||||
# CONFIG_NHLT_MAX98357 is not set
|
|
||||||
# CONFIG_NHLT_DA7219 is not set
|
|
||||||
CONFIG_IFD_CHIPSET="cnl"
|
|
||||||
CONFIG_CPU_BCLK_MHZ=100
|
|
||||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
|
|
||||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=3
|
|
||||||
CONFIG_SOC_INTEL_I2C_DEV_MAX=6
|
|
||||||
CONFIG_PCIEXP_ASPM=y
|
|
||||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
|
||||||
CONFIG_IED_REGION_SIZE=0x400000
|
|
||||||
CONFIG_SOC_INTEL_CANNONLAKE_BASE=y
|
|
||||||
CONFIG_SOC_INTEL_CANNONLAKE_ALTERNATE_HEADERS=y
|
|
||||||
CONFIG_SOC_INTEL_WHISKEYLAKE=y
|
|
||||||
# CONFIG_NHLT_MAX98373 is not set
|
|
||||||
CONFIG_MAX_ROOT_PORTS=16
|
|
||||||
CONFIG_MAX_PCIE_CLOCKS=6
|
|
||||||
# CONFIG_MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE is not set
|
|
||||||
CONFIG_USE_CANNONLAKE_CAR_NEM_ENHANCED=y
|
|
||||||
# CONFIG_USE_CANNONLAKE_FSP_CAR is not set
|
|
||||||
CONFIG_SOC_INTEL_CANNONLAKE_DEBUG_CONSENT=0
|
|
||||||
CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
|
|
||||||
CONFIG_UART_PCI_ADDR=0x0
|
|
||||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Intel SoC Common Code
|
|
||||||
#
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
|
|
||||||
# CONFIG_INTEL_CAR_NEM is not set
|
|
||||||
# CONFIG_INTEL_CAR_CQOS is not set
|
|
||||||
CONFIG_INTEL_CAR_NEM_ENHANCED=y
|
|
||||||
# CONFIG_USE_INTEL_FSP_MP_INIT is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_DTT is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
|
|
||||||
CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
|
|
||||||
CONFIG_SOC_INTEL_CONFIGURE_DDI_A_4_LANES=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_IMC is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
|
|
||||||
# CONFIG_PMC_INVALID_READ_AFTER_WRITE is not set
|
|
||||||
CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_MMC_OVERRIDE is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_MAX is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_256MB is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_128MB is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_64MB is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_32MB is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_1MB is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_DISABLED=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
|
|
||||||
# CONFIG_HECI_DISABLE_USING_SMM is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
|
|
||||||
CONFIG_SA_PCIEX_LENGTH=0x10000000
|
|
||||||
# CONFIG_SA_ENABLE_IMR is not set
|
|
||||||
# CONFIG_SA_ENABLE_DPR is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
|
|
||||||
CONFIG_USE_LEGACY_8254_TIMER=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
|
|
||||||
CONFIG_INTEL_LPSS_UART_FOR_CONSOLE=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Intel SoC Common PCH Code
|
|
||||||
#
|
|
||||||
CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
|
|
||||||
CONFIG_PCH_SPECIFIC_OPTIONS=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Intel SoC Common coreboot stages
|
|
||||||
#
|
|
||||||
CONFIG_SOC_INTEL_COMMON_RESET=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
|
|
||||||
# CONFIG_ACPI_CONSOLE is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_ACPI is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_NHLT=y
|
|
||||||
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
|
|
||||||
# CONFIG_SOC_MEDIATEK_MT8173 is not set
|
|
||||||
# CONFIG_SOC_MEDIATEK_MT8183 is not set
|
|
||||||
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
|
|
||||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
|
||||||
# CONFIG_SOC_QUALCOMM_COMMON is not set
|
|
||||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
|
||||||
# CONFIG_SOC_QC_IPQ806X is not set
|
|
||||||
# CONFIG_SOC_QUALCOMM_QCS405 is not set
|
|
||||||
# CONFIG_SOC_QUALCOMM_SC7180 is not set
|
|
||||||
# CONFIG_SOC_QUALCOMM_SDM845 is not set
|
|
||||||
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
|
|
||||||
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
|
|
||||||
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
|
|
||||||
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
|
|
||||||
# CONFIG_SOC_UCB_RISCV is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# CPU
|
|
||||||
#
|
|
||||||
# CONFIG_CPU_AMD_AGESA is not set
|
|
||||||
# CONFIG_CPU_AMD_PI is not set
|
|
||||||
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
|
|
||||||
CONFIG_SSE2=y
|
|
||||||
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
|
|
||||||
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
|
|
||||||
CONFIG_CPU_INTEL_COMMON=y
|
|
||||||
CONFIG_ENABLE_VMX=y
|
|
||||||
CONFIG_SET_IA32_FC_LOCK_BIT=y
|
|
||||||
CONFIG_CPU_INTEL_COMMON_SMM=y
|
|
||||||
CONFIG_MICROCODE_UPDATE_PRE_RAM=y
|
|
||||||
# CONFIG_CPU_TI_AM335X is not set
|
|
||||||
# CONFIG_PARALLEL_CPU_INIT is not set
|
|
||||||
CONFIG_PARALLEL_MP=y
|
|
||||||
CONFIG_PARALLEL_MP_AP_WORK=y
|
|
||||||
# CONFIG_UDELAY_LAPIC is not set
|
|
||||||
CONFIG_UDELAY_TSC=y
|
|
||||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
|
||||||
# CONFIG_TSC_SYNC_LFENCE is not set
|
|
||||||
# CONFIG_TSC_SYNC_MFENCE is not set
|
|
||||||
CONFIG_LOGICAL_CPUS=y
|
|
||||||
CONFIG_HAVE_SMI_HANDLER=y
|
|
||||||
# CONFIG_NO_SMM is not set
|
|
||||||
# CONFIG_SMM_ASEG is not set
|
|
||||||
CONFIG_SMM_TSEG=y
|
|
||||||
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
|
|
||||||
CONFIG_SMM_STUB_STACK_SIZE=0x400
|
|
||||||
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
|
|
||||||
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
|
|
||||||
# CONFIG_X86_AMD_FIXED_MTRRS is not set
|
|
||||||
# CONFIG_X86_AMD_INIT_SIPI is not set
|
|
||||||
# CONFIG_SOC_SETS_MSRS is not set
|
|
||||||
CONFIG_SMP=y
|
|
||||||
CONFIG_SSE=y
|
|
||||||
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
|
||||||
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
|
|
||||||
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
|
|
||||||
# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
|
|
||||||
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
|
|
||||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
|
||||||
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
|
||||||
CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
|
|
||||||
|
|
||||||
#
|
|
||||||
# Northbridge
|
|
||||||
#
|
|
||||||
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
|
|
||||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
|
||||||
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
|
|
||||||
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
|
|
||||||
|
|
||||||
#
|
|
||||||
# Southbridge
|
|
||||||
#
|
|
||||||
# CONFIG_AMD_SB_CIMX is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
|
|
||||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7 is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9 is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_SILVERMONT is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
|
|
||||||
# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG is not set
|
|
||||||
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
|
|
||||||
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
|
|
||||||
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Super I/O
|
|
||||||
#
|
|
||||||
# CONFIG_SUPERIO_ASPEED_AST2400 is not set
|
|
||||||
# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
|
|
||||||
# CONFIG_SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND is not set
|
|
||||||
# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Embedded Controllers
|
|
||||||
#
|
|
||||||
# CONFIG_EC_51NB_NPCE985LA0DX is not set
|
|
||||||
# CONFIG_EC_GOOGLE_CHROMEEC_SKUID is not set
|
|
||||||
# CONFIG_EC_GOOGLE_WILCO is not set
|
|
||||||
CONFIG_EC_SYSTEM76_EC=y
|
|
||||||
CONFIG_EC_SYSTEM76_EC_BAT_THRESHOLDS=y
|
|
||||||
CONFIG_EC_SYSTEM76_EC_COLOR_KEYBOARD=y
|
|
||||||
# CONFIG_EC_SYSTEM76_EC_DGPU is not set
|
|
||||||
# CONFIG_EC_SYSTEM76_EC_OLED is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Intel Firmware
|
|
||||||
#
|
|
||||||
CONFIG_HAVE_ME_BIN=y
|
|
||||||
# CONFIG_MAINBOARD_USES_IFD_GBE_REGION is not set
|
|
||||||
# CONFIG_MAINBOARD_USES_IFD_EC_REGION is not set
|
|
||||||
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
|
|
||||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
|
||||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
|
||||||
# CONFIG_CAVIUM_BDK is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
|
|
||||||
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
|
|
||||||
# CONFIG_UEFI_2_4_BINDING is not set
|
|
||||||
# CONFIG_UDK_2015_BINDING is not set
|
|
||||||
CONFIG_UDK_2017_BINDING=y
|
|
||||||
# CONFIG_UDK_202005_BINDING is not set
|
|
||||||
CONFIG_UDK_2013_VERSION=2013
|
|
||||||
CONFIG_UDK_2015_VERSION=2015
|
|
||||||
CONFIG_UDK_2017_VERSION=2017
|
|
||||||
CONFIG_UDK_202005_VERSION=202005
|
|
||||||
CONFIG_UDK_VERSION=2017
|
|
||||||
# CONFIG_USE_SIEMENS_HWILIB is not set
|
|
||||||
# CONFIG_ARM_LPAE is not set
|
|
||||||
CONFIG_ARCH_X86=y
|
|
||||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
|
||||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
|
||||||
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
|
||||||
CONFIG_ARCH_POSTCAR_X86_32=y
|
|
||||||
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
|
||||||
# CONFIG_ARCH_POSTCAR_X86_64 is not set
|
|
||||||
# CONFIG_USE_MARCH_586 is not set
|
|
||||||
# CONFIG_AP_IN_SIPI_WAIT is not set
|
|
||||||
# CONFIG_SIPI_VECTOR_IN_ROM is not set
|
|
||||||
CONFIG_RAMTOP=0x1000000
|
|
||||||
CONFIG_NUM_IPI_STARTS=2
|
|
||||||
CONFIG_PC80_SYSTEM=y
|
|
||||||
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
|
|
||||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
|
||||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
|
||||||
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
|
|
||||||
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
|
|
||||||
# CONFIG_HPET_ADDRESS_OVERRIDE is not set
|
|
||||||
CONFIG_HPET_ADDRESS=0xfed00000
|
|
||||||
CONFIG_ID_SECTION_OFFSET=0x80
|
|
||||||
CONFIG_POSTCAR_STAGE=y
|
|
||||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
|
||||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
|
||||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
|
||||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
|
||||||
# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
|
|
||||||
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
|
||||||
# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
|
|
||||||
CONFIG_IDT_IN_EVERY_STAGE=y
|
|
||||||
CONFIG_HAVE_CF9_RESET=y
|
|
||||||
# CONFIG_PIRQ_ROUTE is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Devices
|
|
||||||
#
|
|
||||||
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
|
||||||
CONFIG_HAVE_FSP_GOP=y
|
|
||||||
# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
|
|
||||||
# CONFIG_VGA_ROM_RUN is not set
|
|
||||||
CONFIG_RUN_FSP_GOP=y
|
CONFIG_RUN_FSP_GOP=y
|
||||||
# CONFIG_NO_GFX_INIT is not set
|
|
||||||
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Display
|
|
||||||
#
|
|
||||||
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
|
|
||||||
CONFIG_LINEAR_FRAMEBUFFER=y
|
|
||||||
# CONFIG_BOOTSPLASH is not set
|
|
||||||
CONFIG_PCI=y
|
|
||||||
# CONFIG_NO_MMCONF_SUPPORT is not set
|
|
||||||
CONFIG_MMCONF_SUPPORT=y
|
|
||||||
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
|
|
||||||
CONFIG_HT_CHAIN_UNITID_BASE=0
|
|
||||||
CONFIG_HT_CHAIN_END_UNITID_BASE=0
|
|
||||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
|
||||||
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
|
||||||
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
|
|
||||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
|
||||||
CONFIG_PCIEXP_HOTPLUG=y
|
|
||||||
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G is not set
|
|
||||||
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G=y
|
|
||||||
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
|
|
||||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
|
||||||
CONFIG_INTEL_GMA_HAVE_VBT=y
|
|
||||||
CONFIG_INTEL_GMA_ADD_VBT=y
|
|
||||||
# CONFIG_SOFTWARE_I2C is not set
|
|
||||||
# CONFIG_RESOURCE_ALLOCATOR_V3 is not set
|
|
||||||
CONFIG_RESOURCE_ALLOCATOR_V4=y
|
|
||||||
# CONFIG_XHCI_UTILS is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Generic Drivers
|
|
||||||
#
|
|
||||||
# CONFIG_DRIVERS_AS3722_RTC is not set
|
|
||||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
|
||||||
# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
|
|
||||||
# CONFIG_ELOG is not set
|
|
||||||
# CONFIG_GIC is not set
|
|
||||||
# CONFIG_IPMI_KCS is not set
|
|
||||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
|
||||||
CONFIG_CACHE_MRC_SETTINGS=y
|
|
||||||
CONFIG_MRC_SETTINGS_PROTECT=y
|
|
||||||
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
|
|
||||||
# CONFIG_MRC_SETTINGS_VARIABLE_DATA is not set
|
|
||||||
# CONFIG_MRC_WRITE_NV_LATE is not set
|
|
||||||
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
|
|
||||||
# CONFIG_RT8168_SUPPORT_LEGACY_VPD_MAC is not set
|
|
||||||
# CONFIG_RT8168_SET_LED_MODE is not set
|
|
||||||
CONFIG_SMMSTORE=y
|
CONFIG_SMMSTORE=y
|
||||||
# CONFIG_SMMSTORE_IN_CBFS is not set
|
CONFIG_SMMSTORE_V2=y
|
||||||
CONFIG_SMMSTORE_REGION="SMMSTORE"
|
CONFIG_USE_OPTION_TABLE=y
|
||||||
CONFIG_SMMSTORE_FILENAME="smm_store"
|
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
||||||
CONFIG_SMMSTORE_SIZE=0x40000
|
#CONFIG_CONSOLE_SYSTEM76_EC=y
|
||||||
CONFIG_SPI_FLASH=y
|
|
||||||
# CONFIG_SPI_SDCARD is not set
|
|
||||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
|
||||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
|
|
||||||
CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
|
|
||||||
CONFIG_SPI_FLASH_SMM=y
|
|
||||||
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
|
||||||
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
|
|
||||||
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
|
|
||||||
CONFIG_DRIVERS_UART=y
|
|
||||||
CONFIG_NO_UART_ON_SUPERIO=y
|
|
||||||
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
|
|
||||||
# CONFIG_UART_OVERRIDE_REFCLK is not set
|
|
||||||
CONFIG_DRIVERS_UART_8250MEM=y
|
|
||||||
CONFIG_DRIVERS_UART_8250MEM_32=y
|
|
||||||
# CONFIG_HAVE_UART_SPECIAL is not set
|
|
||||||
# CONFIG_DRIVERS_UART_PL011 is not set
|
|
||||||
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
|
|
||||||
# CONFIG_HAVE_USBDEBUG is not set
|
|
||||||
# CONFIG_HAVE_USBDEBUG_OPTIONS is not set
|
|
||||||
# CONFIG_VPD is not set
|
|
||||||
CONFIG_DRIVERS_GENERIC_WIFI=y
|
|
||||||
# CONFIG_USE_SAR is not set
|
|
||||||
# CONFIG_DRIVERS_AMD_PI is not set
|
|
||||||
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
|
||||||
# CONFIG_DRIVERS_GFX_GENERIC is not set
|
|
||||||
CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
|
||||||
# CONFIG_DRIVERS_I2C_DESIGNWARE_DEBUG is not set
|
|
||||||
CONFIG_DRIVERS_I2C_GENERIC=y
|
|
||||||
CONFIG_DRIVERS_I2C_HID=y
|
|
||||||
# CONFIG_DRIVERS_I2C_MAX98373 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_MAX98390 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_MAX98927 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_PCA9538 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_PCF8523 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_PTN3460 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_RT1011 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_RT5663 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_RTD2132 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_RX6110SA is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_SX9310 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_TAS5825M is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
|
|
||||||
# CONFIG_DRIVERS_INTEL_DPTF is not set
|
|
||||||
CONFIG_FSP_USE_REPO=y
|
|
||||||
# CONFIG_DISPLAY_HOBS is not set
|
|
||||||
# CONFIG_DISPLAY_UPD_DATA is not set
|
|
||||||
CONFIG_PLATFORM_USES_FSP2_0=y
|
|
||||||
# CONFIG_PLATFORM_USES_FSP2_1 is not set
|
|
||||||
# CONFIG_PLATFORM_USES_FSP2_2 is not set
|
|
||||||
CONFIG_HAVE_INTEL_FSP_REPO=y
|
|
||||||
# CONFIG_FSP_CAR is not set
|
|
||||||
CONFIG_FSP_M_XIP=y
|
|
||||||
# CONFIG_FSP_T_XIP is not set
|
|
||||||
CONFIG_FSP_USES_CB_STACK=y
|
|
||||||
CONFIG_HAVE_FSP_LOGO_SUPPORT=y
|
|
||||||
# CONFIG_FSP2_0_DISPLAY_LOGO is not set
|
|
||||||
CONFIG_FSP_COMPRESS_FSP_S_LZMA=y
|
|
||||||
# CONFIG_INTEL_DDI is not set
|
|
||||||
# CONFIG_INTEL_EDID is not set
|
|
||||||
# CONFIG_INTEL_INT15 is not set
|
|
||||||
CONFIG_INTEL_GMA_ACPI=y
|
|
||||||
CONFIG_INTEL_GMA_BCLV_WIDTH=16
|
|
||||||
CONFIG_INTEL_GMA_BCLM_WIDTH=16
|
|
||||||
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
|
|
||||||
# CONFIG_INTEL_GMA_SWSMISCI is not set
|
|
||||||
# CONFIG_DRIVER_INTEL_I210 is not set
|
|
||||||
# CONFIG_DRIVERS_INTEL_ISH is not set
|
|
||||||
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
|
|
||||||
# CONFIG_DRIVERS_INTEL_PMC is not set
|
|
||||||
# CONFIG_HAVE_INTEL_PTT is not set
|
|
||||||
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
|
|
||||||
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
|
|
||||||
CONFIG_FRU_DEVICE_ID=0
|
|
||||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
|
||||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
|
||||||
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
|
||||||
CONFIG_DRIVERS_MC146818=y
|
|
||||||
CONFIG_MAINBOARD_HAS_LPC_TPM=y
|
|
||||||
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
|
||||||
# CONFIG_DRIVERS_RICOH_RCE822 is not set
|
|
||||||
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
|
|
||||||
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
|
|
||||||
# CONFIG_DRIVERS_SIL_3114 is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_SPI_TPM is not set
|
|
||||||
# CONFIG_DRIVERS_SYSTEM76_DGPU is not set
|
|
||||||
# CONFIG_DRIVER_TI_TPS65090 is not set
|
|
||||||
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
|
|
||||||
# CONFIG_DRIVERS_USB_ACPI is not set
|
|
||||||
# CONFIG_DRIVERS_USB_PCI_XHCI is not set
|
|
||||||
# CONFIG_COMMONLIB_STORAGE is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Security
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# Verified Boot (vboot)
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# Trusted Platform Module
|
|
||||||
#
|
|
||||||
CONFIG_TPM2=y
|
|
||||||
CONFIG_MAINBOARD_HAS_TPM2=y
|
|
||||||
# CONFIG_DEBUG_TPM is not set
|
|
||||||
CONFIG_TPM_RDRESP_NEED_DELAY=y
|
|
||||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Memory initialization
|
|
||||||
#
|
|
||||||
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
|
|
||||||
# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
|
|
||||||
# CONFIG_INTEL_TXT is not set
|
|
||||||
# CONFIG_STM is not set
|
|
||||||
CONFIG_BOOTMEDIA_LOCK_NONE=y
|
|
||||||
# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
|
|
||||||
# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
|
|
||||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
|
||||||
CONFIG_ACPI_HAVE_PCAT_8259=y
|
|
||||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
|
||||||
CONFIG_HAVE_ACPI_TABLES=y
|
|
||||||
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
|
|
||||||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|
||||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
|
||||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
|
||||||
CONFIG_RTC=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Console
|
|
||||||
#
|
|
||||||
CONFIG_BOOTBLOCK_CONSOLE=y
|
|
||||||
CONFIG_POSTCAR_CONSOLE=y
|
|
||||||
CONFIG_SQUELCH_EARLY_SMP=y
|
|
||||||
CONFIG_FIXED_UART_FOR_CONSOLE=y
|
|
||||||
# CONFIG_SPKMODEM is not set
|
|
||||||
# CONFIG_CONSOLE_NE2K is not set
|
|
||||||
CONFIG_CONSOLE_CBMEM=y
|
|
||||||
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
|
|
||||||
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
|
|
||||||
# CONFIG_CONSOLE_SPI_FLASH is not set
|
|
||||||
# CONFIG_CONSOLE_SYSTEM76_EC is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
|
|
||||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
|
||||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
|
|
||||||
# CONFIG_CMOS_POST is not set
|
|
||||||
# CONFIG_DEFAULT_POST_ON_LPC is not set
|
|
||||||
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
|
|
||||||
CONFIG_HWBASE_DEBUG_CB=y
|
|
||||||
CONFIG_HAVE_ACPI_RESUME=y
|
|
||||||
# CONFIG_DISABLE_ACPI_HIBERNATE is not set
|
|
||||||
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
|
||||||
# CONFIG_NO_MONOTONIC_TIMER is not set
|
|
||||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
|
||||||
# CONFIG_TIMER_QUEUE is not set
|
|
||||||
CONFIG_HAVE_OPTION_TABLE=y
|
|
||||||
# CONFIG_PCI_IO_CFG_EXT is not set
|
|
||||||
CONFIG_IOAPIC=y
|
|
||||||
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
|
|
||||||
# CONFIG_GFXUMA is not set
|
|
||||||
CONFIG_ACPI_NHLT=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# System tables
|
|
||||||
#
|
|
||||||
# CONFIG_GENERATE_MP_TABLE is not set
|
|
||||||
# CONFIG_GENERATE_PIRQ_TABLE is not set
|
|
||||||
CONFIG_GENERATE_SMBIOS_TABLES=y
|
|
||||||
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
|
|
||||||
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
|
|
||||||
|
|
||||||
#
|
|
||||||
# Payload
|
|
||||||
#
|
|
||||||
# CONFIG_PAYLOAD_NONE is not set
|
|
||||||
CONFIG_PAYLOAD_ELF=y
|
|
||||||
# CONFIG_PAYLOAD_FILO is not set
|
|
||||||
# CONFIG_PAYLOAD_GRUB2 is not set
|
|
||||||
# CONFIG_PAYLOAD_LINUXBOOT is not set
|
|
||||||
# CONFIG_PAYLOAD_SEABIOS is not set
|
|
||||||
# CONFIG_PAYLOAD_UBOOT is not set
|
|
||||||
# CONFIG_PAYLOAD_YABITS is not set
|
|
||||||
# CONFIG_PAYLOAD_LINUX is not set
|
|
||||||
# CONFIG_PAYLOAD_TIANOCORE is not set
|
|
||||||
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
|
||||||
CONFIG_PAYLOAD_OPTIONS=""
|
|
||||||
# CONFIG_PXE is not set
|
|
||||||
# CONFIG_COMPRESSED_PAYLOAD_NONE is not set
|
|
||||||
CONFIG_COMPRESSED_PAYLOAD_LZMA=y
|
|
||||||
# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set
|
|
||||||
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
|
|
||||||
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Secondary Payloads
|
|
||||||
#
|
|
||||||
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
|
|
||||||
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
|
|
||||||
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
|
|
||||||
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Debugging
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# CPU Debug Settings
|
|
||||||
#
|
|
||||||
CONFIG_HAVE_DISPLAY_MTRRS=y
|
|
||||||
# CONFIG_DISPLAY_MTRRS is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# BLOB Debug Settings
|
|
||||||
#
|
|
||||||
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
|
|
||||||
# CONFIG_DISPLAY_FSP_HEADER is not set
|
|
||||||
# CONFIG_VERIFY_HOBS is not set
|
|
||||||
CONFIG_DISPLAY_FSP_VERSION_INFO=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# General Debug Settings
|
|
||||||
#
|
|
||||||
# CONFIG_GDB_STUB is not set
|
|
||||||
# CONFIG_FATAL_ASSERTS is not set
|
|
||||||
CONFIG_HAVE_DEBUG_GPIO=y
|
|
||||||
# CONFIG_DEBUG_GPIO is not set
|
|
||||||
# CONFIG_DEBUG_CBFS is not set
|
|
||||||
# CONFIG_HAVE_DEBUG_RAM_SETUP is not set
|
|
||||||
CONFIG_HAVE_DEBUG_SMBUS=y
|
|
||||||
# CONFIG_DEBUG_SMBUS is not set
|
|
||||||
# CONFIG_DEBUG_SMI is not set
|
|
||||||
# CONFIG_DEBUG_MALLOC is not set
|
|
||||||
# CONFIG_DEBUG_CONSOLE_INIT is not set
|
|
||||||
# CONFIG_DEBUG_SPI_FLASH is not set
|
|
||||||
# CONFIG_TRACE is not set
|
|
||||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
|
||||||
# CONFIG_DEBUG_ADA_CODE is not set
|
|
||||||
CONFIG_HAVE_EM100_SUPPORT=y
|
|
||||||
# CONFIG_EM100 is not set
|
|
||||||
CONFIG_NO_EDID_FILL_FB=y
|
|
||||||
CONFIG_SPD_READ_BY_WORD=y
|
|
||||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
|
||||||
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
|
|
||||||
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
|
|
||||||
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
|
|
||||||
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
|
|
||||||
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
|
|
||||||
CONFIG_REG_SCRIPT=y
|
|
||||||
CONFIG_MAX_REBOOT_CNT=3
|
|
||||||
# CONFIG_NO_XIP_EARLY_STAGES is not set
|
|
||||||
# CONFIG_EARLY_CBMEM_LIST is not set
|
|
||||||
CONFIG_RELOCATABLE_MODULES=y
|
|
||||||
CONFIG_GENERIC_GPIO_LIB=y
|
|
||||||
CONFIG_HAVE_BOOTBLOCK=y
|
|
||||||
CONFIG_HAVE_ROMSTAGE=y
|
|
||||||
CONFIG_HAVE_RAMSTAGE=y
|
|
||||||
|
9
models/darp5/edk2.config
Normal file
9
models/darp5/edk2.config
Normal file
@@ -0,0 +1,9 @@
|
|||||||
|
BOOTLOADER=COREBOOT
|
||||||
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
|
SHELL_TYPE=NONE
|
||||||
|
TPM_ENABLE=TRUE
|
||||||
|
#SYSTEM76_EC_LOGGING=TRUE
|
BIN
models/darp5/microcode.rom
(Stored with Git LFS)
BIN
models/darp5/microcode.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/darp6/FSP/Fsp_M.fd
(Stored with Git LFS)
BIN
models/darp6/FSP/Fsp_M.fd
(Stored with Git LFS)
Binary file not shown.
BIN
models/darp6/FSP/Fsp_S.fd
(Stored with Git LFS)
BIN
models/darp6/FSP/Fsp_S.fd
(Stored with Git LFS)
Binary file not shown.
BIN
models/darp6/FSP/Fsp_T.fd
(Stored with Git LFS)
BIN
models/darp6/FSP/Fsp_T.fd
(Stored with Git LFS)
Binary file not shown.
@@ -1 +0,0 @@
|
|||||||
../../../FSP/CometLakeFspBinPkg/CometLake1/Include
|
|
@@ -1,46 +0,0 @@
|
|||||||
************************************************************************
|
|
||||||
** **
|
|
||||||
** **
|
|
||||||
** IMPORTANT - READ THIS BEFORE COPYING, INSTALLING OR USING **
|
|
||||||
** **
|
|
||||||
** ANY PORTION OF THE SOFTWARE **
|
|
||||||
** **
|
|
||||||
************************************************************************
|
|
||||||
|
|
||||||
Copyright (c) 2018 Intel Corporation.
|
|
||||||
All rights reserved.
|
|
||||||
|
|
||||||
Redistribution.
|
|
||||||
|
|
||||||
Redistribution and use in binary form, without modification, are permitted
|
|
||||||
provided that the following conditions are met:
|
|
||||||
|
|
||||||
- Redistributions must reproduce the above copyright notice and the
|
|
||||||
following disclaimer in the documentation and/or other materials provided
|
|
||||||
with the distribution.
|
|
||||||
|
|
||||||
- Neither the name of Intel Corporation nor the names of its suppliers
|
|
||||||
may be used to endorse or promote products derived from this software
|
|
||||||
without specific prior written permission.
|
|
||||||
|
|
||||||
- No reverse engineering, decompilation, or disassembly of this software
|
|
||||||
is permitted.
|
|
||||||
|
|
||||||
"Binary form" includes any format that is commonly used for electronic
|
|
||||||
conveyance that is a reversible, bit-exact translation of binary
|
|
||||||
representation to ASCII or ISO text, for example "uuencode".
|
|
||||||
|
|
||||||
DISCLAIMER.
|
|
||||||
|
|
||||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
|
||||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
|
|
||||||
THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
|
|
BIN
models/darp6/IntelGopDriver.efi
(Stored with Git LFS)
BIN
models/darp6/IntelGopDriver.efi
(Stored with Git LFS)
Binary file not shown.
@@ -11,4 +11,4 @@ https://system76.com/guides/darp6
|
|||||||
- HAP: false
|
- HAP: false
|
||||||
- [ME](./me.rom)
|
- [ME](./me.rom)
|
||||||
- Size: 4092 KB
|
- Size: 4092 KB
|
||||||
- Version: 14.0.10.1204
|
- Version: 14.0.60.1807
|
||||||
|
@@ -1,854 +1,20 @@
|
|||||||
#
|
|
||||||
# Automatically generated file; DO NOT EDIT.
|
|
||||||
# coreboot configuration
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# General setup
|
|
||||||
#
|
|
||||||
CONFIG_COREBOOT_BUILD=y
|
|
||||||
CONFIG_LOCALVERSION=""
|
|
||||||
CONFIG_CBFS_PREFIX="fallback"
|
|
||||||
CONFIG_COMPILER_GCC=y
|
|
||||||
# CONFIG_COMPILER_LLVM_CLANG is not set
|
|
||||||
# CONFIG_ANY_TOOLCHAIN is not set
|
|
||||||
CONFIG_CCACHE=y
|
|
||||||
# CONFIG_FMD_GENPARSER is not set
|
|
||||||
# CONFIG_UTIL_GENPARSER is not set
|
|
||||||
CONFIG_USE_OPTION_TABLE=y
|
|
||||||
# CONFIG_STATIC_OPTION_TABLE is not set
|
|
||||||
CONFIG_COMPRESS_RAMSTAGE=y
|
|
||||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
|
||||||
CONFIG_COLLECT_TIMESTAMPS=y
|
|
||||||
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
|
|
||||||
CONFIG_USE_BLOBS=y
|
|
||||||
# CONFIG_USE_AMD_BLOBS is not set
|
|
||||||
# CONFIG_USE_QC_BLOBS is not set
|
|
||||||
# CONFIG_COVERAGE is not set
|
|
||||||
# CONFIG_UBSAN is not set
|
|
||||||
# CONFIG_NO_STAGE_CACHE is not set
|
|
||||||
CONFIG_TSEG_STAGE_CACHE=y
|
|
||||||
# CONFIG_UPDATE_IMAGE is not set
|
|
||||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
|
||||||
# CONFIG_FW_CONFIG is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Mainboard
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# Important: Run 'make distclean' before switching boards
|
|
||||||
#
|
|
||||||
# CONFIG_VENDOR_51NB is not set
|
|
||||||
# CONFIG_VENDOR_ADLINK is not set
|
|
||||||
# CONFIG_VENDOR_AMD is not set
|
|
||||||
# CONFIG_VENDOR_AOPEN is not set
|
|
||||||
# CONFIG_VENDOR_APPLE is not set
|
|
||||||
# CONFIG_VENDOR_ASROCK is not set
|
|
||||||
# CONFIG_VENDOR_ASUS is not set
|
|
||||||
# CONFIG_VENDOR_BAP is not set
|
|
||||||
# CONFIG_VENDOR_BIOSTAR is not set
|
|
||||||
# CONFIG_VENDOR_CAVIUM is not set
|
|
||||||
# CONFIG_VENDOR_COMPULAB is not set
|
|
||||||
# CONFIG_VENDOR_DELL is not set
|
|
||||||
# CONFIG_VENDOR_ELMEX is not set
|
|
||||||
# CONFIG_VENDOR_EMULATION is not set
|
|
||||||
# CONFIG_VENDOR_FACEBOOK is not set
|
|
||||||
# CONFIG_VENDOR_FOXCONN is not set
|
|
||||||
# CONFIG_VENDOR_GETAC is not set
|
|
||||||
# CONFIG_VENDOR_GIGABYTE is not set
|
|
||||||
# CONFIG_VENDOR_GIZMOSPHERE is not set
|
|
||||||
# CONFIG_VENDOR_GOOGLE is not set
|
|
||||||
# CONFIG_VENDOR_HP is not set
|
|
||||||
# CONFIG_VENDOR_IBASE is not set
|
|
||||||
# CONFIG_VENDOR_INTEL is not set
|
|
||||||
# CONFIG_VENDOR_JETWAY is not set
|
|
||||||
# CONFIG_VENDOR_KONTRON is not set
|
|
||||||
# CONFIG_VENDOR_LENOVO is not set
|
|
||||||
# CONFIG_VENDOR_LIBRETREND is not set
|
|
||||||
# CONFIG_VENDOR_LIPPERT is not set
|
|
||||||
# CONFIG_VENDOR_MSI is not set
|
|
||||||
# CONFIG_VENDOR_OCP is not set
|
|
||||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
|
||||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
|
||||||
# CONFIG_VENDOR_PCENGINES is not set
|
|
||||||
# CONFIG_VENDOR_PORTWELL is not set
|
|
||||||
# CONFIG_VENDOR_PRODRIVE is not set
|
|
||||||
# CONFIG_VENDOR_PROTECTLI is not set
|
|
||||||
# CONFIG_VENDOR_PURISM is not set
|
|
||||||
# CONFIG_VENDOR_RAZER is not set
|
|
||||||
# CONFIG_VENDOR_RODA is not set
|
|
||||||
# CONFIG_VENDOR_SAMSUNG is not set
|
|
||||||
# CONFIG_VENDOR_SAPPHIRE is not set
|
|
||||||
# CONFIG_VENDOR_SCALEWAY is not set
|
|
||||||
# CONFIG_VENDOR_SIEMENS is not set
|
|
||||||
# CONFIG_VENDOR_SIFIVE is not set
|
|
||||||
# CONFIG_VENDOR_SUPERMICRO is not set
|
|
||||||
CONFIG_VENDOR_SYSTEM76=y
|
CONFIG_VENDOR_SYSTEM76=y
|
||||||
# CONFIG_VENDOR_TI is not set
|
CONFIG_BOARD_SYSTEM76_DARP6=y
|
||||||
# CONFIG_VENDOR_UP is not set
|
CONFIG_CCACHE=y
|
||||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
CONFIG_CONSOLE_SERIAL=n
|
||||||
CONFIG_MAINBOARD_PART_NUMBER="darp6"
|
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
||||||
CONFIG_MAINBOARD_VERSION="darp6"
|
CONFIG_HAVE_IFD_BIN=y
|
||||||
CONFIG_MAINBOARD_DIR="system76/cml-u"
|
CONFIG_HAVE_ME_BIN=y
|
||||||
CONFIG_MAX_CPUS=8
|
|
||||||
CONFIG_VGA_BIOS_ID="8086,9b41"
|
|
||||||
CONFIG_DIMM_MAX=2
|
|
||||||
CONFIG_DIMM_SPD_SIZE=512
|
|
||||||
CONFIG_FMDFILE=""
|
|
||||||
# CONFIG_NO_POST is not set
|
|
||||||
CONFIG_MAINBOARD_VENDOR="System76"
|
|
||||||
CONFIG_ONBOARD_VGA_IS_PRIMARY=y
|
|
||||||
# CONFIG_VGA_BIOS is not set
|
|
||||||
CONFIG_CBFS_SIZE=0xA00000
|
|
||||||
CONFIG_VARIANT_DIR="darp6"
|
|
||||||
CONFIG_DEVICETREE="devicetree.cb"
|
|
||||||
CONFIG_VGA_BIOS_FILE="pci8086,9b41.rom"
|
|
||||||
CONFIG_C_ENV_BOOTBLOCK_SIZE=0xC000
|
|
||||||
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="System76"
|
|
||||||
CONFIG_INTEL_GMA_VBT_FILE="$(FIRMWARE_OPEN_MODEL_DIR)/vbt.rom"
|
|
||||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xe00
|
|
||||||
# CONFIG_POST_IO is not set
|
|
||||||
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
|
|
||||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
|
||||||
CONFIG_UART_FOR_CONSOLE=2
|
|
||||||
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
|
|
||||||
# CONFIG_VBOOT is not set
|
|
||||||
CONFIG_DCACHE_RAM_BASE=0xfef00000
|
|
||||||
CONFIG_DCACHE_RAM_SIZE=0x40000
|
|
||||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x20400
|
|
||||||
CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
|
|
||||||
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
|
|
||||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
|
||||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
|
||||||
# CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS is not set
|
|
||||||
CONFIG_TPM_INIT=y
|
|
||||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
|
||||||
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
||||||
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
||||||
# CONFIG_CONSOLE_SERIAL is not set
|
CONFIG_PAYLOAD_ELF=y
|
||||||
CONFIG_TPM_PIRQ=0x0
|
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
||||||
CONFIG_PCIEXP_HOTPLUG_BUSES=32
|
|
||||||
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
|
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
|
||||||
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
|
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
|
||||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Darter Pro"
|
CONFIG_POST_IO=n
|
||||||
CONFIG_HAVE_IFD_BIN=y
|
|
||||||
CONFIG_ADD_FSP_BINARIES=y
|
|
||||||
CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
|
|
||||||
CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
|
|
||||||
CONFIG_FSP_S_CBFS="fsps.bin"
|
|
||||||
CONFIG_FSP_M_CBFS="fspm.bin"
|
|
||||||
CONFIG_PS2K_EISAID="PNP0303"
|
|
||||||
CONFIG_PS2M_EISAID="PNP0F13"
|
|
||||||
CONFIG_PCIEXP_L1_SUB_STATE=y
|
|
||||||
CONFIG_PCIEXP_CLK_PM=y
|
|
||||||
CONFIG_CONSOLE_POST=y
|
|
||||||
CONFIG_PXE_ROM_ID="10ec,8168"
|
|
||||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
|
||||||
CONFIG_HEAP_SIZE=0x8000
|
|
||||||
# CONFIG_POST_DEVICE is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_ADDW1 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_ADDW2 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_BONW14 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP4 is not set
|
|
||||||
CONFIG_BOARD_SYSTEM76_DARP6=y
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_15 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1650_17 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_15 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE14_1660TI_17 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GAZE15 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP2 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP3 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP3_B is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_LEMP9 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_ORYP5 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_ORYP6 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_THELIO_B1 is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_GALP3_C is not set
|
|
||||||
# CONFIG_BOARD_SYSTEM76_DARP5 is not set
|
|
||||||
CONFIG_FSP_HEADER_PATH="3rdparty/fsp/CometLakeFspBinPkg/CometLake1/Include/"
|
|
||||||
CONFIG_FSP_FD_PATH="3rdparty/fsp/CometLakeFspBinPkg/CometLake1/FSP.fd"
|
|
||||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x1558
|
|
||||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x1404
|
|
||||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
|
||||||
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
|
|
||||||
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
|
||||||
CONFIG_COREBOOT_ROMSIZE_KB=16384
|
|
||||||
CONFIG_ROM_SIZE=0x01000000
|
|
||||||
CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
|
|
||||||
CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
|
|
||||||
CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
|
|
||||||
# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
|
|
||||||
CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
|
|
||||||
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
|
|
||||||
CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
|
|
||||||
CONFIG_SYSTEM_TYPE_LAPTOP=y
|
|
||||||
# CONFIG_SYSTEM_TYPE_TABLET is not set
|
|
||||||
# CONFIG_SYSTEM_TYPE_DETACHABLE is not set
|
|
||||||
# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set
|
|
||||||
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Chipset
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# SoC
|
|
||||||
#
|
|
||||||
CONFIG_CPU_SPECIFIC_OPTIONS=y
|
|
||||||
CONFIG_X86_RESET_VECTOR=0xfffffff0
|
|
||||||
CONFIG_ROMSTAGE_ADDR=0x2000000
|
|
||||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
|
||||||
CONFIG_RAMBASE=0xe00000
|
|
||||||
CONFIG_CPU_ADDR_BITS=36
|
|
||||||
# CONFIG_CHECK_REV_IN_OPROM_NAME is not set
|
|
||||||
CONFIG_CONSOLE_UART_BASE_ADDRESS=0xfe032000
|
|
||||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
|
||||||
CONFIG_SMM_RESERVED_SIZE=0x200000
|
|
||||||
CONFIG_SMM_MODULE_STACK_SIZE=0x800
|
|
||||||
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
|
|
||||||
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=216
|
|
||||||
CONFIG_FSP_TEMP_RAM_SIZE=0x10000
|
|
||||||
# CONFIG_SOC_CAVIUM_CN81XX is not set
|
|
||||||
CONFIG_ARCH_ARMV8_EXTENSION=0
|
|
||||||
CONFIG_STACK_SIZE=0x1000
|
|
||||||
# CONFIG_SOC_CAVIUM_COMMON is not set
|
|
||||||
# CONFIG_SOC_INTEL_GLK is not set
|
|
||||||
CONFIG_PCR_BASE_ADDRESS=0xfd000000
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
|
|
||||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
|
||||||
# CONFIG_NHLT_DMIC_1CH_16B is not set
|
|
||||||
# CONFIG_NHLT_DMIC_2CH_16B is not set
|
|
||||||
# CONFIG_NHLT_DMIC_4CH_16B is not set
|
|
||||||
# CONFIG_NHLT_MAX98357 is not set
|
|
||||||
# CONFIG_NHLT_DA7219 is not set
|
|
||||||
CONFIG_IFD_CHIPSET="cnl"
|
|
||||||
CONFIG_CPU_BCLK_MHZ=100
|
|
||||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
|
|
||||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=3
|
|
||||||
CONFIG_SOC_INTEL_I2C_DEV_MAX=6
|
|
||||||
CONFIG_PCIEXP_ASPM=y
|
|
||||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
|
||||||
CONFIG_IED_REGION_SIZE=0x400000
|
|
||||||
CONFIG_SOC_INTEL_CANNONLAKE_BASE=y
|
|
||||||
CONFIG_SOC_INTEL_CANNONLAKE_ALTERNATE_HEADERS=y
|
|
||||||
CONFIG_SOC_INTEL_COMETLAKE=y
|
|
||||||
# CONFIG_NHLT_MAX98373 is not set
|
|
||||||
CONFIG_MAX_ROOT_PORTS=16
|
|
||||||
CONFIG_MAX_PCIE_CLOCKS=6
|
|
||||||
# CONFIG_MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE is not set
|
|
||||||
CONFIG_USE_CANNONLAKE_CAR_NEM_ENHANCED=y
|
|
||||||
# CONFIG_USE_CANNONLAKE_FSP_CAR is not set
|
|
||||||
CONFIG_SOC_INTEL_CANNONLAKE_DEBUG_CONSENT=0
|
|
||||||
CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
|
|
||||||
CONFIG_UART_PCI_ADDR=0x0
|
|
||||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Intel SoC Common Code
|
|
||||||
#
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
|
|
||||||
# CONFIG_INTEL_CAR_NEM is not set
|
|
||||||
# CONFIG_INTEL_CAR_CQOS is not set
|
|
||||||
CONFIG_INTEL_CAR_NEM_ENHANCED=y
|
|
||||||
# CONFIG_USE_INTEL_FSP_MP_INIT is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_DTT is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
|
|
||||||
CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
|
|
||||||
CONFIG_SOC_INTEL_CONFIGURE_DDI_A_4_LANES=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_IMC is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
|
|
||||||
# CONFIG_PMC_INVALID_READ_AFTER_WRITE is not set
|
|
||||||
CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_MMC_OVERRIDE is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_MAX is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_256MB is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_128MB is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_64MB is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_32MB is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_SIZE_1MB is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_PRMRR_DISABLED=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_ESPI_DISABLE is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
|
|
||||||
# CONFIG_HECI_DISABLE_USING_SMM is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
|
|
||||||
CONFIG_SA_PCIEX_LENGTH=0x10000000
|
|
||||||
# CONFIG_SA_ENABLE_IMR is not set
|
|
||||||
# CONFIG_SA_ENABLE_DPR is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
|
|
||||||
CONFIG_USE_LEGACY_8254_TIMER=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
|
|
||||||
CONFIG_INTEL_LPSS_UART_FOR_CONSOLE=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Intel SoC Common PCH Code
|
|
||||||
#
|
|
||||||
CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
|
|
||||||
CONFIG_PCH_SPECIFIC_OPTIONS=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Intel SoC Common coreboot stages
|
|
||||||
#
|
|
||||||
CONFIG_SOC_INTEL_COMMON_RESET=y
|
|
||||||
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
|
|
||||||
# CONFIG_ACPI_CONSOLE is not set
|
|
||||||
# CONFIG_SOC_INTEL_COMMON_ACPI is not set
|
|
||||||
CONFIG_SOC_INTEL_COMMON_NHLT=y
|
|
||||||
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
|
|
||||||
# CONFIG_SOC_MEDIATEK_MT8173 is not set
|
|
||||||
# CONFIG_SOC_MEDIATEK_MT8183 is not set
|
|
||||||
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
|
|
||||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
|
||||||
# CONFIG_SOC_QUALCOMM_COMMON is not set
|
|
||||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
|
||||||
# CONFIG_SOC_QC_IPQ806X is not set
|
|
||||||
# CONFIG_SOC_QUALCOMM_QCS405 is not set
|
|
||||||
# CONFIG_SOC_QUALCOMM_SC7180 is not set
|
|
||||||
# CONFIG_SOC_QUALCOMM_SDM845 is not set
|
|
||||||
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
|
|
||||||
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
|
|
||||||
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
|
|
||||||
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
|
|
||||||
# CONFIG_SOC_UCB_RISCV is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# CPU
|
|
||||||
#
|
|
||||||
# CONFIG_CPU_AMD_AGESA is not set
|
|
||||||
# CONFIG_CPU_AMD_PI is not set
|
|
||||||
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
|
|
||||||
CONFIG_SSE2=y
|
|
||||||
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
|
|
||||||
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
|
|
||||||
CONFIG_CPU_INTEL_COMMON=y
|
|
||||||
CONFIG_ENABLE_VMX=y
|
|
||||||
CONFIG_SET_IA32_FC_LOCK_BIT=y
|
|
||||||
CONFIG_CPU_INTEL_COMMON_SMM=y
|
|
||||||
CONFIG_MICROCODE_UPDATE_PRE_RAM=y
|
|
||||||
# CONFIG_CPU_TI_AM335X is not set
|
|
||||||
# CONFIG_PARALLEL_CPU_INIT is not set
|
|
||||||
CONFIG_PARALLEL_MP=y
|
|
||||||
CONFIG_PARALLEL_MP_AP_WORK=y
|
|
||||||
# CONFIG_UDELAY_LAPIC is not set
|
|
||||||
CONFIG_UDELAY_TSC=y
|
|
||||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
|
||||||
# CONFIG_TSC_SYNC_LFENCE is not set
|
|
||||||
# CONFIG_TSC_SYNC_MFENCE is not set
|
|
||||||
CONFIG_LOGICAL_CPUS=y
|
|
||||||
CONFIG_HAVE_SMI_HANDLER=y
|
|
||||||
# CONFIG_NO_SMM is not set
|
|
||||||
# CONFIG_SMM_ASEG is not set
|
|
||||||
CONFIG_SMM_TSEG=y
|
|
||||||
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
|
|
||||||
CONFIG_SMM_STUB_STACK_SIZE=0x400
|
|
||||||
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
|
|
||||||
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
|
|
||||||
# CONFIG_X86_AMD_FIXED_MTRRS is not set
|
|
||||||
# CONFIG_X86_AMD_INIT_SIPI is not set
|
|
||||||
# CONFIG_SOC_SETS_MSRS is not set
|
|
||||||
CONFIG_SMP=y
|
|
||||||
CONFIG_SSE=y
|
|
||||||
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
|
||||||
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
|
|
||||||
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
|
|
||||||
# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
|
|
||||||
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
|
|
||||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
|
||||||
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
|
||||||
CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
|
|
||||||
|
|
||||||
#
|
|
||||||
# Northbridge
|
|
||||||
#
|
|
||||||
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
|
|
||||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
|
||||||
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
|
|
||||||
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
|
|
||||||
|
|
||||||
#
|
|
||||||
# Southbridge
|
|
||||||
#
|
|
||||||
# CONFIG_AMD_SB_CIMX is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
|
|
||||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7 is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9 is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_SILVERMONT is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
|
|
||||||
# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
|
|
||||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG is not set
|
|
||||||
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
|
|
||||||
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
|
|
||||||
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Super I/O
|
|
||||||
#
|
|
||||||
# CONFIG_SUPERIO_ASPEED_AST2400 is not set
|
|
||||||
# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
|
|
||||||
# CONFIG_SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND is not set
|
|
||||||
# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Embedded Controllers
|
|
||||||
#
|
|
||||||
# CONFIG_EC_51NB_NPCE985LA0DX is not set
|
|
||||||
# CONFIG_EC_GOOGLE_CHROMEEC_SKUID is not set
|
|
||||||
# CONFIG_EC_GOOGLE_WILCO is not set
|
|
||||||
CONFIG_EC_SYSTEM76_EC=y
|
|
||||||
CONFIG_EC_SYSTEM76_EC_BAT_THRESHOLDS=y
|
|
||||||
CONFIG_EC_SYSTEM76_EC_COLOR_KEYBOARD=y
|
|
||||||
# CONFIG_EC_SYSTEM76_EC_DGPU is not set
|
|
||||||
# CONFIG_EC_SYSTEM76_EC_OLED is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Intel Firmware
|
|
||||||
#
|
|
||||||
CONFIG_HAVE_ME_BIN=y
|
|
||||||
# CONFIG_MAINBOARD_USES_IFD_GBE_REGION is not set
|
|
||||||
# CONFIG_MAINBOARD_USES_IFD_EC_REGION is not set
|
|
||||||
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
|
|
||||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
|
||||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
|
||||||
# CONFIG_CAVIUM_BDK is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
|
|
||||||
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
|
|
||||||
# CONFIG_UEFI_2_4_BINDING is not set
|
|
||||||
# CONFIG_UDK_2015_BINDING is not set
|
|
||||||
CONFIG_UDK_2017_BINDING=y
|
|
||||||
# CONFIG_UDK_202005_BINDING is not set
|
|
||||||
CONFIG_UDK_2013_VERSION=2013
|
|
||||||
CONFIG_UDK_2015_VERSION=2015
|
|
||||||
CONFIG_UDK_2017_VERSION=2017
|
|
||||||
CONFIG_UDK_202005_VERSION=202005
|
|
||||||
CONFIG_UDK_VERSION=2017
|
|
||||||
# CONFIG_USE_SIEMENS_HWILIB is not set
|
|
||||||
# CONFIG_ARM_LPAE is not set
|
|
||||||
CONFIG_ARCH_X86=y
|
|
||||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
|
||||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
|
||||||
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
|
||||||
CONFIG_ARCH_POSTCAR_X86_32=y
|
|
||||||
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
|
||||||
# CONFIG_ARCH_POSTCAR_X86_64 is not set
|
|
||||||
# CONFIG_USE_MARCH_586 is not set
|
|
||||||
# CONFIG_AP_IN_SIPI_WAIT is not set
|
|
||||||
# CONFIG_SIPI_VECTOR_IN_ROM is not set
|
|
||||||
CONFIG_RAMTOP=0x1000000
|
|
||||||
CONFIG_NUM_IPI_STARTS=2
|
|
||||||
CONFIG_PC80_SYSTEM=y
|
|
||||||
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
|
|
||||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
|
||||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
|
||||||
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
|
|
||||||
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
|
|
||||||
# CONFIG_HPET_ADDRESS_OVERRIDE is not set
|
|
||||||
CONFIG_HPET_ADDRESS=0xfed00000
|
|
||||||
CONFIG_ID_SECTION_OFFSET=0x80
|
|
||||||
CONFIG_POSTCAR_STAGE=y
|
|
||||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
|
||||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
|
||||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
|
||||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
|
||||||
# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
|
|
||||||
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
|
||||||
# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
|
|
||||||
CONFIG_IDT_IN_EVERY_STAGE=y
|
|
||||||
CONFIG_HAVE_CF9_RESET=y
|
|
||||||
# CONFIG_PIRQ_ROUTE is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Devices
|
|
||||||
#
|
|
||||||
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
|
||||||
CONFIG_HAVE_FSP_GOP=y
|
|
||||||
# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
|
|
||||||
# CONFIG_VGA_ROM_RUN is not set
|
|
||||||
CONFIG_RUN_FSP_GOP=y
|
CONFIG_RUN_FSP_GOP=y
|
||||||
# CONFIG_NO_GFX_INIT is not set
|
|
||||||
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Display
|
|
||||||
#
|
|
||||||
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
|
|
||||||
CONFIG_LINEAR_FRAMEBUFFER=y
|
|
||||||
# CONFIG_BOOTSPLASH is not set
|
|
||||||
CONFIG_PCI=y
|
|
||||||
# CONFIG_NO_MMCONF_SUPPORT is not set
|
|
||||||
CONFIG_MMCONF_SUPPORT=y
|
|
||||||
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
|
|
||||||
CONFIG_HT_CHAIN_UNITID_BASE=0
|
|
||||||
CONFIG_HT_CHAIN_END_UNITID_BASE=0
|
|
||||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
|
||||||
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
|
||||||
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
|
|
||||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
|
||||||
CONFIG_PCIEXP_HOTPLUG=y
|
|
||||||
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G is not set
|
|
||||||
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G=y
|
|
||||||
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
|
|
||||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
|
||||||
CONFIG_INTEL_GMA_HAVE_VBT=y
|
|
||||||
CONFIG_INTEL_GMA_ADD_VBT=y
|
|
||||||
# CONFIG_SOFTWARE_I2C is not set
|
|
||||||
# CONFIG_RESOURCE_ALLOCATOR_V3 is not set
|
|
||||||
CONFIG_RESOURCE_ALLOCATOR_V4=y
|
|
||||||
# CONFIG_XHCI_UTILS is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Generic Drivers
|
|
||||||
#
|
|
||||||
# CONFIG_DRIVERS_AS3722_RTC is not set
|
|
||||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
|
||||||
# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
|
|
||||||
# CONFIG_ELOG is not set
|
|
||||||
# CONFIG_GIC is not set
|
|
||||||
# CONFIG_IPMI_KCS is not set
|
|
||||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
|
||||||
CONFIG_CACHE_MRC_SETTINGS=y
|
|
||||||
CONFIG_MRC_SETTINGS_PROTECT=y
|
|
||||||
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
|
|
||||||
# CONFIG_MRC_SETTINGS_VARIABLE_DATA is not set
|
|
||||||
# CONFIG_MRC_WRITE_NV_LATE is not set
|
|
||||||
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
|
|
||||||
# CONFIG_RT8168_SUPPORT_LEGACY_VPD_MAC is not set
|
|
||||||
# CONFIG_RT8168_SET_LED_MODE is not set
|
|
||||||
CONFIG_SMMSTORE=y
|
CONFIG_SMMSTORE=y
|
||||||
# CONFIG_SMMSTORE_IN_CBFS is not set
|
CONFIG_SMMSTORE_V2=y
|
||||||
CONFIG_SMMSTORE_REGION="SMMSTORE"
|
CONFIG_USE_OPTION_TABLE=y
|
||||||
CONFIG_SMMSTORE_FILENAME="smm_store"
|
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
||||||
CONFIG_SMMSTORE_SIZE=0x40000
|
#CONFIG_CONSOLE_SYSTEM76_EC=y
|
||||||
CONFIG_SPI_FLASH=y
|
|
||||||
# CONFIG_SPI_SDCARD is not set
|
|
||||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
|
||||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
|
|
||||||
CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
|
|
||||||
CONFIG_SPI_FLASH_SMM=y
|
|
||||||
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
|
||||||
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
|
|
||||||
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
|
|
||||||
CONFIG_DRIVERS_UART=y
|
|
||||||
CONFIG_NO_UART_ON_SUPERIO=y
|
|
||||||
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
|
|
||||||
# CONFIG_UART_OVERRIDE_REFCLK is not set
|
|
||||||
CONFIG_DRIVERS_UART_8250MEM=y
|
|
||||||
CONFIG_DRIVERS_UART_8250MEM_32=y
|
|
||||||
# CONFIG_HAVE_UART_SPECIAL is not set
|
|
||||||
# CONFIG_DRIVERS_UART_PL011 is not set
|
|
||||||
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
|
|
||||||
# CONFIG_HAVE_USBDEBUG is not set
|
|
||||||
# CONFIG_HAVE_USBDEBUG_OPTIONS is not set
|
|
||||||
# CONFIG_VPD is not set
|
|
||||||
CONFIG_DRIVERS_GENERIC_WIFI=y
|
|
||||||
# CONFIG_USE_SAR is not set
|
|
||||||
# CONFIG_DRIVERS_AMD_PI is not set
|
|
||||||
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
|
||||||
# CONFIG_DRIVERS_GFX_GENERIC is not set
|
|
||||||
CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
|
||||||
# CONFIG_DRIVERS_I2C_DESIGNWARE_DEBUG is not set
|
|
||||||
CONFIG_DRIVERS_I2C_GENERIC=y
|
|
||||||
CONFIG_DRIVERS_I2C_HID=y
|
|
||||||
# CONFIG_DRIVERS_I2C_MAX98373 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_MAX98390 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_MAX98927 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_PCA9538 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_PCF8523 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_PTN3460 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_RT1011 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_RT5663 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_RTD2132 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_RX6110SA is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_SX9310 is not set
|
|
||||||
# CONFIG_DRIVERS_I2C_TAS5825M is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
|
|
||||||
# CONFIG_DRIVERS_INTEL_DPTF is not set
|
|
||||||
CONFIG_FSP_USE_REPO=y
|
|
||||||
# CONFIG_DISPLAY_HOBS is not set
|
|
||||||
# CONFIG_DISPLAY_UPD_DATA is not set
|
|
||||||
CONFIG_PLATFORM_USES_FSP2_0=y
|
|
||||||
# CONFIG_PLATFORM_USES_FSP2_1 is not set
|
|
||||||
# CONFIG_PLATFORM_USES_FSP2_2 is not set
|
|
||||||
CONFIG_HAVE_INTEL_FSP_REPO=y
|
|
||||||
# CONFIG_FSP_CAR is not set
|
|
||||||
CONFIG_FSP_M_XIP=y
|
|
||||||
# CONFIG_FSP_T_XIP is not set
|
|
||||||
CONFIG_FSP_USES_CB_STACK=y
|
|
||||||
CONFIG_HAVE_FSP_LOGO_SUPPORT=y
|
|
||||||
# CONFIG_FSP2_0_DISPLAY_LOGO is not set
|
|
||||||
CONFIG_FSP_COMPRESS_FSP_S_LZMA=y
|
|
||||||
# CONFIG_INTEL_DDI is not set
|
|
||||||
# CONFIG_INTEL_EDID is not set
|
|
||||||
# CONFIG_INTEL_INT15 is not set
|
|
||||||
CONFIG_INTEL_GMA_ACPI=y
|
|
||||||
CONFIG_INTEL_GMA_BCLV_WIDTH=16
|
|
||||||
CONFIG_INTEL_GMA_BCLM_WIDTH=16
|
|
||||||
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
|
|
||||||
# CONFIG_INTEL_GMA_SWSMISCI is not set
|
|
||||||
# CONFIG_DRIVER_INTEL_I210 is not set
|
|
||||||
# CONFIG_DRIVERS_INTEL_ISH is not set
|
|
||||||
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
|
|
||||||
# CONFIG_DRIVERS_INTEL_PMC is not set
|
|
||||||
# CONFIG_HAVE_INTEL_PTT is not set
|
|
||||||
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
|
|
||||||
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
|
|
||||||
CONFIG_FRU_DEVICE_ID=0
|
|
||||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
|
||||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
|
||||||
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
|
||||||
CONFIG_DRIVERS_MC146818=y
|
|
||||||
CONFIG_MAINBOARD_HAS_LPC_TPM=y
|
|
||||||
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
|
||||||
# CONFIG_DRIVERS_RICOH_RCE822 is not set
|
|
||||||
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
|
|
||||||
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
|
|
||||||
# CONFIG_DRIVERS_SIL_3114 is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
|
|
||||||
# CONFIG_MAINBOARD_HAS_SPI_TPM is not set
|
|
||||||
# CONFIG_DRIVERS_SYSTEM76_DGPU is not set
|
|
||||||
# CONFIG_DRIVER_TI_TPS65090 is not set
|
|
||||||
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
|
|
||||||
# CONFIG_DRIVERS_USB_ACPI is not set
|
|
||||||
# CONFIG_DRIVERS_USB_PCI_XHCI is not set
|
|
||||||
# CONFIG_COMMONLIB_STORAGE is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Security
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# Verified Boot (vboot)
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# Trusted Platform Module
|
|
||||||
#
|
|
||||||
CONFIG_TPM2=y
|
|
||||||
CONFIG_MAINBOARD_HAS_TPM2=y
|
|
||||||
# CONFIG_DEBUG_TPM is not set
|
|
||||||
CONFIG_TPM_RDRESP_NEED_DELAY=y
|
|
||||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Memory initialization
|
|
||||||
#
|
|
||||||
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
|
|
||||||
# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
|
|
||||||
# CONFIG_INTEL_TXT is not set
|
|
||||||
# CONFIG_STM is not set
|
|
||||||
CONFIG_BOOTMEDIA_LOCK_NONE=y
|
|
||||||
# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
|
|
||||||
# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
|
|
||||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
|
||||||
CONFIG_ACPI_HAVE_PCAT_8259=y
|
|
||||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
|
||||||
CONFIG_HAVE_ACPI_TABLES=y
|
|
||||||
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
|
|
||||||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|
||||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
|
||||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
|
||||||
CONFIG_RTC=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Console
|
|
||||||
#
|
|
||||||
CONFIG_BOOTBLOCK_CONSOLE=y
|
|
||||||
CONFIG_POSTCAR_CONSOLE=y
|
|
||||||
CONFIG_SQUELCH_EARLY_SMP=y
|
|
||||||
CONFIG_FIXED_UART_FOR_CONSOLE=y
|
|
||||||
# CONFIG_SPKMODEM is not set
|
|
||||||
# CONFIG_CONSOLE_NE2K is not set
|
|
||||||
CONFIG_CONSOLE_CBMEM=y
|
|
||||||
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
|
|
||||||
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
|
|
||||||
# CONFIG_CONSOLE_SPI_FLASH is not set
|
|
||||||
# CONFIG_CONSOLE_SYSTEM76_EC is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
|
|
||||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
|
||||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
|
||||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
|
|
||||||
# CONFIG_CMOS_POST is not set
|
|
||||||
# CONFIG_DEFAULT_POST_ON_LPC is not set
|
|
||||||
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
|
|
||||||
CONFIG_HWBASE_DEBUG_CB=y
|
|
||||||
CONFIG_HAVE_ACPI_RESUME=y
|
|
||||||
# CONFIG_DISABLE_ACPI_HIBERNATE is not set
|
|
||||||
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
|
||||||
# CONFIG_NO_MONOTONIC_TIMER is not set
|
|
||||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
|
||||||
# CONFIG_TIMER_QUEUE is not set
|
|
||||||
CONFIG_HAVE_OPTION_TABLE=y
|
|
||||||
# CONFIG_PCI_IO_CFG_EXT is not set
|
|
||||||
CONFIG_IOAPIC=y
|
|
||||||
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
|
|
||||||
# CONFIG_GFXUMA is not set
|
|
||||||
CONFIG_ACPI_NHLT=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# System tables
|
|
||||||
#
|
|
||||||
# CONFIG_GENERATE_MP_TABLE is not set
|
|
||||||
# CONFIG_GENERATE_PIRQ_TABLE is not set
|
|
||||||
CONFIG_GENERATE_SMBIOS_TABLES=y
|
|
||||||
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
|
|
||||||
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
|
|
||||||
|
|
||||||
#
|
|
||||||
# Payload
|
|
||||||
#
|
|
||||||
# CONFIG_PAYLOAD_NONE is not set
|
|
||||||
CONFIG_PAYLOAD_ELF=y
|
|
||||||
# CONFIG_PAYLOAD_FILO is not set
|
|
||||||
# CONFIG_PAYLOAD_GRUB2 is not set
|
|
||||||
# CONFIG_PAYLOAD_LINUXBOOT is not set
|
|
||||||
# CONFIG_PAYLOAD_SEABIOS is not set
|
|
||||||
# CONFIG_PAYLOAD_UBOOT is not set
|
|
||||||
# CONFIG_PAYLOAD_YABITS is not set
|
|
||||||
# CONFIG_PAYLOAD_LINUX is not set
|
|
||||||
# CONFIG_PAYLOAD_TIANOCORE is not set
|
|
||||||
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
|
||||||
CONFIG_PAYLOAD_OPTIONS=""
|
|
||||||
# CONFIG_PXE is not set
|
|
||||||
# CONFIG_COMPRESSED_PAYLOAD_NONE is not set
|
|
||||||
CONFIG_COMPRESSED_PAYLOAD_LZMA=y
|
|
||||||
# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set
|
|
||||||
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
|
|
||||||
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# Secondary Payloads
|
|
||||||
#
|
|
||||||
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
|
|
||||||
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
|
|
||||||
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
|
|
||||||
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# Debugging
|
|
||||||
#
|
|
||||||
|
|
||||||
#
|
|
||||||
# CPU Debug Settings
|
|
||||||
#
|
|
||||||
CONFIG_HAVE_DISPLAY_MTRRS=y
|
|
||||||
# CONFIG_DISPLAY_MTRRS is not set
|
|
||||||
|
|
||||||
#
|
|
||||||
# BLOB Debug Settings
|
|
||||||
#
|
|
||||||
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
|
|
||||||
# CONFIG_DISPLAY_FSP_HEADER is not set
|
|
||||||
# CONFIG_VERIFY_HOBS is not set
|
|
||||||
CONFIG_DISPLAY_FSP_VERSION_INFO=y
|
|
||||||
|
|
||||||
#
|
|
||||||
# General Debug Settings
|
|
||||||
#
|
|
||||||
# CONFIG_GDB_STUB is not set
|
|
||||||
# CONFIG_FATAL_ASSERTS is not set
|
|
||||||
CONFIG_HAVE_DEBUG_GPIO=y
|
|
||||||
# CONFIG_DEBUG_GPIO is not set
|
|
||||||
# CONFIG_DEBUG_CBFS is not set
|
|
||||||
# CONFIG_HAVE_DEBUG_RAM_SETUP is not set
|
|
||||||
CONFIG_HAVE_DEBUG_SMBUS=y
|
|
||||||
# CONFIG_DEBUG_SMBUS is not set
|
|
||||||
# CONFIG_DEBUG_SMI is not set
|
|
||||||
# CONFIG_DEBUG_MALLOC is not set
|
|
||||||
# CONFIG_DEBUG_CONSOLE_INIT is not set
|
|
||||||
# CONFIG_DEBUG_SPI_FLASH is not set
|
|
||||||
# CONFIG_TRACE is not set
|
|
||||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
|
||||||
# CONFIG_DEBUG_ADA_CODE is not set
|
|
||||||
CONFIG_HAVE_EM100_SUPPORT=y
|
|
||||||
# CONFIG_EM100 is not set
|
|
||||||
CONFIG_NO_EDID_FILL_FB=y
|
|
||||||
CONFIG_SPD_READ_BY_WORD=y
|
|
||||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
|
||||||
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
|
|
||||||
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
|
|
||||||
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
|
|
||||||
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
|
|
||||||
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
|
|
||||||
CONFIG_REG_SCRIPT=y
|
|
||||||
CONFIG_MAX_REBOOT_CNT=3
|
|
||||||
# CONFIG_NO_XIP_EARLY_STAGES is not set
|
|
||||||
# CONFIG_EARLY_CBMEM_LIST is not set
|
|
||||||
CONFIG_RELOCATABLE_MODULES=y
|
|
||||||
CONFIG_GENERIC_GPIO_LIB=y
|
|
||||||
CONFIG_HAVE_BOOTBLOCK=y
|
|
||||||
CONFIG_HAVE_ROMSTAGE=y
|
|
||||||
CONFIG_HAVE_RAMSTAGE=y
|
|
||||||
|
9
models/darp6/edk2.config
Normal file
9
models/darp6/edk2.config
Normal file
@@ -0,0 +1,9 @@
|
|||||||
|
BOOTLOADER=COREBOOT
|
||||||
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
|
SHELL_TYPE=NONE
|
||||||
|
TPM_ENABLE=TRUE
|
||||||
|
#SYSTEM76_EC_LOGGING=TRUE
|
BIN
models/darp6/fd.rom
(Stored with Git LFS)
BIN
models/darp6/fd.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/darp6/me.rom
(Stored with Git LFS)
BIN
models/darp6/me.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/darp6/microcode.rom
(Stored with Git LFS)
BIN
models/darp6/microcode.rom
(Stored with Git LFS)
Binary file not shown.
BIN
models/darp7/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
BIN
models/darp7/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
Binary file not shown.
12
models/darp7/README.md
Normal file
12
models/darp7/README.md
Normal file
@@ -0,0 +1,12 @@
|
|||||||
|
# System76 Darter Pro (darp7)
|
||||||
|
|
||||||
|
## Contents
|
||||||
|
|
||||||
|
- [EC](./ec.rom)
|
||||||
|
- *Read Error: No such file or directory (os error 2)*
|
||||||
|
- [FD](./fd.rom)
|
||||||
|
- Size: 4 KB
|
||||||
|
- HAP: false
|
||||||
|
- [ME](./me.rom)
|
||||||
|
- Size: 5116 KB
|
||||||
|
- Version: 15.0.35.2039
|
1
models/darp7/README.md.in
Normal file
1
models/darp7/README.md.in
Normal file
@@ -0,0 +1 @@
|
|||||||
|
# System76 Darter Pro (darp7)
|
1
models/darp7/chip.txt
Normal file
1
models/darp7/chip.txt
Normal file
@@ -0,0 +1 @@
|
|||||||
|
GD25Q127C/GD25Q128C
|
256
models/darp7/coreboot-collector.txt
Normal file
256
models/darp7/coreboot-collector.txt
Normal file
@@ -0,0 +1,256 @@
|
|||||||
|
## PCI ##
|
||||||
|
PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0x9A14, Revision 0x01
|
||||||
|
PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0x9A49, Revision 0x01
|
||||||
|
PCI Device: 0000:00:04.0: Class 0x00118000, Vendor 0x8086, Device 0x9A03, Revision 0x01
|
||||||
|
PCI Device: 0000:00:06.0: Class 0x00060400, Vendor 0x8086, Device 0x9A09, Revision 0x01
|
||||||
|
PCI Device: 0000:00:07.0: Class 0x00060400, Vendor 0x8086, Device 0x9A23, Revision 0x01
|
||||||
|
PCI Device: 0000:00:0a.0: Class 0x00118000, Vendor 0x8086, Device 0x9A0D, Revision 0x01
|
||||||
|
PCI Device: 0000:00:0d.0: Class 0x000C0330, Vendor 0x8086, Device 0x9A13, Revision 0x01
|
||||||
|
PCI Device: 0000:00:0d.2: Class 0x000C0340, Vendor 0x8086, Device 0x9A1B, Revision 0x01
|
||||||
|
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0xA0ED, Revision 0x20
|
||||||
|
PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0xA0EF, Revision 0x20
|
||||||
|
PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0xA0F0, Revision 0x20
|
||||||
|
PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0xA0E8, Revision 0x20
|
||||||
|
PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0xA0E9, Revision 0x20
|
||||||
|
PCI Device: 0000:00:15.2: Class 0x000C8000, Vendor 0x8086, Device 0xA0EA, Revision 0x20
|
||||||
|
PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0xA0E0, Revision 0x20
|
||||||
|
PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0xA0BD, Revision 0x20
|
||||||
|
PCI Device: 0000:00:1c.6: Class 0x00060400, Vendor 0x8086, Device 0xA0BE, Revision 0x20
|
||||||
|
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0xA082, Revision 0x20
|
||||||
|
PCI Device: 0000:00:1f.3: Class 0x00040300, Vendor 0x8086, Device 0xA0C8, Revision 0x20
|
||||||
|
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0xA0A3, Revision 0x20
|
||||||
|
PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0xA0A4, Revision 0x20
|
||||||
|
PCI Device: 0000:01:00.0: Class 0x00010802, Vendor 0x15B7, Device 0x5009, Revision 0x01
|
||||||
|
PCI Device: 0000:34:00.0: Class 0x00FF0000, Vendor 0x10EC, Device 0x522A, Revision 0x01
|
||||||
|
PCI Device: 0000:35:00.0: Class 0x00020000, Vendor 0x10EC, Device 0x8168, Revision 0x15
|
||||||
|
## GPIO ##
|
||||||
|
500 Series PCH-LP
|
||||||
|
GPP_B0 (0x6E,0x00) 0x44000700 0x0003c018 0x00000100 0x00000000
|
||||||
|
GPP_B1 (0x6E,0x02) 0x44000700 0x0003c019 0x00000100 0x00000000
|
||||||
|
GPP_B2 (0x6E,0x04) 0x44000102 0x0000301a 0x00000000 0x00000000
|
||||||
|
GPP_B3 (0x6E,0x06) 0x80800102 0x0000001b 0x00000000 0x00000000
|
||||||
|
GPP_B4 (0x6E,0x08) 0x44000300 0x0000001c 0x00000000 0x00000000
|
||||||
|
GPP_B5 (0x6E,0x0A) 0x44000300 0x0000001d 0x00000000 0x00000000
|
||||||
|
GPP_B6 (0x6E,0x0C) 0x44000300 0x0000001e 0x00000000 0x00000000
|
||||||
|
GPP_B7 (0x6E,0x0E) 0x44000300 0x0000001f 0x00000000 0x00000000
|
||||||
|
GPP_B8 (0x6E,0x10) 0x44000201 0x00000020 0x00000000 0x00000000
|
||||||
|
GPP_B9 (0x6E,0x12) 0x44000300 0x00000021 0x00000000 0x00000000
|
||||||
|
GPP_B10 (0x6E,0x14) 0x44000300 0x00000022 0x00000000 0x00000000
|
||||||
|
GPP_B11 (0x6E,0x16) 0x04000702 0x00000023 0x00000000 0x00000000
|
||||||
|
GPP_B12 (0x6E,0x18) 0x44000700 0x0003c024 0x00000000 0x00000000
|
||||||
|
GPP_B13 (0x6E,0x1A) 0x44000700 0x0003c025 0x00000000 0x00000000
|
||||||
|
GPP_B14 (0x6E,0x1C) 0x44000200 0x0003c026 0x00000000 0x00000000
|
||||||
|
GPP_B15 (0x6E,0x1E) 0x44000201 0x00000027 0x00000000 0x00000000
|
||||||
|
GPP_B16 (0x6E,0x20) 0x44000301 0x00000028 0x00000000 0x00000000
|
||||||
|
GPP_B17 (0x6E,0x22) 0x44000300 0x00000029 0x00000000 0x00000000
|
||||||
|
GPP_B18 (0x6E,0x24) 0x44000300 0x0000002a 0x00000100 0x00000000
|
||||||
|
GPP_B19 (0x6E,0x26) 0x44000300 0x0000002b 0x00000000 0x00000000
|
||||||
|
GPP_B20 (0x6E,0x28) 0x44000300 0x0000002c 0x00000000 0x00000000
|
||||||
|
GPP_B21 (0x6E,0x2A) 0x44000300 0x0000002d 0x00000000 0x00000000
|
||||||
|
GPP_B22 (0x6E,0x2C) 0x44000300 0x0000002e 0x00000000 0x00000000
|
||||||
|
GPP_B23 (0x6E,0x2E) 0x44000200 0x0000002f 0x00000000 0x00000000
|
||||||
|
GPP_T2 (0x6E,0x38) 0x44000300 0x00000032 0x00000000 0x00000000
|
||||||
|
GPP_T3 (0x6E,0x3A) 0x44000300 0x00000033 0x00000000 0x00000000
|
||||||
|
GPP_A0 (0x6E,0x54) 0x44000700 0x0003f040 0x00000100 0x00000000
|
||||||
|
GPP_A1 (0x6E,0x56) 0x44000702 0x0003f041 0x00000100 0x00000000
|
||||||
|
GPP_A2 (0x6E,0x58) 0x44000700 0x0003f042 0x00000100 0x00000000
|
||||||
|
GPP_A3 (0x6E,0x5A) 0x44000700 0x0003f043 0x00000100 0x00000000
|
||||||
|
GPP_A4 (0x6E,0x5C) 0x44000700 0x0003f044 0x00000100 0x00000000
|
||||||
|
GPP_A5 (0x6E,0x5E) 0x44000700 0x0003d045 0x00000100 0x00000000
|
||||||
|
GPP_A6 (0x6E,0x60) 0x44000700 0x0003c046 0x00000100 0x00000000
|
||||||
|
GPP_A7 (0x6E,0x62) 0x44000300 0x00000047 0x00000000 0x00000000
|
||||||
|
GPP_A8 (0x6E,0x64) 0x44000b00 0x0003c048 0x00000100 0x00000000
|
||||||
|
GPP_A9 (0x6E,0x66) 0x44000f00 0x0003c049 0x00000100 0x00000000
|
||||||
|
GPP_A10 (0x6E,0x68) 0x44000300 0x0000004a 0x00000000 0x00000000
|
||||||
|
GPP_A11 (0x6E,0x6A) 0x44000300 0x0000004b 0x00000000 0x00000000
|
||||||
|
GPP_A12 (0x6E,0x6C) 0x44000702 0x0000304c 0x00000000 0x00000000
|
||||||
|
GPP_A13 (0x6E,0x6E) 0x84000201 0x0000004d 0x00000000 0x00000000
|
||||||
|
GPP_A14 (0x6E,0x70) 0x44000300 0x0000004e 0x00000000 0x00000000
|
||||||
|
GPP_A15 (0x6E,0x72) 0x44000300 0x0000004f 0x00000000 0x00000000
|
||||||
|
GPP_A16 (0x6E,0x74) 0x44000300 0x00000050 0x00000000 0x00000000
|
||||||
|
GPP_A17 (0x6E,0x76) 0x44000300 0x00000051 0x00000000 0x00000000
|
||||||
|
GPP_A18 (0x6E,0x78) 0x44000700 0x00024052 0x00000000 0x00000000
|
||||||
|
GPP_A19 (0x6E,0x7A) 0x44000300 0x00000053 0x00000000 0x00000000
|
||||||
|
GPP_A20 (0x6E,0x7C) 0x44000300 0x00000054 0x00000000 0x00000000
|
||||||
|
GPP_A21 (0x6E,0x7E) 0x44000300 0x00000055 0x00000000 0x00000000
|
||||||
|
GPP_A22 (0x6E,0x80) 0x44000300 0x00000056 0x00000000 0x00000000
|
||||||
|
GPP_A23 (0x6E,0x82) 0x84000200 0x00000057 0x00000000 0x00000000
|
||||||
|
GPP_S0 (0x6D,0x00) 0x44000300 0x0180006c 0x00000000 0x00000000
|
||||||
|
GPP_S1 (0x6D,0x02) 0x44000300 0x0180006d 0x00000000 0x00000000
|
||||||
|
GPP_S2 (0x6D,0x04) 0x44000300 0x0180006e 0x00000000 0x00000000
|
||||||
|
GPP_S3 (0x6D,0x06) 0x44000300 0x0180006f 0x00000000 0x00000000
|
||||||
|
GPP_S4 (0x6D,0x08) 0x44000300 0x01800070 0x00000000 0x00000000
|
||||||
|
GPP_S5 (0x6D,0x0A) 0x44000300 0x01800071 0x00000000 0x00000000
|
||||||
|
GPP_S6 (0x6D,0x0C) 0x44000300 0x01800072 0x00000000 0x00000000
|
||||||
|
GPP_S7 (0x6D,0x0E) 0x44000300 0x01800073 0x00000000 0x00000000
|
||||||
|
GPP_H0 (0x6D,0x10) 0x84000201 0x00000074 0x00000000 0x00000000
|
||||||
|
GPP_H1 (0x6D,0x12) 0x44000300 0x00000075 0x00000000 0x00000000
|
||||||
|
GPP_H2 (0x6D,0x14) 0x44000300 0x00000076 0x00000000 0x00000000
|
||||||
|
GPP_H3 (0x6D,0x16) 0x44000100 0x00001077 0x00000000 0x00000000
|
||||||
|
GPP_H4 (0x6D,0x18) 0x44000702 0x00000018 0x00000000 0x00000000
|
||||||
|
GPP_H5 (0x6D,0x1A) 0x44000702 0x00000019 0x00000000 0x00000000
|
||||||
|
GPP_H6 (0x6D,0x1C) 0x44000300 0x0000001a 0x00000000 0x00000000
|
||||||
|
GPP_H7 (0x6D,0x1E) 0x44000300 0x0000001b 0x00000000 0x00000000
|
||||||
|
GPP_H8 (0x6D,0x20) 0x44000100 0x0000101c 0x00000000 0x00000000
|
||||||
|
GPP_H9 (0x6D,0x22) 0x44000100 0x0000101d 0x00000000 0x00000000
|
||||||
|
GPP_H10 (0x6D,0x24) 0x44000702 0x0000001e 0x00000000 0x00000000
|
||||||
|
GPP_H11 (0x6D,0x26) 0x44000300 0x0000001f 0x00000000 0x00000000
|
||||||
|
GPP_H12 (0x6D,0x28) 0x44000300 0x00000020 0x00000000 0x00000000
|
||||||
|
GPP_H13 (0x6D,0x2A) 0x44000300 0x00000021 0x00000000 0x00000000
|
||||||
|
GPP_H14 (0x6D,0x2C) 0x44000300 0x00000022 0x00000000 0x00000000
|
||||||
|
GPP_H15 (0x6D,0x2E) 0x44000300 0x00000023 0x00000000 0x00000000
|
||||||
|
GPP_H16 (0x6D,0x30) 0x44000700 0x0003c024 0x00000000 0x00000000
|
||||||
|
GPP_H17 (0x6D,0x32) 0x44000602 0x0003c025 0x00000000 0x00000000
|
||||||
|
GPP_H18 (0x6D,0x34) 0x44000700 0x0003c026 0x00000000 0x00000000
|
||||||
|
GPP_H19 (0x6D,0x36) 0x44000300 0x0003c027 0x00000000 0x00000000
|
||||||
|
GPP_H20 (0x6D,0x38) 0x44000300 0x00000028 0x00000000 0x00000000
|
||||||
|
GPP_H21 (0x6D,0x3A) 0x44000300 0x00000029 0x00000000 0x00000000
|
||||||
|
GPP_H22 (0x6D,0x3C) 0x44000300 0x0000002a 0x00000000 0x00000000
|
||||||
|
GPP_H23 (0x6D,0x3E) 0x44000300 0x0000002b 0x00000000 0x00000000
|
||||||
|
GPP_D0 (0x6D,0x40) 0x44000102 0x0000002c 0x00000000 0x00000000
|
||||||
|
GPP_D1 (0x6D,0x42) 0x84000201 0x0000002d 0x00000000 0x00000000
|
||||||
|
GPP_D2 (0x6D,0x44) 0x84000102 0x0000002e 0x00000000 0x00000000
|
||||||
|
GPP_D3 (0x6D,0x46) 0x84000102 0x0000002f 0x00000000 0x00000000
|
||||||
|
GPP_D4 (0x6D,0x48) 0x44000300 0x00000030 0x00000000 0x00000000
|
||||||
|
GPP_D5 (0x6D,0x4A) 0x44000702 0x00000031 0x00000000 0x00000000
|
||||||
|
GPP_D6 (0x6D,0x4C) 0x44000702 0x00000032 0x00000000 0x00000000
|
||||||
|
GPP_D7 (0x6D,0x4E) 0x44000700 0x00000033 0x00000000 0x00000000
|
||||||
|
GPP_D8 (0x6D,0x50) 0x44000700 0x00000034 0x00000000 0x00000000
|
||||||
|
GPP_D9 (0x6D,0x52) 0x44000300 0x00000035 0x00000000 0x00000000
|
||||||
|
GPP_D10 (0x6D,0x54) 0x44000300 0x00000036 0x00000000 0x00000000
|
||||||
|
GPP_D11 (0x6D,0x56) 0x44000102 0x00001037 0x00000000 0x00000000
|
||||||
|
GPP_D12 (0x6D,0x58) 0x44000102 0x00001038 0x00000800 0x00000000
|
||||||
|
GPP_D13 (0x6D,0x5A) 0x84000201 0x00000039 0x00000000 0x00000000
|
||||||
|
GPP_D14 (0x6D,0x5C) 0x84000201 0x0000003a 0x00000000 0x00000000
|
||||||
|
GPP_D15 (0x6D,0x5E) 0x44000300 0x0000003b 0x00000000 0x00000000
|
||||||
|
GPP_D16 (0x6D,0x60) 0x44000300 0x0000003c 0x00000000 0x00000000
|
||||||
|
GPP_D17 (0x6D,0x62) 0x44000300 0x0000003d 0x00000000 0x00000000
|
||||||
|
GPP_D18 (0x6D,0x64) 0x44000300 0x0000003e 0x00000000 0x00000000
|
||||||
|
GPP_D19 (0x6D,0x66) 0x44000300 0x0000003f 0x00000000 0x00000000
|
||||||
|
GPP_U4 (0x6D,0x72) 0x84000200 0x00000044 0x00000000 0x00000000
|
||||||
|
GPP_U5 (0x6D,0x74) 0x84000201 0x00000045 0x00000000 0x00000000
|
||||||
|
GPD0 (0x6C,0x00) 0x04000702 0x00003060 0x00000000 0x00000000
|
||||||
|
GPD1 (0x6C,0x02) 0x04000702 0x00003c61 0x00000000 0x00000000
|
||||||
|
GPD2 (0x6C,0x04) 0x04000102 0x00000062 0x00000000 0x00000000
|
||||||
|
GPD3 (0x6C,0x06) 0x04000702 0x00003063 0x00000010 0x00000000
|
||||||
|
GPD4 (0x6C,0x08) 0x04000600 0x00000064 0x00000000 0x00000000
|
||||||
|
GPD5 (0x6C,0x0A) 0x04000600 0x00000065 0x00000000 0x00000000
|
||||||
|
GPD6 (0x6C,0x0C) 0x44000700 0x00000066 0x00000000 0x00000000
|
||||||
|
GPD7 (0x6C,0x0E) 0x04000201 0x00000067 0x00000000 0x00000000
|
||||||
|
GPD8 (0x6C,0x10) 0x04000700 0x00000068 0x00000000 0x00000000
|
||||||
|
GPD9 (0x6C,0x12) 0x04000200 0x00000069 0x00000000 0x00000000
|
||||||
|
GPD10 (0x6C,0x14) 0x44000500 0x0000306a 0x00000000 0x00000000
|
||||||
|
GPD11 (0x6C,0x16) 0x44000102 0x0000306b 0x00000000 0x00000000
|
||||||
|
GPP_C0 (0x6A,0x00) 0x44000702 0x0003c06e 0x00000000 0x00000000
|
||||||
|
GPP_C1 (0x6A,0x02) 0x44000702 0x0003c06f 0x00000000 0x00000000
|
||||||
|
GPP_C2 (0x6A,0x04) 0x44000300 0x00000070 0x00000100 0x00000000
|
||||||
|
GPP_C3 (0x6A,0x06) 0x44000702 0x00000071 0x00000000 0x00000000
|
||||||
|
GPP_C4 (0x6A,0x08) 0x44000702 0x00000072 0x00000000 0x00000000
|
||||||
|
GPP_C5 (0x6A,0x0A) 0x44000300 0x00000073 0x00000000 0x00000000
|
||||||
|
GPP_C6 (0x6A,0x0C) 0x04000702 0x00000074 0x00000000 0x00000000
|
||||||
|
GPP_C7 (0x6A,0x0E) 0x04000702 0x00000075 0x00000000 0x00000000
|
||||||
|
GPP_C8 (0x6A,0x10) 0x44000300 0x00000076 0x00000000 0x00000000
|
||||||
|
GPP_C9 (0x6A,0x12) 0x44000300 0x00000077 0x00000000 0x00000000
|
||||||
|
GPP_C10 (0x6A,0x14) 0x44000300 0x00000018 0x00000000 0x00000000
|
||||||
|
GPP_C11 (0x6A,0x16) 0x44000300 0x00000019 0x00000000 0x00000000
|
||||||
|
GPP_C12 (0x6A,0x18) 0x44000300 0x0000001a 0x00000000 0x00000000
|
||||||
|
GPP_C13 (0x6A,0x1A) 0x44000300 0x0000001b 0x00000000 0x00000000
|
||||||
|
GPP_C14 (0x6A,0x1C) 0x40100102 0x0000301c 0x00000000 0x00000000
|
||||||
|
GPP_C15 (0x6A,0x1E) 0x44000300 0x0000001d 0x00000000 0x00000000
|
||||||
|
GPP_C16 (0x6A,0x20) 0x44000702 0x0000001e 0x00000000 0x00000000
|
||||||
|
GPP_C17 (0x6A,0x22) 0x44000702 0x0000001f 0x00000000 0x00000000
|
||||||
|
GPP_C18 (0x6A,0x24) 0x44000702 0x00000020 0x00000000 0x00000000
|
||||||
|
GPP_C19 (0x6A,0x26) 0x44000702 0x00000021 0x00000000 0x00000000
|
||||||
|
GPP_C20 (0x6A,0x28) 0x44000300 0x00000022 0x00000000 0x00000000
|
||||||
|
GPP_C21 (0x6A,0x2A) 0x44000300 0x00000023 0x00000000 0x00000000
|
||||||
|
GPP_C22 (0x6A,0x2C) 0x84000201 0x00000024 0x00000000 0x00000000
|
||||||
|
GPP_C23 (0x6A,0x2E) 0x40880100 0x00000025 0x00000000 0x00000000
|
||||||
|
GPP_F0 (0x6A,0x30) 0x44000700 0x0003c056 0x00000100 0x00000000
|
||||||
|
GPP_F1 (0x6A,0x32) 0x44000702 0x0003f057 0x00000100 0x00000000
|
||||||
|
GPP_F2 (0x6A,0x34) 0x44000700 0x0003c058 0x00000100 0x00000000
|
||||||
|
GPP_F3 (0x6A,0x36) 0x44000700 0x0003f059 0x00000100 0x00000000
|
||||||
|
GPP_F4 (0x6A,0x38) 0x44000300 0x0000005a 0x00000100 0x00000000
|
||||||
|
GPP_F5 (0x6A,0x3A) 0x44000300 0x0000005b 0x00000100 0x00000000
|
||||||
|
GPP_F6 (0x6A,0x3C) 0x44000300 0x0000005c 0x00000100 0x00000000
|
||||||
|
GPP_F7 (0x6A,0x3E) 0x44000201 0x0000005d 0x00000000 0x00000000
|
||||||
|
GPP_F8 (0x6A,0x40) 0x44000300 0x0000005e 0x00000000 0x00000000
|
||||||
|
GPP_F9 (0x6A,0x42) 0x44000201 0x0000005f 0x00000000 0x00000000
|
||||||
|
GPP_F10 (0x6A,0x44) 0x44000300 0x00000060 0x00000000 0x00000000
|
||||||
|
GPP_F11 (0x6A,0x46) 0x44000300 0x00000061 0x00000000 0x00000000
|
||||||
|
GPP_F12 (0x6A,0x48) 0x44000300 0x00000062 0x00000000 0x00000000
|
||||||
|
GPP_F13 (0x6A,0x4A) 0x44000300 0x00000063 0x00000000 0x00000000
|
||||||
|
GPP_F14 (0x6A,0x4C) 0x44000300 0x00000064 0x00000000 0x00000000
|
||||||
|
GPP_F15 (0x6A,0x4E) 0x44000300 0x00000065 0x00000000 0x00000000
|
||||||
|
GPP_F16 (0x6A,0x50) 0x44000300 0x00000066 0x00000000 0x00000000
|
||||||
|
GPP_F17 (0x6A,0x52) 0x84000102 0x00000067 0x00000000 0x00000000
|
||||||
|
GPP_F18 (0x6A,0x54) 0x44000300 0x00000068 0x00000000 0x00000000
|
||||||
|
GPP_F19 (0x6A,0x56) 0x44000300 0x00000069 0x00000000 0x00000000
|
||||||
|
GPP_F20 (0x6A,0x58) 0x44000300 0x0003c06a 0x00000000 0x00000000
|
||||||
|
GPP_F21 (0x6A,0x5A) 0x44000100 0x0003d06b 0x00000000 0x00000000
|
||||||
|
GPP_F22 (0x6A,0x5C) 0x44000300 0x0003c06c 0x00000000 0x00000000
|
||||||
|
GPP_F23 (0x6A,0x5E) 0x44000300 0x0003c06d 0x00000000 0x00000000
|
||||||
|
GPP_E0 (0x6A,0x6E) 0x44000702 0x00000026 0x00000000 0x00000000
|
||||||
|
GPP_E1 (0x6A,0x70) 0x84000200 0x00000027 0x00000000 0x00000000
|
||||||
|
GPP_E2 (0x6A,0x72) 0x40880102 0x00000028 0x00000000 0x00000000
|
||||||
|
GPP_E3 (0x6A,0x74) 0x44000102 0x00001029 0x00000000 0x00000000
|
||||||
|
GPP_E4 (0x6A,0x76) 0x44000300 0x00000030 0x00000000 0x00000000
|
||||||
|
GPP_E5 (0x6A,0x78) 0x44000300 0x00000031 0x00000000 0x00000000
|
||||||
|
GPP_E6 (0x6A,0x7A) 0x44000300 0x00000032 0x00000900 0x00000000
|
||||||
|
GPP_E7 (0x6A,0x7C) 0x82840102 0x00000033 0x00000000 0x00000000
|
||||||
|
GPP_E8 (0x6A,0x7E) 0x44000300 0x00000034 0x00000000 0x00000000
|
||||||
|
GPP_E9 (0x6A,0x80) 0x44000300 0x00000035 0x00000800 0x00000000
|
||||||
|
GPP_E10 (0x6A,0x82) 0x44000300 0x00000036 0x00000900 0x00000000
|
||||||
|
GPP_E11 (0x6A,0x84) 0x44000300 0x00000037 0x00000900 0x00000000
|
||||||
|
GPP_E12 (0x6A,0x86) 0x44000300 0x00000038 0x00000000 0x00000000
|
||||||
|
GPP_E13 (0x6A,0x88) 0x44000300 0x00000039 0x00000000 0x00000000
|
||||||
|
GPP_E14 (0x6A,0x8A) 0x44000702 0x0002403a 0x00000000 0x00000000
|
||||||
|
GPP_E15 (0x6A,0x8C) 0x44000300 0x0000003b 0x00000000 0x00000000
|
||||||
|
GPP_E16 (0x6A,0x8E) 0x44000102 0x0000103c 0x00000000 0x00000000
|
||||||
|
GPP_E17 (0x6A,0x90) 0x44000300 0x0000003d 0x00000000 0x00000000
|
||||||
|
GPP_E18 (0x6A,0x92) 0x44000300 0x00003c3e 0x00000000 0x00000000
|
||||||
|
GPP_E19 (0x6A,0x94) 0x44000300 0x00003c3f 0x00000000 0x00000000
|
||||||
|
GPP_E20 (0x6A,0x96) 0x44000300 0x00000040 0x00000000 0x00000000
|
||||||
|
GPP_E21 (0x6A,0x98) 0x44000300 0x00000041 0x00000000 0x00000000
|
||||||
|
GPP_E22 (0x6A,0x9A) 0x44000300 0x00000042 0x00000000 0x00000000
|
||||||
|
GPP_E23 (0x6A,0x9C) 0x44000300 0x00000043 0x00000000 0x00000000
|
||||||
|
GPP_R0 (0x69,0x00) 0x44000700 0x0003c058 0x00000000 0x00000000
|
||||||
|
GPP_R1 (0x69,0x02) 0x44000700 0x0003fc59 0x00000000 0x00000000
|
||||||
|
GPP_R2 (0x69,0x04) 0x44000600 0x0003fc5a 0x00000000 0x00000000
|
||||||
|
GPP_R3 (0x69,0x06) 0x44000700 0x0003fc5b 0x00000000 0x00000000
|
||||||
|
GPP_R4 (0x69,0x08) 0x44000700 0x0003c05c 0x00000000 0x00000000
|
||||||
|
GPP_R5 (0x69,0x0A) 0x44000300 0x0000005d 0x00000000 0x00000000
|
||||||
|
GPP_R6 (0x69,0x0C) 0x44000300 0x0000005e 0x00000000 0x00000000
|
||||||
|
GPP_R7 (0x69,0x0E) 0x44000300 0x0000005f 0x00000000 0x00000000
|
||||||
|
## HDAUDIO ##
|
||||||
|
hdaudioC0D0
|
||||||
|
vendor_name: Realtek
|
||||||
|
chip_name: ALC293
|
||||||
|
vendor_id: 0x10ec0293
|
||||||
|
subsystem_id: 0x155851a1
|
||||||
|
revision_id: 0x100003
|
||||||
|
0x12: 0x90a60130
|
||||||
|
0x13: 0x40000000
|
||||||
|
0x14: 0x90170110
|
||||||
|
0x15: 0x02211020
|
||||||
|
0x16: 0x411111f0
|
||||||
|
0x18: 0x411111f0
|
||||||
|
0x19: 0x411111f0
|
||||||
|
0x1a: 0x411111f0
|
||||||
|
0x1b: 0x411111f0
|
||||||
|
0x1d: 0x40738205
|
||||||
|
0x1e: 0x411111f0
|
||||||
|
hdaudioC0D2
|
||||||
|
vendor_name: Intel
|
||||||
|
chip_name: Tigerlake HDMI
|
||||||
|
vendor_id: 0x80862812
|
||||||
|
subsystem_id: 0x80860101
|
||||||
|
revision_id: 0x100000
|
||||||
|
0x04: 0x18560010
|
||||||
|
0x06: 0x18560010
|
||||||
|
0x08: 0x18560010
|
||||||
|
0x0a: 0x18560010
|
||||||
|
0x0b: 0x18560010
|
||||||
|
0x0c: 0x18560010
|
||||||
|
0x0d: 0x18560010
|
||||||
|
0x0e: 0x18560010
|
||||||
|
0x0f: 0x18560010
|
21
models/darp7/coreboot.config
Normal file
21
models/darp7/coreboot.config
Normal file
@@ -0,0 +1,21 @@
|
|||||||
|
CONFIG_VENDOR_SYSTEM76=y
|
||||||
|
CONFIG_BOARD_SYSTEM76_DARP7=y
|
||||||
|
CONFIG_CCACHE=y
|
||||||
|
CONFIG_CONSOLE_SERIAL=n
|
||||||
|
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
|
||||||
|
CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
|
||||||
|
CONFIG_HAVE_IFD_BIN=y
|
||||||
|
CONFIG_HAVE_ME_BIN=y
|
||||||
|
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
||||||
|
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
||||||
|
CONFIG_PAYLOAD_ELF=y
|
||||||
|
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
||||||
|
CONFIG_PCIEXP_HOTPLUG_MEM=0x2000000
|
||||||
|
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x20000000
|
||||||
|
CONFIG_POST_IO=n
|
||||||
|
CONFIG_RUN_FSP_GOP=y
|
||||||
|
CONFIG_SMMSTORE=y
|
||||||
|
CONFIG_SMMSTORE_V2=y
|
||||||
|
CONFIG_USE_OPTION_TABLE=y
|
||||||
|
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
||||||
|
#CONFIG_CONSOLE_SYSTEM76_EC=y
|
1
models/darp7/ec.config
Normal file
1
models/darp7/ec.config
Normal file
@@ -0,0 +1 @@
|
|||||||
|
BOARD=system76/darp7
|
89
models/darp7/ecspy.txt
Normal file
89
models/darp7/ecspy.txt
Normal file
@@ -0,0 +1,89 @@
|
|||||||
|
id 5570 rev 2
|
||||||
|
A0: data 0 mirror 0 pot 0 control 00
|
||||||
|
A1: data 0 mirror 0 pot 0 control 00
|
||||||
|
A2: data 0 mirror 0 pot 0 control 00
|
||||||
|
A3: data 1 mirror 1 pot 0 control 44
|
||||||
|
A4: data 1 mirror 1 pot 0 control 44
|
||||||
|
A5: data 0 mirror 0 pot 0 control 00
|
||||||
|
A6: data 0 mirror 0 pot 0 control 00
|
||||||
|
A7: data 0 mirror 1 pot 0 control 00
|
||||||
|
B0: data 0 mirror 0 pot 0 control 84
|
||||||
|
B1: data 1 mirror 1 pot 0 control 84
|
||||||
|
B2: data 1 mirror 1 pot 0 control 44
|
||||||
|
B3: data 1 mirror 1 pot 0 control 80
|
||||||
|
B4: data 1 mirror 1 pot 0 control 40
|
||||||
|
B5: data 1 mirror 1 pot 0 control 44
|
||||||
|
B6: data 1 mirror 1 pot 0 control 44
|
||||||
|
B7: data 1 mirror 1 pot 0 control 80
|
||||||
|
C0: data 1 mirror 1 pot 0 control 80
|
||||||
|
C1: data 1 mirror 1 pot 0 control 04
|
||||||
|
C2: data 1 mirror 1 pot 0 control 04
|
||||||
|
C3: data 0 mirror 0 pot 0 control 04
|
||||||
|
C4: data 0 mirror 0 pot 0 control 84
|
||||||
|
C5: data 0 mirror 0 pot 0 control 04
|
||||||
|
C6: data 1 mirror 1 pot 0 control 40
|
||||||
|
C7: data 0 mirror 0 pot 0 control 44
|
||||||
|
D0: data 1 mirror 1 pot 0 control 44
|
||||||
|
D1: data 1 mirror 1 pot 0 control 44
|
||||||
|
D2: data 1 mirror 1 pot 0 control 00
|
||||||
|
D3: data 1 mirror 1 pot 0 control 82
|
||||||
|
D4: data 1 mirror 1 pot 0 control 40
|
||||||
|
D5: data 1 mirror 1 pot 0 control 44
|
||||||
|
D6: data 1 mirror 1 pot 0 control 02
|
||||||
|
D7: data 0 mirror 0 pot 0 control 80
|
||||||
|
E0: data 1 mirror 1 pot 0 control 04
|
||||||
|
E1: data 1 mirror 1 pot 0 control 44
|
||||||
|
E2: data 0 mirror 0 pot 0 control 84
|
||||||
|
E3: data 0 mirror 0 pot 0 control 44
|
||||||
|
E4: data 1 mirror 1 pot 0 control 42
|
||||||
|
E5: data 1 mirror 1 pot 0 control 40
|
||||||
|
E6: data 1 mirror 1 pot 0 control 80
|
||||||
|
E7: data 1 mirror 1 pot 0 control 04
|
||||||
|
F0: data 0 mirror 0 pot 0 control 44
|
||||||
|
F1: data 1 mirror 1 pot 0 control 44
|
||||||
|
F2: data 1 mirror 1 pot 0 control 44
|
||||||
|
F3: data 0 mirror 0 pot 0 control 06
|
||||||
|
F4: data 1 mirror 1 pot 0 control 04
|
||||||
|
F5: data 1 mirror 1 pot 0 control 04
|
||||||
|
F6: data 1 mirror 1 pot 0 control 00
|
||||||
|
F7: data 1 mirror 1 pot 0 control 44
|
||||||
|
G0: data 1 mirror 1 pot 0 control 80
|
||||||
|
G1: data 1 mirror 1 pot 0 control 44
|
||||||
|
G2: data 0 mirror 0 pot 0 control 40
|
||||||
|
G3: data 0 mirror 0 pot 0 control 00
|
||||||
|
G4: data 0 mirror 0 pot 0 control 00
|
||||||
|
G5: data 0 mirror 0 pot 0 control 00
|
||||||
|
G6: data 1 mirror 1 pot 0 control 44
|
||||||
|
G7: data 0 mirror 0 pot 0 control 00
|
||||||
|
H0: data 1 mirror 1 pot 0 control 80
|
||||||
|
H1: data 1 mirror 1 pot 0 control 80
|
||||||
|
H2: data 1 mirror 1 pot 0 control 44
|
||||||
|
H3: data 1 mirror 1 pot 0 control 80
|
||||||
|
H4: data 1 mirror 1 pot 0 control 84
|
||||||
|
H5: data 0 mirror 0 pot 0 control 44
|
||||||
|
H6: data 1 mirror 1 pot 0 control 80
|
||||||
|
H7: data 1 mirror 1 pot 0 control 80
|
||||||
|
I0: data 0 mirror 0 pot 0 control 00
|
||||||
|
I1: data 0 mirror 0 pot 0 control 00
|
||||||
|
I2: data 0 mirror 0 pot 0 control 40
|
||||||
|
I3: data 0 mirror 0 pot 0 control 80
|
||||||
|
I4: data 0 mirror 0 pot 0 control 00
|
||||||
|
I5: data 0 mirror 0 pot 0 control 00
|
||||||
|
I6: data 0 mirror 0 pot 0 control 00
|
||||||
|
I7: data 0 mirror 0 pot 0 control 00
|
||||||
|
J0: data 1 mirror 1 pot 0 control 44
|
||||||
|
J1: data 1 mirror 1 pot 0 control 40
|
||||||
|
J2: data 0 mirror 0 pot 0 control 00
|
||||||
|
J3: data 1 mirror 1 pot 0 control 80
|
||||||
|
J4: data 1 mirror 1 pot 0 control 40
|
||||||
|
J5: data 0 mirror 0 pot 0 control 40
|
||||||
|
J6: data 1 mirror 1 pot 0 control 80
|
||||||
|
J7: data 1 mirror 1 pot 0 control 80
|
||||||
|
M0: data 0 mirror 0 control 06
|
||||||
|
M1: data 0 mirror 0 control 06
|
||||||
|
M2: data 0 mirror 0 control 06
|
||||||
|
M3: data 0 mirror 0 control 06
|
||||||
|
M4: data 0 mirror 0 control 06
|
||||||
|
M5: data 0 mirror 0 control 00
|
||||||
|
M6: data 0 mirror 0 control 86
|
||||||
|
M7: data 0 mirror 0 control 86
|
9
models/darp7/edk2.config
Normal file
9
models/darp7/edk2.config
Normal file
@@ -0,0 +1,9 @@
|
|||||||
|
BOOTLOADER=COREBOOT
|
||||||
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
|
SHELL_TYPE=NONE
|
||||||
|
TPM_ENABLE=TRUE
|
||||||
|
#SYSTEM76_EC_LOGGING=TRUE
|
BIN
models/darp7/fd.rom
(Stored with Git LFS)
Normal file
BIN
models/darp7/fd.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
213
models/darp7/gpio.h
Normal file
213
models/darp7/gpio.h
Normal file
@@ -0,0 +1,213 @@
|
|||||||
|
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||||
|
|
||||||
|
#ifndef MAINBOARD_GPIO_H
|
||||||
|
#define MAINBOARD_GPIO_H
|
||||||
|
|
||||||
|
#include <soc/gpe.h>
|
||||||
|
#include <soc/gpio.h>
|
||||||
|
|
||||||
|
#ifndef __ACPI__
|
||||||
|
|
||||||
|
/* Pad configuration in ramstage. */
|
||||||
|
static const struct pad_config gpio_table[] = {
|
||||||
|
PAD_CFG_NF(GPD0, UP_20K, PWROK, NF1),
|
||||||
|
PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1),
|
||||||
|
PAD_CFG_GPI(GPD2, NONE, PWROK),
|
||||||
|
PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1),
|
||||||
|
PAD_CFG_NF(GPD4, NONE, PWROK, NF1),
|
||||||
|
PAD_CFG_NF(GPD5, NONE, PWROK, NF1),
|
||||||
|
PAD_CFG_NF(GPD6, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_TERM_GPO(GPD7, 1, NONE, PWROK),
|
||||||
|
PAD_CFG_NF(GPD8, NONE, PWROK, NF1),
|
||||||
|
PAD_CFG_TERM_GPO(GPD9, 0, NONE, PWROK),
|
||||||
|
PAD_CFG_NF(GPD10, UP_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_GPI(GPD11, UP_20K, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_A0, UP_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_A5, DN_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
|
||||||
|
PAD_NC(GPP_A7, NONE),
|
||||||
|
PAD_CFG_NF(GPP_A8, NONE, DEEP, NF2),
|
||||||
|
PAD_CFG_NF(GPP_A9, NONE, DEEP, NF3),
|
||||||
|
PAD_NC(GPP_A10, NONE),
|
||||||
|
PAD_NC(GPP_A11, NONE),
|
||||||
|
PAD_CFG_NF(GPP_A12, UP_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_TERM_GPO(GPP_A13, 1, NONE, PLTRST),
|
||||||
|
PAD_NC(GPP_A14, NONE),
|
||||||
|
PAD_NC(GPP_A15, NONE),
|
||||||
|
PAD_NC(GPP_A16, NONE),
|
||||||
|
PAD_NC(GPP_A17, NONE),
|
||||||
|
PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1),
|
||||||
|
PAD_NC(GPP_A19, NONE),
|
||||||
|
PAD_NC(GPP_A20, NONE),
|
||||||
|
PAD_NC(GPP_A21, NONE),
|
||||||
|
PAD_NC(GPP_A22, NONE),
|
||||||
|
PAD_CFG_TERM_GPO(GPP_A23, 0, NONE, PLTRST),
|
||||||
|
PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_GPI(GPP_B2, UP_20K, DEEP),
|
||||||
|
_PAD_CFG_STRUCT(GPP_B3, 0x80800100, 0x0000),
|
||||||
|
PAD_NC(GPP_B4, NONE),
|
||||||
|
PAD_NC(GPP_B5, NONE),
|
||||||
|
PAD_NC(GPP_B6, NONE),
|
||||||
|
PAD_NC(GPP_B7, NONE),
|
||||||
|
PAD_CFG_TERM_GPO(GPP_B8, 1, NONE, DEEP),
|
||||||
|
PAD_NC(GPP_B9, NONE),
|
||||||
|
PAD_NC(GPP_B10, NONE),
|
||||||
|
PAD_CFG_NF(GPP_B11, NONE, PWROK, NF1),
|
||||||
|
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_TERM_GPO(GPP_B14, 0, NONE, DEEP),
|
||||||
|
PAD_CFG_TERM_GPO(GPP_B15, 1, NONE, DEEP),
|
||||||
|
_PAD_CFG_STRUCT(GPP_B16, 0x44000301, 0x0000),
|
||||||
|
PAD_NC(GPP_B17, NONE),
|
||||||
|
PAD_NC(GPP_B18, NONE),
|
||||||
|
PAD_NC(GPP_B19, NONE),
|
||||||
|
PAD_NC(GPP_B20, NONE),
|
||||||
|
PAD_NC(GPP_B21, NONE),
|
||||||
|
PAD_NC(GPP_B22, NONE),
|
||||||
|
PAD_CFG_TERM_GPO(GPP_B23, 0, NONE, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
|
||||||
|
PAD_NC(GPP_C2, NONE),
|
||||||
|
PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),
|
||||||
|
PAD_NC(GPP_C5, NONE),
|
||||||
|
PAD_CFG_NF(GPP_C6, NONE, PWROK, NF1),
|
||||||
|
PAD_CFG_NF(GPP_C7, NONE, PWROK, NF1),
|
||||||
|
PAD_NC(GPP_C8, NONE),
|
||||||
|
PAD_NC(GPP_C9, NONE),
|
||||||
|
PAD_NC(GPP_C10, NONE),
|
||||||
|
PAD_NC(GPP_C11, NONE),
|
||||||
|
PAD_NC(GPP_C12, NONE),
|
||||||
|
PAD_NC(GPP_C13, NONE),
|
||||||
|
_PAD_CFG_STRUCT(GPP_C14, 0x40100100, 0x3000),
|
||||||
|
PAD_NC(GPP_C15, NONE),
|
||||||
|
PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1),
|
||||||
|
PAD_NC(GPP_C20, NONE),
|
||||||
|
PAD_NC(GPP_C21, NONE),
|
||||||
|
PAD_CFG_TERM_GPO(GPP_C22, 1, NONE, PLTRST),
|
||||||
|
_PAD_CFG_STRUCT(GPP_C23, 0x40880100, 0x0000),
|
||||||
|
PAD_CFG_GPI(GPP_D0, NONE, DEEP),
|
||||||
|
PAD_CFG_TERM_GPO(GPP_D1, 1, NONE, PLTRST),
|
||||||
|
PAD_CFG_GPI(GPP_D2, NONE, PLTRST),
|
||||||
|
PAD_CFG_GPI(GPP_D3, NONE, PLTRST),
|
||||||
|
PAD_NC(GPP_D4, NONE),
|
||||||
|
PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1),
|
||||||
|
PAD_NC(GPP_D9, NONE),
|
||||||
|
PAD_NC(GPP_D10, NONE),
|
||||||
|
PAD_CFG_GPI(GPP_D11, DN_20K, DEEP),
|
||||||
|
PAD_CFG_GPI(GPP_D12, DN_20K, DEEP),
|
||||||
|
PAD_CFG_TERM_GPO(GPP_D13, 1, NONE, PLTRST),
|
||||||
|
PAD_CFG_TERM_GPO(GPP_D14, 1, NONE, PLTRST),
|
||||||
|
PAD_NC(GPP_D15, NONE),
|
||||||
|
PAD_NC(GPP_D16, NONE),
|
||||||
|
PAD_NC(GPP_D17, NONE),
|
||||||
|
PAD_NC(GPP_D18, NONE),
|
||||||
|
PAD_NC(GPP_D19, NONE),
|
||||||
|
PAD_CFG_NF(GPP_E0, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_TERM_GPO(GPP_E1, 0, NONE, PLTRST),
|
||||||
|
_PAD_CFG_STRUCT(GPP_E2, 0x40880100, 0x0000),
|
||||||
|
PAD_CFG_GPI(GPP_E3, DN_20K, DEEP),
|
||||||
|
PAD_NC(GPP_E4, NONE),
|
||||||
|
PAD_NC(GPP_E5, NONE),
|
||||||
|
PAD_NC(GPP_E6, NONE),
|
||||||
|
_PAD_CFG_STRUCT(GPP_E7, 0x82840100, 0x0000),
|
||||||
|
PAD_NC(GPP_E8, NONE),
|
||||||
|
PAD_NC(GPP_E9, NONE),
|
||||||
|
PAD_NC(GPP_E10, NONE),
|
||||||
|
PAD_NC(GPP_E11, NONE),
|
||||||
|
PAD_NC(GPP_E12, NONE),
|
||||||
|
PAD_NC(GPP_E13, NONE),
|
||||||
|
PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
|
||||||
|
PAD_NC(GPP_E15, NONE),
|
||||||
|
PAD_CFG_GPI(GPP_E16, DN_20K, DEEP),
|
||||||
|
PAD_NC(GPP_E17, NONE),
|
||||||
|
PAD_NC(GPP_E18, NATIVE),
|
||||||
|
PAD_NC(GPP_E19, NATIVE),
|
||||||
|
PAD_NC(GPP_E20, NONE),
|
||||||
|
PAD_NC(GPP_E21, NONE),
|
||||||
|
PAD_NC(GPP_E22, NONE),
|
||||||
|
PAD_NC(GPP_E23, NONE),
|
||||||
|
PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_F1, UP_20K, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_F3, UP_20K, DEEP, NF1),
|
||||||
|
PAD_NC(GPP_F4, NONE),
|
||||||
|
PAD_NC(GPP_F5, NONE),
|
||||||
|
PAD_NC(GPP_F6, NONE),
|
||||||
|
PAD_CFG_TERM_GPO(GPP_F7, 1, NONE, DEEP),
|
||||||
|
PAD_NC(GPP_F8, NONE),
|
||||||
|
PAD_CFG_TERM_GPO(GPP_F9, 1, NONE, DEEP),
|
||||||
|
PAD_NC(GPP_F10, NONE),
|
||||||
|
PAD_NC(GPP_F11, NONE),
|
||||||
|
PAD_NC(GPP_F12, NONE),
|
||||||
|
PAD_NC(GPP_F13, NONE),
|
||||||
|
PAD_NC(GPP_F14, NONE),
|
||||||
|
PAD_NC(GPP_F15, NONE),
|
||||||
|
PAD_NC(GPP_F16, NONE),
|
||||||
|
PAD_CFG_GPI(GPP_F17, NONE, PLTRST),
|
||||||
|
PAD_NC(GPP_F18, NONE),
|
||||||
|
PAD_NC(GPP_F19, NONE),
|
||||||
|
PAD_NC(GPP_F20, NONE),
|
||||||
|
PAD_CFG_GPI(GPP_F21, DN_20K, DEEP),
|
||||||
|
PAD_NC(GPP_F22, NONE),
|
||||||
|
PAD_NC(GPP_F23, NONE),
|
||||||
|
PAD_CFG_TERM_GPO(GPP_H0, 1, NONE, PLTRST),
|
||||||
|
PAD_NC(GPP_H1, NONE),
|
||||||
|
PAD_NC(GPP_H2, NONE),
|
||||||
|
PAD_CFG_GPI(GPP_H3, DN_20K, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
|
||||||
|
PAD_NC(GPP_H6, NONE),
|
||||||
|
PAD_NC(GPP_H7, NONE),
|
||||||
|
PAD_CFG_GPI(GPP_H8, DN_20K, DEEP),
|
||||||
|
PAD_CFG_GPI(GPP_H9, DN_20K, DEEP),
|
||||||
|
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF1),
|
||||||
|
PAD_NC(GPP_H11, NONE),
|
||||||
|
PAD_NC(GPP_H12, NONE),
|
||||||
|
PAD_NC(GPP_H13, NONE),
|
||||||
|
PAD_NC(GPP_H14, NONE),
|
||||||
|
PAD_NC(GPP_H15, NONE),
|
||||||
|
PAD_CFG_NF(GPP_H16, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1),
|
||||||
|
PAD_NC(GPP_H19, NONE),
|
||||||
|
PAD_NC(GPP_H20, NONE),
|
||||||
|
PAD_NC(GPP_H21, NONE),
|
||||||
|
PAD_NC(GPP_H22, NONE),
|
||||||
|
PAD_NC(GPP_H23, NONE),
|
||||||
|
PAD_CFG_NF(GPP_R0, NONE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1),
|
||||||
|
PAD_CFG_NF(GPP_R4, NONE, DEEP, NF1),
|
||||||
|
PAD_NC(GPP_R5, NONE),
|
||||||
|
PAD_NC(GPP_R6, NONE),
|
||||||
|
PAD_NC(GPP_R7, NONE),
|
||||||
|
PAD_NC(GPP_S0, NONE),
|
||||||
|
PAD_NC(GPP_S1, NONE),
|
||||||
|
PAD_NC(GPP_S2, NONE),
|
||||||
|
PAD_NC(GPP_S3, NONE),
|
||||||
|
PAD_NC(GPP_S4, NONE),
|
||||||
|
PAD_NC(GPP_S5, NONE),
|
||||||
|
PAD_NC(GPP_S6, NONE),
|
||||||
|
PAD_NC(GPP_S7, NONE),
|
||||||
|
PAD_NC(GPP_T2, NONE),
|
||||||
|
PAD_NC(GPP_T3, NONE),
|
||||||
|
PAD_CFG_TERM_GPO(GPP_U4, 0, NONE, PLTRST),
|
||||||
|
PAD_CFG_TERM_GPO(GPP_U5, 1, NONE, PLTRST),
|
||||||
|
};
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
40
models/darp7/hda_verb.c
Normal file
40
models/darp7/hda_verb.c
Normal file
@@ -0,0 +1,40 @@
|
|||||||
|
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||||
|
|
||||||
|
#include <device/azalia_device.h>
|
||||||
|
|
||||||
|
const u32 cim_verb_data[] = {
|
||||||
|
/* Realtek, ALC293 */
|
||||||
|
0x10ec0293, /* Vendor ID */
|
||||||
|
0x155851a1, /* Subsystem ID */
|
||||||
|
12, /* Number of entries */
|
||||||
|
AZALIA_SUBVENDOR(0, 0x155851a1),
|
||||||
|
AZALIA_PIN_CFG(0, 0x12, 0x90a60130),
|
||||||
|
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
|
||||||
|
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
|
||||||
|
AZALIA_PIN_CFG(0, 0x15, 0x02211020),
|
||||||
|
AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
|
||||||
|
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
||||||
|
AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
||||||
|
AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
|
||||||
|
AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
|
||||||
|
AZALIA_PIN_CFG(0, 0x1d, 0x40738205),
|
||||||
|
AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
||||||
|
/* Intel, TigerlakeHDMI */
|
||||||
|
0x80862812, /* Vendor ID */
|
||||||
|
0x80860101, /* Subsystem ID */
|
||||||
|
10, /* Number of entries */
|
||||||
|
AZALIA_SUBVENDOR(2, 0x80860101),
|
||||||
|
AZALIA_PIN_CFG(2, 0x04, 0x18560010),
|
||||||
|
AZALIA_PIN_CFG(2, 0x06, 0x18560010),
|
||||||
|
AZALIA_PIN_CFG(2, 0x08, 0x18560010),
|
||||||
|
AZALIA_PIN_CFG(2, 0x0a, 0x18560010),
|
||||||
|
AZALIA_PIN_CFG(2, 0x0b, 0x18560010),
|
||||||
|
AZALIA_PIN_CFG(2, 0x0c, 0x18560010),
|
||||||
|
AZALIA_PIN_CFG(2, 0x0d, 0x18560010),
|
||||||
|
AZALIA_PIN_CFG(2, 0x0e, 0x18560010),
|
||||||
|
AZALIA_PIN_CFG(2, 0x0f, 0x18560010),
|
||||||
|
};
|
||||||
|
|
||||||
|
const u32 pc_beep_verbs[] = {};
|
||||||
|
|
||||||
|
AZALIA_ARRAY_SIZES;
|
BIN
models/darp7/me.rom
(Stored with Git LFS)
Normal file
BIN
models/darp7/me.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/darp7/microcode.rom
(Stored with Git LFS)
Normal file
BIN
models/darp7/microcode.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
BIN
models/darp7/vbt.rom
(Stored with Git LFS)
Normal file
BIN
models/darp7/vbt.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
1
models/darp8/FSP
Symbolic link
1
models/darp8/FSP
Symbolic link
@@ -0,0 +1 @@
|
|||||||
|
../gaze17-3050/FSP
|
BIN
models/darp8/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
BIN
models/darp8/IntelGopDriver.efi
(Stored with Git LFS)
Normal file
Binary file not shown.
12
models/darp8/README.md
Normal file
12
models/darp8/README.md
Normal file
@@ -0,0 +1,12 @@
|
|||||||
|
# System76 Darter Pro (darp8)
|
||||||
|
|
||||||
|
## Contents
|
||||||
|
|
||||||
|
- [EC](./ec.rom)
|
||||||
|
- *Read Error: No such file or directory (os error 2)*
|
||||||
|
- [FD](./fd.rom)
|
||||||
|
- Size: 4 KB
|
||||||
|
- HAP: false
|
||||||
|
- [ME](./me.rom)
|
||||||
|
- Size: 4824 KB
|
||||||
|
- Version: 16.0.15.1810
|
1
models/darp8/README.md.in
Normal file
1
models/darp8/README.md.in
Normal file
@@ -0,0 +1 @@
|
|||||||
|
# System76 Darter Pro (darp8)
|
1
models/darp8/chip.txt
Normal file
1
models/darp8/chip.txt
Normal file
@@ -0,0 +1 @@
|
|||||||
|
GD25Q256D
|
258
models/darp8/coreboot-collector.txt
Normal file
258
models/darp8/coreboot-collector.txt
Normal file
@@ -0,0 +1,258 @@
|
|||||||
|
## PCI ##
|
||||||
|
PCI Device: 0000:00:00.0: Class 0x00060000, Vendor 0x8086, Device 0x4621, Revision 0x02
|
||||||
|
PCI Device: 0000:00:02.0: Class 0x00030000, Vendor 0x8086, Device 0x46A6, Revision 0x0C
|
||||||
|
PCI Device: 0000:00:04.0: Class 0x00118000, Vendor 0x8086, Device 0x461D, Revision 0x02
|
||||||
|
PCI Device: 0000:00:06.0: Class 0x00088000, Vendor 0x8086, Device 0x09AB, Revision 0x00
|
||||||
|
PCI Device: 0000:00:07.0: Class 0x00060400, Vendor 0x8086, Device 0x466E, Revision 0x02
|
||||||
|
PCI Device: 0000:00:08.0: Class 0x00088000, Vendor 0x8086, Device 0x464F, Revision 0x02
|
||||||
|
PCI Device: 0000:00:0a.0: Class 0x00118000, Vendor 0x8086, Device 0x467D, Revision 0x01
|
||||||
|
PCI Device: 0000:00:0d.0: Class 0x000C0330, Vendor 0x8086, Device 0x461E, Revision 0x02
|
||||||
|
PCI Device: 0000:00:0d.2: Class 0x000C0340, Vendor 0x8086, Device 0x463E, Revision 0x02
|
||||||
|
PCI Device: 0000:00:0e.0: Class 0x00010400, Vendor 0x8086, Device 0x467F, Revision 0x00
|
||||||
|
PCI Device: 0000:00:14.0: Class 0x000C0330, Vendor 0x8086, Device 0x51ED, Revision 0x01
|
||||||
|
PCI Device: 0000:00:14.2: Class 0x00050000, Vendor 0x8086, Device 0x51EF, Revision 0x01
|
||||||
|
PCI Device: 0000:00:14.3: Class 0x00028000, Vendor 0x8086, Device 0x51F0, Revision 0x01
|
||||||
|
PCI Device: 0000:00:15.0: Class 0x000C8000, Vendor 0x8086, Device 0x51E8, Revision 0x01
|
||||||
|
PCI Device: 0000:00:15.1: Class 0x000C8000, Vendor 0x8086, Device 0x51E9, Revision 0x01
|
||||||
|
PCI Device: 0000:00:16.0: Class 0x00078000, Vendor 0x8086, Device 0x51E0, Revision 0x01
|
||||||
|
PCI Device: 0000:00:1c.0: Class 0x00060400, Vendor 0x8086, Device 0x51BD, Revision 0x01
|
||||||
|
PCI Device: 0000:00:1c.7: Class 0x00060400, Vendor 0x8086, Device 0x51BF, Revision 0x01
|
||||||
|
PCI Device: 0000:00:1d.0: Class 0x00088000, Vendor 0x8086, Device 0x09AB, Revision 0x00
|
||||||
|
PCI Device: 0000:00:1f.0: Class 0x00060100, Vendor 0x8086, Device 0x5182, Revision 0x01
|
||||||
|
PCI Device: 0000:00:1f.3: Class 0x00040300, Vendor 0x8086, Device 0x51C8, Revision 0x01
|
||||||
|
PCI Device: 0000:00:1f.4: Class 0x000C0500, Vendor 0x8086, Device 0x51A3, Revision 0x01
|
||||||
|
PCI Device: 0000:00:1f.5: Class 0x000C8000, Vendor 0x8086, Device 0x51A4, Revision 0x01
|
||||||
|
PCI Device: 0000:2a:00.0: Class 0x00080501, Vendor 0x1217, Device 0x8621, Revision 0x01
|
||||||
|
PCI Device: 0000:2b:00.0: Class 0x00020000, Vendor 0x10EC, Device 0x8168, Revision 0x15
|
||||||
|
PCI Device: 10000:e0:06.0: Class 0x00060400, Vendor 0x8086, Device 0x464D, Revision 0x02
|
||||||
|
PCI Device: 10000:e0:1d.0: Class 0x00060400, Vendor 0x8086, Device 0x51B0, Revision 0x01
|
||||||
|
PCI Device: 10000:e1:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA80A, Revision 0x00
|
||||||
|
PCI Device: 10000:e2:00.0: Class 0x00010802, Vendor 0x144D, Device 0xA808, Revision 0x00
|
||||||
|
## GPIO ##
|
||||||
|
600 Series PCH-LP
|
||||||
|
GPP_B0 (0x6E,0x00) 0x44000700 0x0003c018 0x00000100 0x00000000
|
||||||
|
GPP_B1 (0x6E,0x02) 0x44000700 0x0003c019 0x00000100 0x00000000
|
||||||
|
GPP_B2 (0x6E,0x04) 0x44000102 0x0000001a 0x00000000 0x00000000
|
||||||
|
GPP_B3 (0x6E,0x06) 0x44000102 0x0000001b 0x00000000 0x00000000
|
||||||
|
GPP_B4 (0x6E,0x08) 0x44000100 0x0000001c 0x00000000 0x00000000
|
||||||
|
GPP_B5 (0x6E,0x0A) 0x44000102 0x0000001d 0x00000000 0x00000000
|
||||||
|
GPP_B6 (0x6E,0x0C) 0x44000102 0x0000001e 0x00000000 0x00000000
|
||||||
|
GPP_B7 (0x6E,0x0E) 0x44000102 0x0000001f 0x00000000 0x00000000
|
||||||
|
GPP_B8 (0x6E,0x10) 0x44000102 0x00000020 0x00000000 0x00000000
|
||||||
|
GPP_B9 (0x6E,0x12) 0x44000102 0x00000021 0x00000000 0x00000000
|
||||||
|
GPP_B10 (0x6E,0x14) 0x44000102 0x00000022 0x00000000 0x00000000
|
||||||
|
GPP_B11 (0x6E,0x16) 0x04000702 0x00000023 0x00000000 0x00000000
|
||||||
|
GPP_B12 (0x6E,0x18) 0x44000700 0x0003c024 0x00000000 0x00000000
|
||||||
|
GPP_B13 (0x6E,0x1A) 0x44000700 0x0003c025 0x00000000 0x00000000
|
||||||
|
GPP_B14 (0x6E,0x1C) 0x44000500 0x00000026 0x00000000 0x00000000
|
||||||
|
GPP_B15 (0x6E,0x1E) 0x44000102 0x00000027 0x00000000 0x00000000
|
||||||
|
GPP_B16 (0x6E,0x20) 0x84000201 0x00000028 0x00000000 0x00000000
|
||||||
|
GPP_B17 (0x6E,0x22) 0x84000201 0x00000029 0x00000000 0x00000000
|
||||||
|
GPP_B18 (0x6E,0x24) 0x44000102 0x0000002a 0x00000100 0x00000000
|
||||||
|
GPP_B19 (0x6E,0x26) 0x44000102 0x0000002b 0x00000000 0x00000000
|
||||||
|
GPP_B20 (0x6E,0x28) 0x44000102 0x0000002c 0x00000000 0x00000000
|
||||||
|
GPP_B21 (0x6E,0x2A) 0x44000102 0x0000002d 0x00000000 0x00000000
|
||||||
|
GPP_B22 (0x6E,0x2C) 0x44000102 0x0000002e 0x00000000 0x00000000
|
||||||
|
GPP_B23 (0x6E,0x2E) 0x44000102 0x0000002f 0x00000000 0x00000000
|
||||||
|
GPP_T2 (0x6E,0x38) 0x44000b00 0x00001032 0x00000000 0x00000000
|
||||||
|
GPP_T3 (0x6E,0x3A) 0x44000b00 0x00001033 0x00000000 0x00000000
|
||||||
|
GPP_A0 (0x6E,0x54) 0x44000700 0x0003f040 0x00000100 0x00000000
|
||||||
|
GPP_A1 (0x6E,0x56) 0x44000702 0x0003f041 0x00000100 0x00000000
|
||||||
|
GPP_A2 (0x6E,0x58) 0x44000700 0x0003f042 0x00000100 0x00000000
|
||||||
|
GPP_A3 (0x6E,0x5A) 0x44000700 0x0003f043 0x00000100 0x00000000
|
||||||
|
GPP_A4 (0x6E,0x5C) 0x44000700 0x0003f044 0x00000100 0x00000000
|
||||||
|
GPP_A5 (0x6E,0x5E) 0x44000702 0x00003045 0x00000100 0x00000000
|
||||||
|
GPP_A6 (0x6E,0x60) 0x44000102 0x00003046 0x00000100 0x00000000
|
||||||
|
GPP_A7 (0x6E,0x62) 0x44000102 0x00000047 0x00000000 0x00000000
|
||||||
|
GPP_A8 (0x6E,0x64) 0x84000201 0x00000048 0x00000000 0x00000000
|
||||||
|
GPP_A9 (0x6E,0x66) 0x44000700 0x0003d049 0x00000100 0x00000000
|
||||||
|
GPP_A10 (0x6E,0x68) 0x44000700 0x0003c04a 0x00000100 0x00000000
|
||||||
|
GPP_A11 (0x6E,0x6A) 0x44000102 0x0000004b 0x00000000 0x00000000
|
||||||
|
GPP_A12 (0x6E,0x6C) 0x44000702 0x0000304c 0x00000000 0x00000000
|
||||||
|
GPP_A13 (0x6E,0x6E) 0x84000201 0x0000004d 0x00000000 0x00000000
|
||||||
|
GPP_A14 (0x6E,0x70) 0x44000102 0x0000004e 0x00000000 0x00000000
|
||||||
|
GPP_A15 (0x6E,0x72) 0x44000102 0x0000004f 0x00000000 0x00000000
|
||||||
|
GPP_A16 (0x6E,0x74) 0x44000702 0x00000050 0x00000000 0x00000000
|
||||||
|
GPP_A17 (0x6E,0x76) 0x44000102 0x00000051 0x00000000 0x00000000
|
||||||
|
GPP_A18 (0x6E,0x78) 0x44000500 0x00024052 0x00000000 0x00000000
|
||||||
|
GPP_A19 (0x6E,0x7A) 0x44000102 0x00000053 0x00000000 0x00000000
|
||||||
|
GPP_A20 (0x6E,0x7C) 0x44000102 0x00000054 0x00000000 0x00000000
|
||||||
|
GPP_A21 (0x6E,0x7E) 0x44000102 0x00000055 0x00000000 0x00000000
|
||||||
|
GPP_A22 (0x6E,0x80) 0x44000102 0x00000056 0x00000000 0x00000000
|
||||||
|
GPP_A23 (0x6E,0x82) 0x44000700 0x00003057 0x00000100 0x00000000
|
||||||
|
GPP_S0 (0x6D,0x00) 0x44000100 0x0180006c 0x00000000 0x00000000
|
||||||
|
GPP_S1 (0x6D,0x02) 0x44000100 0x0180006d 0x00000000 0x00000000
|
||||||
|
GPP_S2 (0x6D,0x04) 0x44000100 0x0180006e 0x00000000 0x00000000
|
||||||
|
GPP_S3 (0x6D,0x06) 0x44000100 0x0180006f 0x00000000 0x00000000
|
||||||
|
GPP_S4 (0x6D,0x08) 0x44000100 0x01800070 0x00000000 0x00000000
|
||||||
|
GPP_S5 (0x6D,0x0A) 0x44000100 0x01800071 0x00000000 0x00000000
|
||||||
|
GPP_S6 (0x6D,0x0C) 0x44000100 0x01800072 0x00000000 0x00000000
|
||||||
|
GPP_S7 (0x6D,0x0E) 0x44000100 0x01800073 0x00000000 0x00000000
|
||||||
|
GPP_H0 (0x6D,0x10) 0x84000201 0x00000074 0x00000000 0x00000000
|
||||||
|
GPP_H1 (0x6D,0x12) 0x84000201 0x00000075 0x00000000 0x00000000
|
||||||
|
GPP_H2 (0x6D,0x14) 0x84000201 0x00000076 0x00000000 0x00000000
|
||||||
|
GPP_H3 (0x6D,0x16) 0x44000102 0x00000077 0x00000000 0x00000000
|
||||||
|
GPP_H4 (0x6D,0x18) 0x44000502 0x00000018 0x00000000 0x00000000
|
||||||
|
GPP_H5 (0x6D,0x1A) 0x44000502 0x00000019 0x00000000 0x00000000
|
||||||
|
GPP_H6 (0x6D,0x1C) 0x44000502 0x0000001a 0x00000000 0x00000000
|
||||||
|
GPP_H7 (0x6D,0x1E) 0x44000502 0x0000001b 0x00000000 0x00000000
|
||||||
|
GPP_H8 (0x6D,0x20) 0x44000902 0x0000001c 0x00000100 0x00000000
|
||||||
|
GPP_H9 (0x6D,0x22) 0x44000900 0x0000001d 0x00000100 0x00000000
|
||||||
|
GPP_H10 (0x6D,0x24) 0x44000102 0x0000001e 0x00000000 0x00000000
|
||||||
|
GPP_H11 (0x6D,0x26) 0x44000102 0x0000001f 0x00000000 0x00000000
|
||||||
|
GPP_H12 (0x6D,0x28) 0x44001500 0x00000020 0x00000000 0x00000000
|
||||||
|
GPP_H13 (0x6D,0x2A) 0x44000102 0x00000021 0x00000000 0x00000000
|
||||||
|
GPP_H14 (0x6D,0x2C) 0x44000102 0x00000022 0x00000000 0x00000000
|
||||||
|
GPP_H15 (0x6D,0x2E) 0x44000500 0x0003c023 0x00000000 0x00000000
|
||||||
|
GPP_H16 (0x6D,0x30) 0x44000102 0x00000024 0x00000000 0x00000000
|
||||||
|
GPP_H17 (0x6D,0x32) 0x44000502 0x0003c025 0x00000000 0x00000000
|
||||||
|
GPP_H18 (0x6D,0x34) 0x44000700 0x0003c026 0x00000000 0x00000000
|
||||||
|
GPP_H19 (0x6D,0x36) 0x44000700 0x00000027 0x00000000 0x00000000
|
||||||
|
GPP_H20 (0x6D,0x38) 0x44000102 0x00000028 0x00000000 0x00000000
|
||||||
|
GPP_H21 (0x6D,0x3A) 0x44000102 0x00000029 0x00000000 0x00000000
|
||||||
|
GPP_H22 (0x6D,0x3C) 0x44000102 0x0000002a 0x00000000 0x00000000
|
||||||
|
GPP_H23 (0x6D,0x3E) 0x44000b02 0x0000002b 0x00000000 0x00000000
|
||||||
|
GPP_D0 (0x6D,0x40) 0x44000201 0x0000002c 0x00000000 0x00000000
|
||||||
|
GPP_D1 (0x6D,0x42) 0x44000102 0x0000002d 0x00000000 0x00000000
|
||||||
|
GPP_D2 (0x6D,0x44) 0x44000200 0x0000002e 0x00000000 0x00000000
|
||||||
|
GPP_D3 (0x6D,0x46) 0x44000102 0x0000002f 0x00000000 0x00000000
|
||||||
|
GPP_D4 (0x6D,0x48) 0x44000201 0x00000030 0x00000000 0x00000000
|
||||||
|
GPP_D5 (0x6D,0x4A) 0x44000700 0x00000031 0x00000000 0x00000000
|
||||||
|
GPP_D6 (0x6D,0x4C) 0x44000201 0x00000032 0x00000000 0x00000000
|
||||||
|
GPP_D7 (0x6D,0x4E) 0x44000702 0x00000033 0x00000000 0x00000000
|
||||||
|
GPP_D8 (0x6D,0x50) 0x44000102 0x00000034 0x00000000 0x00000000
|
||||||
|
GPP_D9 (0x6D,0x52) 0x44000102 0x00003c35 0x00000100 0x00000000
|
||||||
|
GPP_D10 (0x6D,0x54) 0x44000102 0x00003c36 0x00000100 0x00000000
|
||||||
|
GPP_D11 (0x6D,0x56) 0x44000102 0x00003c37 0x00000100 0x00000000
|
||||||
|
GPP_D12 (0x6D,0x58) 0x44000102 0x00003c38 0x00000100 0x00000000
|
||||||
|
GPP_D13 (0x6D,0x5A) 0x44000102 0x00000039 0x00000000 0x00000000
|
||||||
|
GPP_D14 (0x6D,0x5C) 0x84000201 0x0000003a 0x00000000 0x00000000
|
||||||
|
GPP_D15 (0x6D,0x5E) 0x44000201 0x0000003b 0x00000000 0x00000000
|
||||||
|
GPP_D16 (0x6D,0x60) 0x44000201 0x0000003c 0x00000000 0x00000000
|
||||||
|
GPP_D17 (0x6D,0x62) 0x44000102 0x0000003d 0x00000000 0x00000000
|
||||||
|
GPP_D18 (0x6D,0x64) 0x44000102 0x0000003e 0x00000000 0x00000000
|
||||||
|
GPP_D19 (0x6D,0x66) 0x44000102 0x0000003f 0x00000000 0x00000000
|
||||||
|
GPD0 (0x6C,0x00) 0x04000702 0x00003060 0x00000000 0x00000000
|
||||||
|
GPD1 (0x6C,0x02) 0x04000702 0x00003c61 0x00000000 0x00000000
|
||||||
|
GPD2 (0x6C,0x04) 0x04000702 0x00003c62 0x00000000 0x00000000
|
||||||
|
GPD3 (0x6C,0x06) 0x04000702 0x00003063 0x00000010 0x00000000
|
||||||
|
GPD4 (0x6C,0x08) 0x04000600 0x00000064 0x00000000 0x00000000
|
||||||
|
GPD5 (0x6C,0x0A) 0x04000600 0x00000065 0x00000000 0x00000000
|
||||||
|
GPD6 (0x6C,0x0C) 0x04000600 0x00000066 0x00000000 0x00000000
|
||||||
|
GPD7 (0x6C,0x0E) 0x04000102 0x00000067 0x00000000 0x00000000
|
||||||
|
GPD8 (0x6C,0x10) 0x04000700 0x00000068 0x00000000 0x00000000
|
||||||
|
GPD9 (0x6C,0x12) 0x04000200 0x00000069 0x00000000 0x00000000
|
||||||
|
GPD10 (0x6C,0x14) 0x04000600 0x0000006a 0x00000000 0x00000000
|
||||||
|
GPD11 (0x6C,0x16) 0x04000600 0x0000006b 0x00000000 0x00000000
|
||||||
|
GPP_C0 (0x6A,0x00) 0x44000502 0x0003c06e 0x00000000 0x00000000
|
||||||
|
GPP_C1 (0x6A,0x02) 0x44000502 0x0003c06f 0x00000000 0x00000000
|
||||||
|
GPP_C2 (0x6A,0x04) 0x84000201 0x00000070 0x00000800 0x00000000
|
||||||
|
GPP_C3 (0x6A,0x06) 0x44000502 0x00000071 0x00000000 0x00000000
|
||||||
|
GPP_C4 (0x6A,0x08) 0x44000502 0x00000072 0x00000000 0x00000000
|
||||||
|
GPP_C5 (0x6A,0x0A) 0x44000102 0x00000073 0x00000000 0x00000000
|
||||||
|
GPP_C6 (0x6A,0x0C) 0x44000502 0x00000074 0x00000000 0x00000000
|
||||||
|
GPP_C7 (0x6A,0x0E) 0x44000502 0x00000075 0x00000000 0x00000000
|
||||||
|
GPP_C8 (0x6A,0x10) 0x44000300 0x00000076 0x00000000 0x00000000
|
||||||
|
GPP_C9 (0x6A,0x12) 0x44000300 0x00000077 0x00000000 0x00000000
|
||||||
|
GPP_C10 (0x6A,0x14) 0x44000300 0x00000018 0x00000000 0x00000000
|
||||||
|
GPP_C11 (0x6A,0x16) 0x44000300 0x00000019 0x00000000 0x00000000
|
||||||
|
GPP_C12 (0x6A,0x18) 0x44000300 0x0000001a 0x00000000 0x00000000
|
||||||
|
GPP_C13 (0x6A,0x1A) 0x44000300 0x0000001b 0x00000000 0x00000000
|
||||||
|
GPP_C14 (0x6A,0x1C) 0x44000300 0x0000001c 0x00000000 0x00000000
|
||||||
|
GPP_C15 (0x6A,0x1E) 0x44000300 0x0000001d 0x00000000 0x00000000
|
||||||
|
GPP_C16 (0x6A,0x20) 0x44000300 0x0000001e 0x00000000 0x00000000
|
||||||
|
GPP_C17 (0x6A,0x22) 0x44000300 0x0000001f 0x00000000 0x00000000
|
||||||
|
GPP_C18 (0x6A,0x24) 0x44000300 0x00000020 0x00000000 0x00000000
|
||||||
|
GPP_C19 (0x6A,0x26) 0x44000300 0x00000021 0x00000000 0x00000000
|
||||||
|
GPP_C20 (0x6A,0x28) 0x44000300 0x00000022 0x00000000 0x00000000
|
||||||
|
GPP_C21 (0x6A,0x2A) 0x44000300 0x00000023 0x00000000 0x00000000
|
||||||
|
GPP_C22 (0x6A,0x2C) 0x44000300 0x00000024 0x00000000 0x00000000
|
||||||
|
GPP_C23 (0x6A,0x2E) 0x44000300 0x00000025 0x00000000 0x00000000
|
||||||
|
GPP_F0 (0x6A,0x30) 0x44000500 0x0003c056 0x00000100 0x00000000
|
||||||
|
GPP_F1 (0x6A,0x32) 0x44000502 0x0003f057 0x00000100 0x00000000
|
||||||
|
GPP_F2 (0x6A,0x34) 0x44000500 0x0003c058 0x00000100 0x00000000
|
||||||
|
GPP_F3 (0x6A,0x36) 0x44000500 0x0003f059 0x00000100 0x00000000
|
||||||
|
GPP_F4 (0x6A,0x38) 0x44000500 0x0003c05a 0x00000100 0x00000000
|
||||||
|
GPP_F5 (0x6A,0x3A) 0x44000900 0x0003c05b 0x00000100 0x00000000
|
||||||
|
GPP_F6 (0x6A,0x3C) 0x44000502 0x0000005c 0x00000100 0x00000000
|
||||||
|
GPP_F7 (0x6A,0x3E) 0x44000102 0x0000005d 0x00000000 0x00000000
|
||||||
|
GPP_F8 (0x6A,0x40) 0x44000102 0x0000005e 0x00000000 0x00000000
|
||||||
|
GPP_F9 (0x6A,0x42) 0x44000102 0x0000005f 0x00000000 0x00000000
|
||||||
|
GPP_F10 (0x6A,0x44) 0x44000102 0x00000060 0x00000000 0x00000000
|
||||||
|
GPP_F11 (0x6A,0x46) 0x44000102 0x00000061 0x00000000 0x00000000
|
||||||
|
GPP_F12 (0x6A,0x48) 0x44000102 0x00000062 0x00000100 0x00000000
|
||||||
|
GPP_F13 (0x6A,0x4A) 0x44000102 0x00000063 0x00000000 0x00000000
|
||||||
|
GPP_F14 (0x6A,0x4C) 0x44000100 0x00000064 0x00000000 0x00000000
|
||||||
|
GPP_F15 (0x6A,0x4E) 0x44000102 0x00000065 0x00000000 0x00000000
|
||||||
|
GPP_F16 (0x6A,0x50) 0x44000102 0x00000066 0x00000000 0x00000000
|
||||||
|
GPP_F17 (0x6A,0x52) 0x84000201 0x00000067 0x00000000 0x00000000
|
||||||
|
GPP_F18 (0x6A,0x54) 0x44000200 0x00000068 0x00000000 0x00000000
|
||||||
|
GPP_F19 (0x6A,0x56) 0x44000702 0x00000069 0x00000000 0x00000000
|
||||||
|
GPP_F20 (0x6A,0x58) 0x84000201 0x0003c06a 0x00000000 0x00000000
|
||||||
|
GPP_F21 (0x6A,0x5A) 0x44000102 0x0003c06b 0x00000000 0x00000000
|
||||||
|
GPP_F22 (0x6A,0x5C) 0x44000500 0x0003c06c 0x00000000 0x00000000
|
||||||
|
GPP_F23 (0x6A,0x5E) 0x44000500 0x0003c06d 0x00000000 0x00000000
|
||||||
|
GPP_E0 (0x6A,0x6E) 0x44000102 0x00000026 0x00000000 0x00000000
|
||||||
|
GPP_E1 (0x6A,0x70) 0x40100102 0x00003027 0x00000000 0x00000000
|
||||||
|
GPP_E2 (0x6A,0x72) 0x44000102 0x00000028 0x00000000 0x00000000
|
||||||
|
GPP_E3 (0x6A,0x74) 0x84000201 0x00000029 0x00000000 0x00000000
|
||||||
|
GPP_E4 (0x6A,0x76) 0x84000200 0x00000030 0x00000000 0x00000000
|
||||||
|
GPP_E5 (0x6A,0x78) 0x44000102 0x00000031 0x00000000 0x00000000
|
||||||
|
GPP_E6 (0x6A,0x7A) 0x44000102 0x00000032 0x00000900 0x00000000
|
||||||
|
GPP_E7 (0x6A,0x7C) 0x44000102 0x00000033 0x00000000 0x00000000
|
||||||
|
GPP_E8 (0x6A,0x7E) 0x44000100 0x00000034 0x00000000 0x00000000
|
||||||
|
GPP_E9 (0x6A,0x80) 0x44000502 0x00000035 0x00000800 0x00000000
|
||||||
|
GPP_E10 (0x6A,0x82) 0x44000102 0x00000036 0x00000800 0x00000000
|
||||||
|
GPP_E11 (0x6A,0x84) 0x44000102 0x00000037 0x00000800 0x00000000
|
||||||
|
GPP_E12 (0x6A,0x86) 0x40100102 0x00000038 0x00000000 0x00000000
|
||||||
|
GPP_E13 (0x6A,0x88) 0x44000102 0x00000039 0x00000000 0x00000000
|
||||||
|
GPP_E14 (0x6A,0x8A) 0x44000702 0x0002403a 0x00000000 0x00000000
|
||||||
|
GPP_E15 (0x6A,0x8C) 0x44000102 0x0000003b 0x00000000 0x00000000
|
||||||
|
GPP_E16 (0x6A,0x8E) 0x44000102 0x0000003c 0x00000000 0x00000000
|
||||||
|
GPP_E17 (0x6A,0x90) 0x44000102 0x0000003d 0x00000000 0x00000000
|
||||||
|
GPP_E18 (0x6A,0x92) 0x44000300 0x00003c3e 0x00000000 0x00000000
|
||||||
|
GPP_E19 (0x6A,0x94) 0x44000300 0x00003c3f 0x00000000 0x00000000
|
||||||
|
GPP_E20 (0x6A,0x96) 0x44000102 0x00003c40 0x00000100 0x00000000
|
||||||
|
GPP_E21 (0x6A,0x98) 0x44000102 0x00003c41 0x00000100 0x00000000
|
||||||
|
GPP_E22 (0x6A,0x9A) 0x44000100 0x00001042 0x00000000 0x00000000
|
||||||
|
GPP_E23 (0x6A,0x9C) 0x44000102 0x00000043 0x00000000 0x00000000
|
||||||
|
GPP_R0 (0x69,0x00) 0x44000500 0x0003c058 0x00000000 0x00000000
|
||||||
|
GPP_R1 (0x69,0x02) 0x44000500 0x0003fc59 0x00000000 0x00000000
|
||||||
|
GPP_R2 (0x69,0x04) 0x44000500 0x0003fc5a 0x00000000 0x00000000
|
||||||
|
GPP_R3 (0x69,0x06) 0x44000500 0x0003fc5b 0x00000000 0x00000000
|
||||||
|
GPP_R4 (0x69,0x08) 0x44000500 0x0003c05c 0x00000000 0x00000000
|
||||||
|
GPP_R5 (0x69,0x0A) 0x44000102 0x0000005d 0x00000000 0x00000000
|
||||||
|
GPP_R6 (0x69,0x0C) 0x44000102 0x0000005e 0x00000000 0x00000000
|
||||||
|
GPP_R7 (0x69,0x0E) 0x44000102 0x0000005f 0x00000000 0x00000000
|
||||||
|
## HDAUDIO ##
|
||||||
|
hdaudioC0D0
|
||||||
|
vendor_name: Realtek
|
||||||
|
chip_name: ALC256
|
||||||
|
vendor_id: 0x10ec0256
|
||||||
|
subsystem_id: 0x15587716
|
||||||
|
revision_id: 0x100002
|
||||||
|
0x12: 0x90a60130
|
||||||
|
0x13: 0x40000000
|
||||||
|
0x14: 0x90170110
|
||||||
|
0x18: 0x411111f0
|
||||||
|
0x19: 0x411111f0
|
||||||
|
0x1a: 0x411111f0
|
||||||
|
0x1b: 0x411111f0
|
||||||
|
0x1d: 0x41700001
|
||||||
|
0x1e: 0x411111f0
|
||||||
|
0x21: 0x02211020
|
||||||
|
hdaudioC0D2
|
||||||
|
vendor_name: Intel
|
||||||
|
chip_name: Alderlake-P HDMI
|
||||||
|
vendor_id: 0x8086281c
|
||||||
|
subsystem_id: 0x80860101
|
||||||
|
revision_id: 0x100000
|
||||||
|
0x04: 0x18560010
|
||||||
|
0x06: 0x18560010
|
||||||
|
0x08: 0x18560010
|
||||||
|
0x0a: 0x18560010
|
||||||
|
0x0b: 0x18560010
|
||||||
|
0x0c: 0x18560010
|
||||||
|
0x0d: 0x18560010
|
||||||
|
0x0e: 0x18560010
|
||||||
|
0x0f: 0x18560010
|
23
models/darp8/coreboot.config
Normal file
23
models/darp8/coreboot.config
Normal file
@@ -0,0 +1,23 @@
|
|||||||
|
CONFIG_VENDOR_SYSTEM76=y
|
||||||
|
CONFIG_BOARD_SYSTEM76_DARP8=y
|
||||||
|
CONFIG_ADD_FSP_BINARIES=y
|
||||||
|
CONFIG_CCACHE=y
|
||||||
|
CONFIG_CONSOLE_SERIAL=n
|
||||||
|
CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
|
||||||
|
CONFIG_CPU_UCODE_BINARIES="$(FIRMWARE_OPEN_MODEL_DIR)/microcode.rom"
|
||||||
|
CONFIG_FSP_HEADER_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/FSP/Include"
|
||||||
|
CONFIG_FSP_FD_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/FSP/Fsp.fd"
|
||||||
|
CONFIG_FSP_FULL_FD=y
|
||||||
|
CONFIG_HAVE_IFD_BIN=y
|
||||||
|
CONFIG_HAVE_ME_BIN=y
|
||||||
|
CONFIG_IFD_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/fd.rom"
|
||||||
|
CONFIG_ME_BIN_PATH="$(FIRMWARE_OPEN_MODEL_DIR)/me.rom"
|
||||||
|
CONFIG_PAYLOAD_ELF=y
|
||||||
|
CONFIG_PAYLOAD_FILE="$(FIRMWARE_OPEN_UEFIPAYLOAD)"
|
||||||
|
CONFIG_POST_IO=n
|
||||||
|
CONFIG_RUN_FSP_GOP=y
|
||||||
|
CONFIG_SMMSTORE=y
|
||||||
|
CONFIG_SMMSTORE_V2=y
|
||||||
|
CONFIG_USE_OPTION_TABLE=y
|
||||||
|
CONFIG_VALIDATE_INTEL_DESCRIPTOR=y
|
||||||
|
#CONFIG_CONSOLE_SYSTEM76_EC=y
|
1
models/darp8/ec.config
Normal file
1
models/darp8/ec.config
Normal file
@@ -0,0 +1 @@
|
|||||||
|
BOARD=system76/darp8
|
89
models/darp8/ecspy.txt
Normal file
89
models/darp8/ecspy.txt
Normal file
@@ -0,0 +1,89 @@
|
|||||||
|
id 5570 rev 6
|
||||||
|
A0: data 1 mirror 1 pot 0 control 00
|
||||||
|
A1: data 0 mirror 0 pot 0 control 00
|
||||||
|
A2: data 1 mirror 1 pot 0 control 00
|
||||||
|
A3: data 0 mirror 0 pot 0 control 80
|
||||||
|
A4: data 1 mirror 1 pot 0 control 44
|
||||||
|
A5: data 0 mirror 0 pot 0 control 00
|
||||||
|
A6: data 0 mirror 0 pot 0 control 00
|
||||||
|
A7: data 0 mirror 1 pot 0 control 00
|
||||||
|
B0: data 0 mirror 0 pot 0 control 84
|
||||||
|
B1: data 1 mirror 1 pot 0 control 84
|
||||||
|
B2: data 1 mirror 1 pot 0 control 44
|
||||||
|
B3: data 1 mirror 1 pot 0 control 80
|
||||||
|
B4: data 1 mirror 1 pot 0 control 40
|
||||||
|
B5: data 0 mirror 0 pot 0 control 44
|
||||||
|
B6: data 1 mirror 1 pot 0 control 44
|
||||||
|
B7: data 1 mirror 1 pot 0 control 82
|
||||||
|
C0: data 1 mirror 1 pot 0 control 80
|
||||||
|
C1: data 1 mirror 1 pot 0 control 04
|
||||||
|
C2: data 1 mirror 1 pot 0 control 04
|
||||||
|
C3: data 0 mirror 0 pot 0 control 04
|
||||||
|
C4: data 0 mirror 0 pot 0 control 84
|
||||||
|
C5: data 0 mirror 0 pot 0 control 04
|
||||||
|
C6: data 0 mirror 0 pot 0 control 82
|
||||||
|
C7: data 0 mirror 0 pot 0 control 44
|
||||||
|
D0: data 1 mirror 1 pot 0 control 44
|
||||||
|
D1: data 1 mirror 1 pot 0 control 44
|
||||||
|
D2: data 1 mirror 1 pot 0 control 00
|
||||||
|
D3: data 1 mirror 1 pot 0 control 82
|
||||||
|
D4: data 1 mirror 1 pot 0 control 80
|
||||||
|
D5: data 1 mirror 1 pot 0 control 44
|
||||||
|
D6: data 1 mirror 1 pot 0 control 02
|
||||||
|
D7: data 0 mirror 0 pot 0 control 80
|
||||||
|
E0: data 1 mirror 1 pot 0 control 04
|
||||||
|
E1: data 1 mirror 1 pot 0 control 44
|
||||||
|
E2: data 0 mirror 0 pot 0 control 84
|
||||||
|
E3: data 1 mirror 1 pot 0 control 40
|
||||||
|
E4: data 1 mirror 1 pot 0 control 42
|
||||||
|
E5: data 1 mirror 1 pot 0 control 40
|
||||||
|
E6: data 1 mirror 1 pot 0 control 80
|
||||||
|
E7: data 1 mirror 1 pot 0 control 04
|
||||||
|
F0: data 0 mirror 0 pot 0 control 44
|
||||||
|
F1: data 1 mirror 1 pot 0 control 44
|
||||||
|
F2: data 1 mirror 1 pot 0 control 44
|
||||||
|
F3: data 0 mirror 0 pot 0 control 82
|
||||||
|
F4: data 1 mirror 1 pot 0 control 04
|
||||||
|
F5: data 1 mirror 1 pot 0 control 04
|
||||||
|
F6: data 0 mirror 0 pot 0 control 00
|
||||||
|
F7: data 1 mirror 1 pot 0 control 44
|
||||||
|
G0: data 1 mirror 1 pot 0 control 80
|
||||||
|
G1: data 1 mirror 1 pot 0 control 44
|
||||||
|
G2: data 1 mirror 1 pot 0 control 80
|
||||||
|
G3: data 0 mirror 0 pot 0 control 00
|
||||||
|
G4: data 0 mirror 0 pot 0 control 00
|
||||||
|
G5: data 0 mirror 0 pot 0 control 00
|
||||||
|
G6: data 0 mirror 0 pot 0 control 44
|
||||||
|
G7: data 0 mirror 0 pot 0 control 00
|
||||||
|
H0: data 0 mirror 0 pot 0 control 44
|
||||||
|
H1: data 1 mirror 1 pot 0 control 80
|
||||||
|
H2: data 1 mirror 1 pot 0 control 44
|
||||||
|
H3: data 1 mirror 1 pot 0 control 80
|
||||||
|
H4: data 1 mirror 1 pot 0 control 84
|
||||||
|
H5: data 0 mirror 0 pot 0 control 40
|
||||||
|
H6: data 1 mirror 1 pot 0 control 80
|
||||||
|
H7: data 0 mirror 0 pot 0 control 82
|
||||||
|
I0: data 0 mirror 0 pot 0 control 00
|
||||||
|
I1: data 0 mirror 0 pot 0 control 00
|
||||||
|
I2: data 0 mirror 0 pot 0 control 80
|
||||||
|
I3: data 0 mirror 0 pot 0 control 80
|
||||||
|
I4: data 0 mirror 0 pot 0 control 00
|
||||||
|
I5: data 1 mirror 1 pot 0 control 80
|
||||||
|
I6: data 1 mirror 1 pot 0 control 80
|
||||||
|
I7: data 0 mirror 0 pot 0 control 00
|
||||||
|
J0: data 1 mirror 1 pot 0 control 44
|
||||||
|
J1: data 1 mirror 1 pot 0 control 40
|
||||||
|
J2: data 0 mirror 0 pot 0 control 82
|
||||||
|
J3: data 1 mirror 1 pot 0 control 80
|
||||||
|
J4: data 1 mirror 1 pot 0 control 40
|
||||||
|
J5: data 1 mirror 1 pot 0 control 80
|
||||||
|
J6: data 0 mirror 0 pot 0 control 80
|
||||||
|
J7: data 1 mirror 1 pot 0 control 80
|
||||||
|
M0: data 0 mirror 0 control 06
|
||||||
|
M1: data 1 mirror 1 control 06
|
||||||
|
M2: data 1 mirror 1 control 06
|
||||||
|
M3: data 1 mirror 1 control 06
|
||||||
|
M4: data 1 mirror 1 control 06
|
||||||
|
M5: data 0 mirror 0 control 00
|
||||||
|
M6: data 1 mirror 1 control 86
|
||||||
|
M7: data 0 mirror 0 control 00
|
9
models/darp8/edk2.config
Normal file
9
models/darp8/edk2.config
Normal file
@@ -0,0 +1,9 @@
|
|||||||
|
BOOTLOADER=COREBOOT
|
||||||
|
DISABLE_SERIAL_TERMINAL=TRUE
|
||||||
|
PLATFORM_BOOT_TIMEOUT=2
|
||||||
|
PS2_KEYBOARD_ENABLE=TRUE
|
||||||
|
#SECURE_BOOT_ENABLE=TRUE
|
||||||
|
SERIAL_DRIVER_ENABLE=FALSE
|
||||||
|
SHELL_TYPE=NONE
|
||||||
|
TPM_ENABLE=TRUE
|
||||||
|
#SYSTEM76_EC_LOGGING=TRUE
|
BIN
models/darp8/fd.rom
(Stored with Git LFS)
Normal file
BIN
models/darp8/fd.rom
(Stored with Git LFS)
Normal file
Binary file not shown.
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user