mb/google/ovis/var/deku: Set TCC_offset to 5

Adjust settings as recommended by thermal team.

Set tcc_offset value to 5 in devicetree.

BUG=b:308704811
BRANCH=firmware-rex-15709.B
TEST=emerge-ovis coreboot chromeos-bootimage
     built bootleg and verified test result by thermal team

Change-Id: I30f54ae6017c54c91ff9b432bba0ebd5bfc65ab9
Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82614
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Eric Lai <ericllai@google.com>

src/mainboard/google/rex/variants/deku/overridetree.cb

@@ -27,6 +27,9 @@ chip soc/intel/meteorlake
 		[DDI_PORT_4] = DDI_ENABLE_HPD,
 	}"
 
+	# Temporary setting TCC of 105C = Tj max (110) - TCC_Offset (5)
+	register "tcc_offset" = "5"
+
 	register "serial_io_i2c_mode" = "{
 		[PchSerialIoIndexI2C0] = PchSerialIoDisabled,
 		[PchSerialIoIndexI2C1] = PchSerialIoDisabled,