Add rtd3 config for lemp10 m.2 slots
Change-Id: I0d49ba23205801dbcca7fe420ed8e763e1e80514
This commit is contained in:
@@ -235,7 +235,14 @@ chip soc/intel/tigerlake
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device pci 02.0 on end # Graphics
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device pci 04.0 on end # DPTF 0x9A03
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device pci 05.0 off end # IPU 0x9A19
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device pci 06.0 on end # PEG60 0x9A09
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device pci 06.0 on
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chip soc/intel/common/block/pcie/rtd3
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register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C13)"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C22)"
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register "srcclk_pin" = "3"
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device generic 0 on end
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end
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end # PEG60 0x9A09
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device pci 07.0 on end # TBT_PCIe0 0x9A23
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device pci 07.1 off end # TBT_PCIe1 0x9A25
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device pci 07.2 off end # TBT_PCIe2 0x9A27
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@@ -297,7 +304,14 @@ chip soc/intel/tigerlake
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device pci 1c.5 on end # RP6 0xA0BD
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device pci 1c.6 off end # RP7 0xA0BE
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device pci 1c.7 off end # RP8 0xA0BF
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device pci 1d.0 on end # RP9 0xA0B0
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device pci 1d.0 on
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chip soc/intel/common/block/pcie/rtd3
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register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D9)"
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register "srcclk_pin" = "0"
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device generic 0 on end
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end
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end # RP9 0xA0B0
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device pci 1d.1 off end # RP10 0xA0B1
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device pci 1d.2 off end # RP11 0xA0B2
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device pci 1d.3 off end # RP12 0xA0B3
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