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soc/intel/alderlake: Move RPL-HX power limits to correct file

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`chipset.cb` is not used when PCH-S is selected, as is the case for
RPL-HX. Fix setting power limits by putting the definitions in the
correct file.

Change-Id: Ia823ab82afdc76c3eb6f15cd2617b0780c84e8c4
Signed-off-by: Tim Crawford <tcrawford@system76.com>
This commit is contained in:
Tim Crawford
2023-07-13 07:49:26 -06:00
committed by Jeremy Soller
parent 08d2a35246
commit 27ea93d87b
2 changed files with 30 additions and 30 deletions
Download Patch File Download Diff File Expand all files Collapse all files

30
src/soc/intel/alderlake/chipset.cb
View File

@ -90,36 +90,6 @@ chip soc/intel/alderlake
.tdp_pl4 = 114,
}"
register "power_limits_config[RPL_HX_8_16_55W_CORE]" = "{
.tdp_pl1_override = 55,
.tdp_pl2_override = 130,
.tdp_pl4 = 200,
}"
register "power_limits_config[RPL_HX_8_12_55W_CORE]" = "{
.tdp_pl1_override = 55,
.tdp_pl2_override = 130,
.tdp_pl4 = 200,
}"
register "power_limits_config[RPL_HX_8_8_55W_CORE]" = "{
.tdp_pl1_override = 55,
.tdp_pl2_override = 130,
.tdp_pl4 = 200,
}"
register "power_limits_config[RPL_HX_6_8_55W_CORE]" = "{
.tdp_pl1_override = 55,
.tdp_pl2_override = 130,
.tdp_pl4 = 200,
}"
register "power_limits_config[RPL_HX_6_4_55W_CORE]" = "{
.tdp_pl1_override = 55,
.tdp_pl2_override = 130,
.tdp_pl4 = 200,
}"
# NOTE: if any variant wants to override this value, use the same format
# as register "common_soc_config.pch_thermal_trip" = "value", instead of
# putting it under register "common_soc_config" in overridetree.cb file.

30
src/soc/intel/alderlake/chipset_pch_s.cb
View File

@ -92,6 +92,36 @@ chip soc/intel/alderlake
.tdp_pl4 = 44,
}"
register "power_limits_config[RPL_HX_8_16_55W_CORE]" = "{
.tdp_pl1_override = 55,
.tdp_pl2_override = 130,
.tdp_pl4 = 200,
}"
register "power_limits_config[RPL_HX_8_12_55W_CORE]" = "{
.tdp_pl1_override = 55,
.tdp_pl2_override = 130,
.tdp_pl4 = 200,
}"
register "power_limits_config[RPL_HX_8_8_55W_CORE]" = "{
.tdp_pl1_override = 55,
.tdp_pl2_override = 130,
.tdp_pl4 = 200,
}"
register "power_limits_config[RPL_HX_6_8_55W_CORE]" = "{
.tdp_pl1_override = 55,
.tdp_pl2_override = 130,
.tdp_pl4 = 200,
}"
register "power_limits_config[RPL_HX_6_4_55W_CORE]" = "{
.tdp_pl1_override = 55,
.tdp_pl2_override = 130,
.tdp_pl4 = 200,
}"
# NOTE: if any variant wants to override this value, use the same format
# as register "common_soc_config.pch_thermal_trip" = "value", instead of
# putting it under register "common_soc_config" in overridetree.cb file.