mb/**/cmos.layout: Remove crusty comments
Most of these comments have been copy-pasted or serve no purpose other than to eventually turn into misleading info. While the description of the first 120 bits of CMOS could be useful, it should instead be added to the documentation for the CMOS option infrastructure, or /dev/null. Moreover, trim down newlines to no more than two consecutive newlines. Change-Id: I119b248821221e68c4e31edba71ba83b7d2e14e9 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47143 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
This commit is contained in:
Angel Pons
@@ -25,7 +25,6 @@ entries
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|||||||
# coreboot config options: northbridge
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# coreboot config options: northbridge
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432 4 e 11 gfx_uma_size
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432 4 e 11 gfx_uma_size
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||||||
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||||||
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||||||
# coreboot config options: check sums
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# coreboot config options: check sums
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||||||
984 16 h 0 check_sum
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984 16 h 0 check_sum
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||||||
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||||||
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|||||||
@@ -8,7 +8,6 @@ entries
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0 384 r 0 reserved_memory
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0 384 r 0 reserved_memory
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384 1 e 4 boot_option
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384 1 e 4 boot_option
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||||||
388 4 h 0 reboot_counter
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388 4 h 0 reboot_counter
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||||||
#392 3 r 0 unused
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||||||
395 1 e 1 hw_scrubber
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395 1 e 1 hw_scrubber
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||||||
396 1 e 1 interleave_chip_selects
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396 1 e 1 interleave_chip_selects
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||||||
397 2 e 8 max_mem_clock
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397 2 e 8 max_mem_clock
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@@ -24,8 +23,6 @@ entries
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# Reserve the extended AMD configuration registers
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# Reserve the extended AMD configuration registers
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||||||
1000 24 r 0 amd_reserved
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1000 24 r 0 amd_reserved
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||||||
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||||||
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||||||
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||||||
enumerations
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enumerations
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||||||
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#ID value text
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#ID value text
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@@ -8,7 +8,6 @@ entries
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0 384 r 0 reserved_memory
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0 384 r 0 reserved_memory
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384 1 e 4 boot_option
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384 1 e 4 boot_option
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388 4 h 0 reboot_counter
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388 4 h 0 reboot_counter
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||||||
#392 3 r 0 unused
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||||||
395 1 e 1 hw_scrubber
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395 1 e 1 hw_scrubber
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||||||
396 1 e 1 interleave_chip_selects
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396 1 e 1 interleave_chip_selects
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||||||
397 2 e 8 max_mem_clock
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397 2 e 8 max_mem_clock
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||||||
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|||||||
@@ -8,7 +8,6 @@ entries
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0 384 r 0 reserved_memory
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0 384 r 0 reserved_memory
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||||||
384 1 e 4 boot_option
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384 1 e 4 boot_option
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388 4 h 0 reboot_counter
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388 4 h 0 reboot_counter
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#392 3 r 0 unused
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395 1 e 1 hw_scrubber
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395 1 e 1 hw_scrubber
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||||||
396 1 e 1 interleave_chip_selects
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396 1 e 1 interleave_chip_selects
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397 2 e 8 max_mem_clock
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397 2 e 8 max_mem_clock
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@@ -8,7 +8,6 @@ entries
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0 384 r 0 reserved_memory
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0 384 r 0 reserved_memory
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384 1 e 4 boot_option
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384 1 e 4 boot_option
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388 4 h 0 reboot_counter
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388 4 h 0 reboot_counter
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#392 3 r 0 unused
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395 1 e 1 hw_scrubber
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395 1 e 1 hw_scrubber
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||||||
396 1 e 1 interleave_chip_selects
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396 1 e 1 interleave_chip_selects
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397 2 e 8 max_mem_clock
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397 2 e 8 max_mem_clock
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@@ -24,8 +23,6 @@ entries
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# Reserve the extended AMD configuration registers
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# Reserve the extended AMD configuration registers
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1000 24 r 0 amd_reserved
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1000 24 r 0 amd_reserved
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enumerations
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enumerations
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#ID value text
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#ID value text
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@@ -8,7 +8,6 @@ entries
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0 384 r 0 reserved_memory
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0 384 r 0 reserved_memory
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384 1 e 4 boot_option
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384 1 e 4 boot_option
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388 4 h 0 reboot_counter
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388 4 h 0 reboot_counter
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||||||
#392 3 r 0 unused
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395 1 e 1 hw_scrubber
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395 1 e 1 hw_scrubber
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396 1 e 1 interleave_chip_selects
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396 1 e 1 interleave_chip_selects
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397 2 e 8 max_mem_clock
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397 2 e 8 max_mem_clock
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@@ -24,8 +23,6 @@ entries
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# Reserve the extended AMD configuration registers
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# Reserve the extended AMD configuration registers
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||||||
1000 24 r 0 amd_reserved
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1000 24 r 0 amd_reserved
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enumerations
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enumerations
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#ID value text
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#ID value text
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@@ -8,7 +8,6 @@ entries
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0 384 r 0 reserved_memory
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0 384 r 0 reserved_memory
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384 1 e 4 boot_option
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384 1 e 4 boot_option
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388 4 h 0 reboot_counter
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388 4 h 0 reboot_counter
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#392 3 r 0 unused
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395 1 e 1 hw_scrubber
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395 1 e 1 hw_scrubber
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396 1 e 1 interleave_chip_selects
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396 1 e 1 interleave_chip_selects
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||||||
397 2 e 8 max_mem_clock
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397 2 e 8 max_mem_clock
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|||||||
@@ -8,7 +8,6 @@ entries
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0 384 r 0 reserved_memory
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0 384 r 0 reserved_memory
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384 1 e 4 boot_option
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384 1 e 4 boot_option
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388 4 h 0 reboot_counter
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388 4 h 0 reboot_counter
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#392 3 r 0 unused
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395 1 e 1 hw_scrubber
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395 1 e 1 hw_scrubber
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396 1 e 1 interleave_chip_selects
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396 1 e 1 interleave_chip_selects
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397 2 e 8 max_mem_clock
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397 2 e 8 max_mem_clock
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@@ -24,8 +23,6 @@ entries
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# Reserve the extended AMD configuration registers
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# Reserve the extended AMD configuration registers
|
||||||
1000 24 r 0 amd_reserved
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1000 24 r 0 amd_reserved
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enumerations
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enumerations
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#ID value text
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#ID value text
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@@ -3,43 +3,19 @@
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# -----------------------------------------------------------------
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# -----------------------------------------------------------------
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entries
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entries
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# -----------------------------------------------------------------
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|
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# Status Register A
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|
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# -----------------------------------------------------------------
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# Status Register B
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# -----------------------------------------------------------------
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# Status Register C
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#96 4 r 0 status_c_rsvd
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#100 1 r 0 uf_flag
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#101 1 r 0 af_flag
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#102 1 r 0 pf_flag
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#103 1 r 0 irqf_flag
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||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
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|
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#104 7 r 0 status_d_rsvd
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|
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#111 1 r 0 valid_cmos_ram
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|
||||||
# -----------------------------------------------------------------
|
|
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# Diagnostic Status Register
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|
||||||
#112 8 r 0 diag_rsvd1
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||||||
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||||||
# -----------------------------------------------------------------
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# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
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0 120 r 0 reserved_memory
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||||||
#120 264 r 0 unused
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||||||
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||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
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# RTC_BOOT_BYTE (coreboot hardcoded)
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||||||
384 1 e 4 boot_option
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384 1 e 4 boot_option
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||||||
388 4 h 0 reboot_counter
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388 4 h 0 reboot_counter
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||||||
#390 2 r 0 unused?
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||||||
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|
||||||
# -----------------------------------------------------------------
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# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
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# coreboot config options: console
|
||||||
#392 3 r 0 unused
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||||||
395 4 e 6 debug_level
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395 4 e 6 debug_level
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||||||
#399 1 r 0 unused
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||||||
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# coreboot config options: cpu
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# coreboot config options: cpu
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||||||
#401 7 r 0 unused
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||||||
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# coreboot config options: southbridge
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# coreboot config options: southbridge
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||||||
408 1 e 1 nmi
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408 1 e 1 nmi
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@@ -53,11 +29,9 @@ entries
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928 8 h 0 boot_default
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928 8 h 0 boot_default
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||||||
936 1 e 8 cmos_defaults_loaded
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936 1 e 8 cmos_defaults_loaded
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937 1 e 1 lpt
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937 1 e 1 lpt
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#938 46 r 0 unused
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# coreboot config options: check sums
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# coreboot config options: check sums
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||||||
984 16 h 0 check_sum
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984 16 h 0 check_sum
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||||||
#1000 24 r 0 amd_reserved
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# RAM initialization internal data
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# RAM initialization internal data
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||||||
1024 8 r 0 C0WL0REOST
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1024 8 r 0 C0WL0REOST
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@@ -3,45 +3,21 @@
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# -----------------------------------------------------------------
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# -----------------------------------------------------------------
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||||||
entries
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entries
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||||||
# -----------------------------------------------------------------
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# -----------------------------------------------------------------
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||||||
# Status Register A
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|
||||||
# -----------------------------------------------------------------
|
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||||||
# Status Register B
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||||||
# -----------------------------------------------------------------
|
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||||||
# Status Register C
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||||||
#96 4 r 0 status_c_rsvd
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#100 1 r 0 uf_flag
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||||||
#101 1 r 0 af_flag
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||||||
#102 1 r 0 pf_flag
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||||||
#103 1 r 0 irqf_flag
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||||||
# -----------------------------------------------------------------
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||||||
# Status Register D
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||||||
#104 7 r 0 status_d_rsvd
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#111 1 r 0 valid_cmos_ram
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||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
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||||||
#112 8 r 0 diag_rsvd1
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||||||
# -----------------------------------------------------------------
|
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||||||
0 120 r 0 reserved_memory
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0 120 r 0 reserved_memory
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||||||
#120 264 r 0 unused
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||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
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# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
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384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
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388 4 h 0 reboot_counter
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||||||
#390 2 r 0 unused?
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
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# coreboot config options: console
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||||||
#392 3 r 0 unused
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||||||
395 4 e 6 debug_level
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395 4 e 6 debug_level
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||||||
#399 1 r 0 unused
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||||||
#400 8 r 0 reserved for century byte
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#400 8 r 0 reserved for century byte
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||||||
# coreboot config options: southbridge
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# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
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408 1 e 1 nmi
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||||||
409 2 e 7 power_on_after_fail
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409 2 e 7 power_on_after_fail
|
||||||
# coreboot config options: cpu
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# coreboot config options: cpu
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||||||
#424 8 r 0 unused
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||||||
# coreboot config options: northbridge
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# coreboot config options: northbridge
|
||||||
#432 5 e 11 gfx_uma_size
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#432 5 e 11 gfx_uma_size
|
||||||
#437 3 r 0 unused
|
|
||||||
#440 8 h 0 volume
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#440 8 h 0 volume
|
||||||
# SandyBridge MRC Scrambler Seed values
|
# SandyBridge MRC Scrambler Seed values
|
||||||
896 32 r 0 mrc_scrambler_seed
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896 32 r 0 mrc_scrambler_seed
|
||||||
|
|||||||
@@ -14,7 +14,6 @@
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984 16 h 0 check_sum
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984 16 h 0 check_sum
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
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||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
enumerations
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enumerations
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
@@ -41,7 +40,6 @@
|
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5 2 Keep
|
5 2 Keep
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
checksums
|
checksums
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|||||||
@@ -8,7 +8,6 @@ entries
|
|||||||
0 384 r 0 reserved_memory
|
0 384 r 0 reserved_memory
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#392 3 r 0 unused
|
|
||||||
395 1 e 1 hw_scrubber
|
395 1 e 1 hw_scrubber
|
||||||
396 1 e 1 interleave_chip_selects
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396 1 e 1 interleave_chip_selects
|
||||||
397 2 e 8 max_mem_clock
|
397 2 e 8 max_mem_clock
|
||||||
@@ -24,8 +23,6 @@ entries
|
|||||||
# Reserve the extended AMD configuration registers
|
# Reserve the extended AMD configuration registers
|
||||||
1000 24 r 0 amd_reserved
|
1000 24 r 0 amd_reserved
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
enumerations
|
enumerations
|
||||||
|
|
||||||
#ID value text
|
#ID value text
|
||||||
|
|||||||
@@ -3,51 +3,26 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 5 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#425 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 4 e 11 gfx_uma_size
|
432 4 e 11 gfx_uma_size
|
||||||
#435 549 r 0 unused
|
|
||||||
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
|
|||||||
@@ -4,75 +4,29 @@
|
|||||||
entries
|
entries
|
||||||
|
|
||||||
#start-bit length config config-ID name
|
#start-bit length config config-ID name
|
||||||
#0 8 r 0 seconds
|
|
||||||
#8 8 r 0 alarm_seconds
|
|
||||||
#16 8 r 0 minutes
|
|
||||||
#24 8 r 0 alarm_minutes
|
|
||||||
#32 8 r 0 hours
|
|
||||||
#40 8 r 0 alarm_hours
|
|
||||||
#48 8 r 0 day_of_week
|
|
||||||
#56 8 r 0 day_of_month
|
|
||||||
#64 8 r 0 month
|
|
||||||
#72 8 r 0 year
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
#80 4 r 0 rate_select
|
|
||||||
#84 3 r 0 REF_Clock
|
|
||||||
#87 1 r 0 UIP
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
#88 1 r 0 auto_switch_DST
|
|
||||||
#89 1 r 0 24_hour_mode
|
|
||||||
#90 1 r 0 binary_values_enable
|
|
||||||
#91 1 r 0 square-wave_out_enable
|
|
||||||
#92 1 r 0 update_finished_enable
|
|
||||||
#93 1 r 0 alarm_interrupt_enable
|
|
||||||
#94 1 r 0 periodic_interrupt_enable
|
|
||||||
#95 1 r 0 disable_clock_updates
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
400 1 e 2 hyper_threading
|
400 1 e 2 hyper_threading
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
#411 5 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#Used by ChromeOS:
|
#Used by ChromeOS:
|
||||||
416 128 r 0 vbnv
|
416 128 r 0 vbnv
|
||||||
#544 440 r 0 unused
|
|
||||||
|
|
||||||
# SandyBridge MRC Scrambler Seed values
|
# SandyBridge MRC Scrambler Seed values
|
||||||
896 32 r 0 mrc_scrambler_seed
|
896 32 r 0 mrc_scrambler_seed
|
||||||
@@ -80,7 +34,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -3,28 +3,8 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
@@ -33,9 +13,7 @@ entries
|
|||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 4 debug_level
|
395 4 e 4 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
|
|||||||
@@ -8,7 +8,6 @@ entries
|
|||||||
0 384 r 0 reserved_memory
|
0 384 r 0 reserved_memory
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#392 3 r 0 unused
|
|
||||||
395 1 e 1 hw_scrubber
|
395 1 e 1 hw_scrubber
|
||||||
396 1 e 1 interleave_chip_selects
|
396 1 e 1 interleave_chip_selects
|
||||||
397 2 e 8 max_mem_clock
|
397 2 e 8 max_mem_clock
|
||||||
|
|||||||
@@ -5,7 +5,6 @@ entries
|
|||||||
0 384 r 0 reserved_memory
|
0 384 r 0 reserved_memory
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#392 3 r 0 unused
|
|
||||||
395 1 e 1 hw_scrubber
|
395 1 e 1 hw_scrubber
|
||||||
396 1 e 1 interleave_chip_selects
|
396 1 e 1 interleave_chip_selects
|
||||||
397 2 e 8 max_mem_clock
|
397 2 e 8 max_mem_clock
|
||||||
|
|||||||
@@ -9,7 +9,6 @@ entries
|
|||||||
0 384 r 0 reserved_memory
|
0 384 r 0 reserved_memory
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 r 0 reboot_counter
|
388 4 r 0 reboot_counter
|
||||||
#392 3 r 0 unused
|
|
||||||
#400 1 e 1 power_on_after_fail
|
#400 1 e 1 power_on_after_fail
|
||||||
412 4 e 6 debug_level
|
412 4 e 6 debug_level
|
||||||
416 4 e 7 boot_first
|
416 4 e 7 boot_first
|
||||||
|
|||||||
@@ -8,7 +8,6 @@ entries
|
|||||||
0 384 r 0 reserved_memory
|
0 384 r 0 reserved_memory
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#392 3 r 0 unused
|
|
||||||
395 1 e 1 hw_scrubber
|
395 1 e 1 hw_scrubber
|
||||||
396 1 e 1 interleave_chip_selects
|
396 1 e 1 interleave_chip_selects
|
||||||
397 2 e 8 max_mem_clock
|
397 2 e 8 max_mem_clock
|
||||||
|
|||||||
@@ -3,55 +3,28 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
|
|
||||||
#411 10 r 0 unused
|
|
||||||
421 1 e 9 sata_mode
|
421 1 e 9 sata_mode
|
||||||
#422 2 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#425 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 3 e 11 gfx_uma_size
|
432 3 e 11 gfx_uma_size
|
||||||
#435 549 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
|
|||||||
@@ -3,28 +3,8 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
@@ -33,9 +13,7 @@ entries
|
|||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 4 debug_level
|
395 4 e 4 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
|
|||||||
@@ -3,22 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
@@ -28,11 +23,9 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
416 512 s 0 boot_devices
|
416 512 s 0 boot_devices
|
||||||
#928 80 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# RAM initialization internal data
|
# RAM initialization internal data
|
||||||
1024 8 r 0 C0WL0REOST
|
1024 8 r 0 C0WL0REOST
|
||||||
|
|||||||
@@ -3,34 +3,13 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 5 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
@@ -42,10 +21,8 @@ entries
|
|||||||
411 1 e 1 nmi
|
411 1 e 1 nmi
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#424 8 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
#432 554 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
|
|||||||
@@ -5,29 +5,24 @@ entries
|
|||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 5 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
#408 1 e 0 unused
|
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
411 1 e 1 nmi
|
411 1 e 1 nmi
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#424 8 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 4 e 11 gfx_uma_size
|
432 4 e 11 gfx_uma_size
|
||||||
#436 548 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
|
|||||||
@@ -3,51 +3,26 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 5 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#424 8 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 4 e 11 gfx_uma_size
|
432 4 e 11 gfx_uma_size
|
||||||
#435 549 r 0 unused
|
|
||||||
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
|
|||||||
@@ -3,28 +3,8 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
@@ -33,9 +13,7 @@ entries
|
|||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 4 debug_level
|
395 4 e 4 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
|
|||||||
@@ -3,55 +3,28 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
|
|
||||||
#411 10 r 0 unused
|
|
||||||
421 1 e 9 sata_mode
|
421 1 e 9 sata_mode
|
||||||
#422 2 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#425 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 3 e 11 gfx_uma_size
|
432 3 e 11 gfx_uma_size
|
||||||
#435 549 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
|
|||||||
@@ -3,28 +3,8 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
@@ -33,9 +13,7 @@ entries
|
|||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 4 debug_level
|
395 4 e 4 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|||||||
@@ -8,7 +8,6 @@ entries
|
|||||||
0 384 r 0 reserved_memory
|
0 384 r 0 reserved_memory
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#392 3 r 0 unused
|
|
||||||
395 1 e 1 hw_scrubber
|
395 1 e 1 hw_scrubber
|
||||||
396 1 e 1 interleave_chip_selects
|
396 1 e 1 interleave_chip_selects
|
||||||
397 2 e 8 max_mem_clock
|
397 2 e 8 max_mem_clock
|
||||||
|
|||||||
@@ -8,7 +8,6 @@ entries
|
|||||||
0 384 r 0 reserved_memory
|
0 384 r 0 reserved_memory
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#392 3 r 0 unused
|
|
||||||
395 1 e 1 hw_scrubber
|
395 1 e 1 hw_scrubber
|
||||||
396 1 e 1 interleave_chip_selects
|
396 1 e 1 interleave_chip_selects
|
||||||
397 2 e 8 max_mem_clock
|
397 2 e 8 max_mem_clock
|
||||||
|
|||||||
@@ -32,7 +32,6 @@ entries
|
|||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
386 1 e 1 ECC_memory
|
386 1 e 1 ECC_memory
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#392 3 r 0 unused
|
|
||||||
395 1 e 1 hw_scrubber
|
395 1 e 1 hw_scrubber
|
||||||
396 1 e 1 interleave_chip_selects
|
396 1 e 1 interleave_chip_selects
|
||||||
397 2 e 8 max_mem_clock
|
397 2 e 8 max_mem_clock
|
||||||
|
|||||||
@@ -3,25 +3,6 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
|
|
||||||
@@ -88,7 +69,6 @@ enumerations
|
|||||||
9 5 192M
|
9 5 192M
|
||||||
9 6 224M
|
9 6 224M
|
||||||
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
checksums
|
checksums
|
||||||
|
|
||||||
|
|||||||
@@ -8,7 +8,6 @@ entries
|
|||||||
0 384 r 0 reserved_memory
|
0 384 r 0 reserved_memory
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 r 0 reboot_bits
|
388 4 r 0 reboot_bits
|
||||||
#392 3 r 0 unused
|
|
||||||
395 1 e 1 hw_scrubber
|
395 1 e 1 hw_scrubber
|
||||||
396 1 e 1 interleave_chip_selects
|
396 1 e 1 interleave_chip_selects
|
||||||
397 2 e 8 max_mem_clock
|
397 2 e 8 max_mem_clock
|
||||||
@@ -24,8 +23,6 @@ entries
|
|||||||
# Reserve the extended AMD configuration registers
|
# Reserve the extended AMD configuration registers
|
||||||
1000 24 r 0 amd_reserved
|
1000 24 r 0 amd_reserved
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
enumerations
|
enumerations
|
||||||
|
|
||||||
#ID value text
|
#ID value text
|
||||||
|
|||||||
@@ -4,78 +4,30 @@
|
|||||||
entries
|
entries
|
||||||
|
|
||||||
#start-bit length config config-ID name
|
#start-bit length config config-ID name
|
||||||
#0 8 r 0 seconds
|
|
||||||
#8 8 r 0 alarm_seconds
|
|
||||||
#16 8 r 0 minutes
|
|
||||||
#24 8 r 0 alarm_minutes
|
|
||||||
#32 8 r 0 hours
|
|
||||||
#40 8 r 0 alarm_hours
|
|
||||||
#48 8 r 0 day_of_week
|
|
||||||
#56 8 r 0 day_of_month
|
|
||||||
#64 8 r 0 month
|
|
||||||
#72 8 r 0 year
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
#80 4 r 0 rate_select
|
|
||||||
#84 3 r 0 REF_Clock
|
|
||||||
#87 1 r 0 UIP
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
#88 1 r 0 auto_switch_DST
|
|
||||||
#89 1 r 0 24_hour_mode
|
|
||||||
#90 1 r 0 binary_values_enable
|
|
||||||
#91 1 r 0 square-wave_out_enable
|
|
||||||
#92 1 r 0 update_finished_enable
|
|
||||||
#93 1 r 0 alarm_interrupt_enable
|
|
||||||
#94 1 r 0 periodic_interrupt_enable
|
|
||||||
#95 1 r 0 disable_clock_updates
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
# reboot_counter reserved for core, not used by platform.
|
# reboot_counter reserved for core, not used by platform.
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#400 1 e 2 unused
|
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
#411 5 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#416 568 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -4,78 +4,30 @@
|
|||||||
entries
|
entries
|
||||||
|
|
||||||
#start-bit length config config-ID name
|
#start-bit length config config-ID name
|
||||||
#0 8 r 0 seconds
|
|
||||||
#8 8 r 0 alarm_seconds
|
|
||||||
#16 8 r 0 minutes
|
|
||||||
#24 8 r 0 alarm_minutes
|
|
||||||
#32 8 r 0 hours
|
|
||||||
#40 8 r 0 alarm_hours
|
|
||||||
#48 8 r 0 day_of_week
|
|
||||||
#56 8 r 0 day_of_month
|
|
||||||
#64 8 r 0 month
|
|
||||||
#72 8 r 0 year
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
#80 4 r 0 rate_select
|
|
||||||
#84 3 r 0 REF_Clock
|
|
||||||
#87 1 r 0 UIP
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
#88 1 r 0 auto_switch_DST
|
|
||||||
#89 1 r 0 24_hour_mode
|
|
||||||
#90 1 r 0 binary_values_enable
|
|
||||||
#91 1 r 0 square-wave_out_enable
|
|
||||||
#92 1 r 0 update_finished_enable
|
|
||||||
#93 1 r 0 alarm_interrupt_enable
|
|
||||||
#94 1 r 0 periodic_interrupt_enable
|
|
||||||
#95 1 r 0 disable_clock_updates
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
# reboot_counter reserved for core, not used by platform.
|
# reboot_counter reserved for core, not used by platform.
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#400 1 e 2 unused
|
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
#411 5 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#416 568 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -3,22 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
@@ -30,7 +25,6 @@ entries
|
|||||||
416 512 s 0 boot_devices
|
416 512 s 0 boot_devices
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#945 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
952 3 e 11 gfx_uma_size
|
952 3 e 11 gfx_uma_size
|
||||||
|
|||||||
@@ -3,51 +3,26 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 5 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#425 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 4 e 11 gfx_uma_size
|
432 4 e 11 gfx_uma_size
|
||||||
#435 549 r 0 unused
|
|
||||||
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
|
|||||||
@@ -3,43 +3,19 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
@@ -53,11 +29,9 @@ entries
|
|||||||
928 8 h 0 boot_default
|
928 8 h 0 boot_default
|
||||||
936 1 e 8 cmos_defaults_loaded
|
936 1 e 8 cmos_defaults_loaded
|
||||||
937 1 e 1 lpt
|
937 1 e 1 lpt
|
||||||
#938 46 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# RAM initialization internal data
|
# RAM initialization internal data
|
||||||
1024 8 r 0 C0WL0REOST
|
1024 8 r 0 C0WL0REOST
|
||||||
|
|||||||
@@ -3,43 +3,19 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
@@ -50,11 +26,9 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
416 512 s 0 boot_devices
|
416 512 s 0 boot_devices
|
||||||
#928 80 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# RAM initialization internal data
|
# RAM initialization internal data
|
||||||
1024 8 r 0 C0WL0REOST
|
1024 8 r 0 C0WL0REOST
|
||||||
|
|||||||
@@ -3,55 +3,28 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
|
|
||||||
#411 10 r 0 unused
|
|
||||||
421 1 e 9 sata_mode
|
421 1 e 9 sata_mode
|
||||||
#422 2 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#425 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 3 e 11 gfx_uma_size
|
432 3 e 11 gfx_uma_size
|
||||||
#435 549 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
|
|||||||
@@ -3,52 +3,26 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#425 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 4 e 11 gfx_uma_size
|
432 4 e 11 gfx_uma_size
|
||||||
#435 549 r 0 unused
|
|
||||||
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
|
|||||||
@@ -3,55 +3,28 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
|
|
||||||
#411 10 r 0 unused
|
|
||||||
421 1 e 9 sata_mode
|
421 1 e 9 sata_mode
|
||||||
#422 2 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#425 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 3 e 11 gfx_uma_size
|
432 3 e 11 gfx_uma_size
|
||||||
#435 549 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
|
|||||||
@@ -8,7 +8,6 @@ entries
|
|||||||
0 384 r 0 reserved_memory
|
0 384 r 0 reserved_memory
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#392 3 r 0 unused
|
|
||||||
395 1 e 1 hw_scrubber
|
395 1 e 1 hw_scrubber
|
||||||
396 1 e 1 interleave_chip_selects
|
396 1 e 1 interleave_chip_selects
|
||||||
397 2 e 8 max_mem_clock
|
397 2 e 8 max_mem_clock
|
||||||
@@ -24,8 +23,6 @@ entries
|
|||||||
# Reserve the extended AMD configuration registers
|
# Reserve the extended AMD configuration registers
|
||||||
1000 24 r 0 amd_reserved
|
1000 24 r 0 amd_reserved
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
enumerations
|
enumerations
|
||||||
|
|
||||||
#ID value text
|
#ID value text
|
||||||
|
|||||||
@@ -8,7 +8,6 @@ entries
|
|||||||
0 384 r 0 reserved_memory
|
0 384 r 0 reserved_memory
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#392 3 r 0 unused
|
|
||||||
395 1 e 1 hw_scrubber
|
395 1 e 1 hw_scrubber
|
||||||
396 1 e 1 interleave_chip_selects
|
396 1 e 1 interleave_chip_selects
|
||||||
397 2 e 8 max_mem_clock
|
397 2 e 8 max_mem_clock
|
||||||
|
|||||||
@@ -3,54 +3,28 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
400 1 e 2 hyper_threading
|
400 1 e 2 hyper_threading
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
#411 5 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#Used by ChromeOS:
|
#Used by ChromeOS:
|
||||||
416 128 r 0 vbnv
|
416 128 r 0 vbnv
|
||||||
#544 440 r 0 unused
|
|
||||||
|
|
||||||
# SandyBridge MRC Scrambler Seed values
|
# SandyBridge MRC Scrambler Seed values
|
||||||
896 32 r 0 mrc_scrambler_seed
|
896 32 r 0 mrc_scrambler_seed
|
||||||
@@ -58,7 +32,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -3,54 +3,28 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
400 1 e 2 hyper_threading
|
400 1 e 2 hyper_threading
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
#411 5 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#Used by ChromeOS:
|
#Used by ChromeOS:
|
||||||
416 128 r 0 vbnv
|
416 128 r 0 vbnv
|
||||||
#544 440 r 0 unused
|
|
||||||
|
|
||||||
# SandyBridge MRC Scrambler Seed values
|
# SandyBridge MRC Scrambler Seed values
|
||||||
896 32 r 0 mrc_scrambler_seed
|
896 32 r 0 mrc_scrambler_seed
|
||||||
@@ -58,7 +32,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -3,52 +3,27 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
# No serial port on this motherboard
|
# No serial port on this motherboard
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
# hyper_threading not supported by the Celeron 847 on this board
|
# hyper_threading not supported by the Celeron 847 on this board
|
||||||
#400 1 e 2 hyper_threading
|
#400 1 e 2 hyper_threading
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
411 1 e 8 sata_mode
|
411 1 e 8 sata_mode
|
||||||
#412 4 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#Used by ChromeOS:
|
#Used by ChromeOS:
|
||||||
@@ -57,8 +32,6 @@ entries
|
|||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
544 3 e 11 gfx_uma_size
|
544 3 e 11 gfx_uma_size
|
||||||
|
|
||||||
#547 437 r 0 unused
|
|
||||||
|
|
||||||
# SandyBridge MRC Scrambler Seed values
|
# SandyBridge MRC Scrambler Seed values
|
||||||
896 32 r 0 mrc_scrambler_seed
|
896 32 r 0 mrc_scrambler_seed
|
||||||
928 32 r 0 mrc_scrambler_seed_s3
|
928 32 r 0 mrc_scrambler_seed_s3
|
||||||
@@ -66,7 +39,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -4,75 +4,29 @@
|
|||||||
entries
|
entries
|
||||||
|
|
||||||
#start-bit length config config-ID name
|
#start-bit length config config-ID name
|
||||||
#0 8 r 0 seconds
|
|
||||||
#8 8 r 0 alarm_seconds
|
|
||||||
#16 8 r 0 minutes
|
|
||||||
#24 8 r 0 alarm_minutes
|
|
||||||
#32 8 r 0 hours
|
|
||||||
#40 8 r 0 alarm_hours
|
|
||||||
#48 8 r 0 day_of_week
|
|
||||||
#56 8 r 0 day_of_month
|
|
||||||
#64 8 r 0 month
|
|
||||||
#72 8 r 0 year
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
#80 4 r 0 rate_select
|
|
||||||
#84 3 r 0 REF_Clock
|
|
||||||
#87 1 r 0 UIP
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
#88 1 r 0 auto_switch_DST
|
|
||||||
#89 1 r 0 24_hour_mode
|
|
||||||
#90 1 r 0 binary_values_enable
|
|
||||||
#91 1 r 0 square-wave_out_enable
|
|
||||||
#92 1 r 0 update_finished_enable
|
|
||||||
#93 1 r 0 alarm_interrupt_enable
|
|
||||||
#94 1 r 0 periodic_interrupt_enable
|
|
||||||
#95 1 r 0 disable_clock_updates
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
400 1 e 2 hyper_threading
|
400 1 e 2 hyper_threading
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
#411 5 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#Used by ChromeOS:
|
#Used by ChromeOS:
|
||||||
416 128 r 0 vbnv
|
416 128 r 0 vbnv
|
||||||
#544 440 r 0 unused
|
|
||||||
|
|
||||||
# SandyBridge MRC Scrambler Seed values
|
# SandyBridge MRC Scrambler Seed values
|
||||||
896 32 r 0 mrc_scrambler_seed
|
896 32 r 0 mrc_scrambler_seed
|
||||||
@@ -80,7 +34,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -4,75 +4,29 @@
|
|||||||
entries
|
entries
|
||||||
|
|
||||||
#start-bit length config config-ID name
|
#start-bit length config config-ID name
|
||||||
#0 8 r 0 seconds
|
|
||||||
#8 8 r 0 alarm_seconds
|
|
||||||
#16 8 r 0 minutes
|
|
||||||
#24 8 r 0 alarm_minutes
|
|
||||||
#32 8 r 0 hours
|
|
||||||
#40 8 r 0 alarm_hours
|
|
||||||
#48 8 r 0 day_of_week
|
|
||||||
#56 8 r 0 day_of_month
|
|
||||||
#64 8 r 0 month
|
|
||||||
#72 8 r 0 year
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
#80 4 r 0 rate_select
|
|
||||||
#84 3 r 0 REF_Clock
|
|
||||||
#87 1 r 0 UIP
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
#88 1 r 0 auto_switch_DST
|
|
||||||
#89 1 r 0 24_hour_mode
|
|
||||||
#90 1 r 0 binary_values_enable
|
|
||||||
#91 1 r 0 square-wave_out_enable
|
|
||||||
#92 1 r 0 update_finished_enable
|
|
||||||
#93 1 r 0 alarm_interrupt_enable
|
|
||||||
#94 1 r 0 periodic_interrupt_enable
|
|
||||||
#95 1 r 0 disable_clock_updates
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
400 1 e 2 hyper_threading
|
400 1 e 2 hyper_threading
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
#411 5 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#Used by ChromeOS:
|
#Used by ChromeOS:
|
||||||
416 128 r 0 vbnv
|
416 128 r 0 vbnv
|
||||||
#544 440 r 0 unused
|
|
||||||
|
|
||||||
# SandyBridge MRC Scrambler Seed values
|
# SandyBridge MRC Scrambler Seed values
|
||||||
896 32 r 0 mrc_scrambler_seed
|
896 32 r 0 mrc_scrambler_seed
|
||||||
@@ -80,7 +34,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -4,75 +4,29 @@
|
|||||||
entries
|
entries
|
||||||
|
|
||||||
#start-bit length config config-ID name
|
#start-bit length config config-ID name
|
||||||
#0 8 r 0 seconds
|
|
||||||
#8 8 r 0 alarm_seconds
|
|
||||||
#16 8 r 0 minutes
|
|
||||||
#24 8 r 0 alarm_minutes
|
|
||||||
#32 8 r 0 hours
|
|
||||||
#40 8 r 0 alarm_hours
|
|
||||||
#48 8 r 0 day_of_week
|
|
||||||
#56 8 r 0 day_of_month
|
|
||||||
#64 8 r 0 month
|
|
||||||
#72 8 r 0 year
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
#80 4 r 0 rate_select
|
|
||||||
#84 3 r 0 REF_Clock
|
|
||||||
#87 1 r 0 UIP
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
#88 1 r 0 auto_switch_DST
|
|
||||||
#89 1 r 0 24_hour_mode
|
|
||||||
#90 1 r 0 binary_values_enable
|
|
||||||
#91 1 r 0 square-wave_out_enable
|
|
||||||
#92 1 r 0 update_finished_enable
|
|
||||||
#93 1 r 0 alarm_interrupt_enable
|
|
||||||
#94 1 r 0 periodic_interrupt_enable
|
|
||||||
#95 1 r 0 disable_clock_updates
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
400 1 e 2 hyper_threading
|
400 1 e 2 hyper_threading
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
#411 5 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#Used by ChromeOS:
|
#Used by ChromeOS:
|
||||||
416 128 r 0 vbnv
|
416 128 r 0 vbnv
|
||||||
#544 440 r 0 unused
|
|
||||||
|
|
||||||
# SandyBridge MRC Scrambler Seed values
|
# SandyBridge MRC Scrambler Seed values
|
||||||
896 32 r 0 mrc_scrambler_seed
|
896 32 r 0 mrc_scrambler_seed
|
||||||
@@ -80,7 +34,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -3,50 +3,25 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
400 1 e 2 hyper_threading
|
400 1 e 2 hyper_threading
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
411 1 e 8 sata_mode
|
411 1 e 8 sata_mode
|
||||||
#412 4 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#Used by ChromeOS:
|
#Used by ChromeOS:
|
||||||
@@ -55,15 +30,12 @@ entries
|
|||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
544 3 e 11 gfx_uma_size
|
544 3 e 11 gfx_uma_size
|
||||||
|
|
||||||
#547 437 r 0 unused
|
|
||||||
|
|
||||||
# SandyBridge MRC Scrambler Seed values
|
# SandyBridge MRC Scrambler Seed values
|
||||||
896 32 r 0 mrc_scrambler_seed
|
896 32 r 0 mrc_scrambler_seed
|
||||||
928 32 r 0 mrc_scrambler_seed_s3
|
928 32 r 0 mrc_scrambler_seed_s3
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -3,50 +3,25 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
400 1 e 2 hyper_threading
|
400 1 e 2 hyper_threading
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
411 1 e 8 sata_mode
|
411 1 e 8 sata_mode
|
||||||
#412 4 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#Used by ChromeOS:
|
#Used by ChromeOS:
|
||||||
@@ -55,15 +30,12 @@ entries
|
|||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
544 3 e 11 gfx_uma_size
|
544 3 e 11 gfx_uma_size
|
||||||
|
|
||||||
#547 437 r 0 unused
|
|
||||||
|
|
||||||
# SandyBridge MRC Scrambler Seed values
|
# SandyBridge MRC Scrambler Seed values
|
||||||
896 32 r 0 mrc_scrambler_seed
|
896 32 r 0 mrc_scrambler_seed
|
||||||
928 32 r 0 mrc_scrambler_seed_s3
|
928 32 r 0 mrc_scrambler_seed_s3
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -3,54 +3,28 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
400 1 e 2 hyper_threading
|
400 1 e 2 hyper_threading
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
#411 5 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#Used by ChromeOS:
|
#Used by ChromeOS:
|
||||||
416 128 r 0 vbnv
|
416 128 r 0 vbnv
|
||||||
#544 440 r 0 unused
|
|
||||||
|
|
||||||
# SandyBridge MRC Scrambler Seed values
|
# SandyBridge MRC Scrambler Seed values
|
||||||
896 32 r 0 mrc_scrambler_seed
|
896 32 r 0 mrc_scrambler_seed
|
||||||
@@ -58,7 +32,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -3,54 +3,28 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
400 1 e 2 hyper_threading
|
400 1 e 2 hyper_threading
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
#411 5 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#Used by ChromeOS:
|
#Used by ChromeOS:
|
||||||
416 128 r 0 vbnv
|
416 128 r 0 vbnv
|
||||||
#544 440 r 0 unused
|
|
||||||
|
|
||||||
# SandyBridge MRC Scrambler Seed values
|
# SandyBridge MRC Scrambler Seed values
|
||||||
896 32 r 0 mrc_scrambler_seed
|
896 32 r 0 mrc_scrambler_seed
|
||||||
@@ -58,7 +32,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -3,50 +3,25 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
400 1 e 2 hyper_threading
|
400 1 e 2 hyper_threading
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
411 1 e 8 sata_mode
|
411 1 e 8 sata_mode
|
||||||
#412 4 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#Used by ChromeOS:
|
#Used by ChromeOS:
|
||||||
@@ -55,15 +30,12 @@ entries
|
|||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
544 3 e 11 gfx_uma_size
|
544 3 e 11 gfx_uma_size
|
||||||
|
|
||||||
#547 437 r 0 unused
|
|
||||||
|
|
||||||
# SandyBridge MRC Scrambler Seed values
|
# SandyBridge MRC Scrambler Seed values
|
||||||
896 32 r 0 mrc_scrambler_seed
|
896 32 r 0 mrc_scrambler_seed
|
||||||
928 32 r 0 mrc_scrambler_seed_s3
|
928 32 r 0 mrc_scrambler_seed_s3
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -8,7 +8,6 @@ entries
|
|||||||
0 384 r 0 reserved_memory
|
0 384 r 0 reserved_memory
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#392 3 r 0 unused
|
|
||||||
395 1 e 1 hw_scrubber
|
395 1 e 1 hw_scrubber
|
||||||
396 1 e 1 interleave_chip_selects
|
396 1 e 1 interleave_chip_selects
|
||||||
397 2 e 8 max_mem_clock
|
397 2 e 8 max_mem_clock
|
||||||
|
|||||||
@@ -3,54 +3,27 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
400 3 h 0 psu_fan_lvl
|
400 3 h 0 psu_fan_lvl
|
||||||
#403 5 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
|
|
||||||
#411 10 r 0 unused
|
|
||||||
421 1 e 9 sata_mode
|
421 1 e 9 sata_mode
|
||||||
#422 10 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 3 e 11 gfx_uma_size
|
432 3 e 11 gfx_uma_size
|
||||||
#435 549 r 0 unused
|
|
||||||
|
|
||||||
# SandyBridge MRC Scrambler Seed values
|
# SandyBridge MRC Scrambler Seed values
|
||||||
896 32 r 0 mrc_scrambler_seed
|
896 32 r 0 mrc_scrambler_seed
|
||||||
|
|||||||
@@ -3,40 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
@@ -47,11 +24,9 @@ entries
|
|||||||
421 1 e 9 sata_mode
|
421 1 e 9 sata_mode
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#424 8 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 3 e 11 gfx_uma_size
|
432 3 e 11 gfx_uma_size
|
||||||
#435 5 r 0 unused
|
|
||||||
|
|
||||||
440 8 h 0 volume
|
440 8 h 0 volume
|
||||||
|
|
||||||
|
|||||||
@@ -3,54 +3,27 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
400 3 h 0 psu_fan_lvl
|
400 3 h 0 psu_fan_lvl
|
||||||
#403 5 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
|
|
||||||
#411 10 r 0 unused
|
|
||||||
421 1 e 9 sata_mode
|
421 1 e 9 sata_mode
|
||||||
#422 10 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 3 e 11 gfx_uma_size
|
432 3 e 11 gfx_uma_size
|
||||||
#435 549 r 0 unused
|
|
||||||
|
|
||||||
448 128 r 0 vbnv
|
448 128 r 0 vbnv
|
||||||
|
|
||||||
|
|||||||
@@ -3,43 +3,19 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
@@ -50,7 +26,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
416 512 s 0 boot_devices
|
416 512 s 0 boot_devices
|
||||||
#928 40 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: mainboard specific options
|
# coreboot config options: mainboard specific options
|
||||||
948 2 e 8 cpufan_cruise_control
|
948 2 e 8 cpufan_cruise_control
|
||||||
@@ -64,11 +39,8 @@ entries
|
|||||||
969 1 e 2 ethernet2
|
969 1 e 2 ethernet2
|
||||||
970 1 e 2 ethernet3
|
970 1 e 2 ethernet3
|
||||||
|
|
||||||
#971 13 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# RAM initialization internal data
|
# RAM initialization internal data
|
||||||
1024 8 r 0 C0WL0REOST
|
1024 8 r 0 C0WL0REOST
|
||||||
|
|||||||
@@ -3,58 +3,31 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
400 1 e 2 hyper_threading
|
400 1 e 2 hyper_threading
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
#411 5 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#Used by ChromeOS:
|
#Used by ChromeOS:
|
||||||
416 128 r 0 vbnv
|
416 128 r 0 vbnv
|
||||||
#544 440 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -3,22 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
@@ -30,7 +25,6 @@ entries
|
|||||||
416 512 s 0 boot_devices
|
416 512 s 0 boot_devices
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#945 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
952 3 e 11 gfx_uma_size
|
952 3 e 11 gfx_uma_size
|
||||||
|
|||||||
@@ -3,43 +3,19 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
@@ -50,11 +26,9 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
416 512 s 0 boot_devices
|
416 512 s 0 boot_devices
|
||||||
#928 80 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# RAM initialization internal data
|
# RAM initialization internal data
|
||||||
1024 8 r 0 C0WL0REOST
|
1024 8 r 0 C0WL0REOST
|
||||||
|
|||||||
@@ -3,51 +3,26 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 5 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#424 8 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 4 e 11 gfx_uma_size
|
432 4 e 11 gfx_uma_size
|
||||||
#435 549 r 0 unused
|
|
||||||
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
|
|||||||
@@ -3,34 +3,13 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 5 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
@@ -42,12 +21,9 @@ entries
|
|||||||
411 1 e 1 nmi
|
411 1 e 1 nmi
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#424 8 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 4 e 11 gfx_uma_size
|
432 4 e 11 gfx_uma_size
|
||||||
#435 549 r 0 unused
|
|
||||||
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
|
|||||||
@@ -3,50 +3,25 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
400 1 e 2 hyper_threading
|
400 1 e 2 hyper_threading
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
411 1 e 8 sata_mode
|
411 1 e 8 sata_mode
|
||||||
#412 4 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#Used by ChromeOS:
|
#Used by ChromeOS:
|
||||||
@@ -55,15 +30,12 @@ entries
|
|||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
544 3 e 11 gfx_uma_size
|
544 3 e 11 gfx_uma_size
|
||||||
|
|
||||||
#547 437 r 0 unused
|
|
||||||
|
|
||||||
# SandyBridge MRC Scrambler Seed values
|
# SandyBridge MRC Scrambler Seed values
|
||||||
896 32 r 0 mrc_scrambler_seed
|
896 32 r 0 mrc_scrambler_seed
|
||||||
928 32 r 0 mrc_scrambler_seed_s3
|
928 32 r 0 mrc_scrambler_seed_s3
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -4,75 +4,29 @@
|
|||||||
entries
|
entries
|
||||||
|
|
||||||
#start-bit length config config-ID name
|
#start-bit length config config-ID name
|
||||||
#0 8 r 0 seconds
|
|
||||||
#8 8 r 0 alarm_seconds
|
|
||||||
#16 8 r 0 minutes
|
|
||||||
#24 8 r 0 alarm_minutes
|
|
||||||
#32 8 r 0 hours
|
|
||||||
#40 8 r 0 alarm_hours
|
|
||||||
#48 8 r 0 day_of_week
|
|
||||||
#56 8 r 0 day_of_month
|
|
||||||
#64 8 r 0 month
|
|
||||||
#72 8 r 0 year
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
#80 4 r 0 rate_select
|
|
||||||
#84 3 r 0 REF_Clock
|
|
||||||
#87 1 r 0 UIP
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
#88 1 r 0 auto_switch_DST
|
|
||||||
#89 1 r 0 24_hour_mode
|
|
||||||
#90 1 r 0 binary_values_enable
|
|
||||||
#91 1 r 0 square-wave_out_enable
|
|
||||||
#92 1 r 0 update_finished_enable
|
|
||||||
#93 1 r 0 alarm_interrupt_enable
|
|
||||||
#94 1 r 0 periodic_interrupt_enable
|
|
||||||
#95 1 r 0 disable_clock_updates
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
400 1 e 2 hyper_threading
|
400 1 e 2 hyper_threading
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
#411 5 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#Used by ChromeOS:
|
#Used by ChromeOS:
|
||||||
416 128 r 0 vbnv
|
416 128 r 0 vbnv
|
||||||
#544 440 r 0 unused
|
|
||||||
|
|
||||||
# SandyBridge MRC Scrambler Seed values
|
# SandyBridge MRC Scrambler Seed values
|
||||||
896 32 r 0 mrc_scrambler_seed
|
896 32 r 0 mrc_scrambler_seed
|
||||||
@@ -80,7 +34,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -4,75 +4,29 @@
|
|||||||
entries
|
entries
|
||||||
|
|
||||||
#start-bit length config config-ID name
|
#start-bit length config config-ID name
|
||||||
#0 8 r 0 seconds
|
|
||||||
#8 8 r 0 alarm_seconds
|
|
||||||
#16 8 r 0 minutes
|
|
||||||
#24 8 r 0 alarm_minutes
|
|
||||||
#32 8 r 0 hours
|
|
||||||
#40 8 r 0 alarm_hours
|
|
||||||
#48 8 r 0 day_of_week
|
|
||||||
#56 8 r 0 day_of_month
|
|
||||||
#64 8 r 0 month
|
|
||||||
#72 8 r 0 year
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
#80 4 r 0 rate_select
|
|
||||||
#84 3 r 0 REF_Clock
|
|
||||||
#87 1 r 0 UIP
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
#88 1 r 0 auto_switch_DST
|
|
||||||
#89 1 r 0 24_hour_mode
|
|
||||||
#90 1 r 0 binary_values_enable
|
|
||||||
#91 1 r 0 square-wave_out_enable
|
|
||||||
#92 1 r 0 update_finished_enable
|
|
||||||
#93 1 r 0 alarm_interrupt_enable
|
|
||||||
#94 1 r 0 periodic_interrupt_enable
|
|
||||||
#95 1 r 0 disable_clock_updates
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
400 1 e 2 hyper_threading
|
400 1 e 2 hyper_threading
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
#411 5 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#Used by ChromeOS:
|
#Used by ChromeOS:
|
||||||
416 128 r 0 vbnv
|
416 128 r 0 vbnv
|
||||||
#544 440 r 0 unused
|
|
||||||
|
|
||||||
# SandyBridge MRC Scrambler Seed values
|
# SandyBridge MRC Scrambler Seed values
|
||||||
896 32 r 0 mrc_scrambler_seed
|
896 32 r 0 mrc_scrambler_seed
|
||||||
@@ -80,7 +34,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -4,72 +4,26 @@
|
|||||||
entries
|
entries
|
||||||
|
|
||||||
#start-bit length config config-ID name
|
#start-bit length config config-ID name
|
||||||
#0 8 r 0 seconds
|
|
||||||
#8 8 r 0 alarm_seconds
|
|
||||||
#16 8 r 0 minutes
|
|
||||||
#24 8 r 0 alarm_minutes
|
|
||||||
#32 8 r 0 hours
|
|
||||||
#40 8 r 0 alarm_hours
|
|
||||||
#48 8 r 0 day_of_week
|
|
||||||
#56 8 r 0 day_of_month
|
|
||||||
#64 8 r 0 month
|
|
||||||
#72 8 r 0 year
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
#80 4 r 0 rate_select
|
|
||||||
#84 3 r 0 REF_Clock
|
|
||||||
#87 1 r 0 UIP
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
#88 1 r 0 auto_switch_DST
|
|
||||||
#89 1 r 0 24_hour_mode
|
|
||||||
#90 1 r 0 binary_values_enable
|
|
||||||
#91 1 r 0 square-wave_out_enable
|
|
||||||
#92 1 r 0 update_finished_enable
|
|
||||||
#93 1 r 0 alarm_interrupt_enable
|
|
||||||
#94 1 r 0 periodic_interrupt_enable
|
|
||||||
#95 1 r 0 disable_clock_updates
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
392 3 r 0 unused
|
392 3 r 0 unused
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
#411 5 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#544 440 r 0 unused
|
|
||||||
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
|
|||||||
@@ -4,75 +4,29 @@
|
|||||||
entries
|
entries
|
||||||
|
|
||||||
#start-bit length config config-ID name
|
#start-bit length config config-ID name
|
||||||
#0 8 r 0 seconds
|
|
||||||
#8 8 r 0 alarm_seconds
|
|
||||||
#16 8 r 0 minutes
|
|
||||||
#24 8 r 0 alarm_minutes
|
|
||||||
#32 8 r 0 hours
|
|
||||||
#40 8 r 0 alarm_hours
|
|
||||||
#48 8 r 0 day_of_week
|
|
||||||
#56 8 r 0 day_of_month
|
|
||||||
#64 8 r 0 month
|
|
||||||
#72 8 r 0 year
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
#80 4 r 0 rate_select
|
|
||||||
#84 3 r 0 REF_Clock
|
|
||||||
#87 1 r 0 UIP
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
#88 1 r 0 auto_switch_DST
|
|
||||||
#89 1 r 0 24_hour_mode
|
|
||||||
#90 1 r 0 binary_values_enable
|
|
||||||
#91 1 r 0 square-wave_out_enable
|
|
||||||
#92 1 r 0 update_finished_enable
|
|
||||||
#93 1 r 0 alarm_interrupt_enable
|
|
||||||
#94 1 r 0 periodic_interrupt_enable
|
|
||||||
#95 1 r 0 disable_clock_updates
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
400 1 e 2 hyper_threading
|
400 1 e 2 hyper_threading
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
#411 5 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#Used by ChromeOS:
|
#Used by ChromeOS:
|
||||||
416 128 r 0 vbnv
|
416 128 r 0 vbnv
|
||||||
#544 440 r 0 unused
|
|
||||||
|
|
||||||
# SandyBridge MRC Scrambler Seed values
|
# SandyBridge MRC Scrambler Seed values
|
||||||
896 32 r 0 mrc_scrambler_seed
|
896 32 r 0 mrc_scrambler_seed
|
||||||
@@ -80,7 +34,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -3,54 +3,28 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
400 1 e 2 hyper_threading
|
400 1 e 2 hyper_threading
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
#411 5 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#Used by ChromeOS:
|
#Used by ChromeOS:
|
||||||
416 128 r 0 vbnv
|
416 128 r 0 vbnv
|
||||||
#544 440 r 0 unused
|
|
||||||
|
|
||||||
# SandyBridge MRC Scrambler Seed values
|
# SandyBridge MRC Scrambler Seed values
|
||||||
896 32 r 0 mrc_scrambler_seed
|
896 32 r 0 mrc_scrambler_seed
|
||||||
@@ -58,7 +32,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -8,7 +8,6 @@ entries
|
|||||||
0 384 r 0 reserved_memory
|
0 384 r 0 reserved_memory
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#392 3 r 0 unused
|
|
||||||
395 1 e 1 hw_scrubber
|
395 1 e 1 hw_scrubber
|
||||||
396 1 e 1 interleave_chip_selects
|
396 1 e 1 interleave_chip_selects
|
||||||
397 2 e 8 max_mem_clock
|
397 2 e 8 max_mem_clock
|
||||||
@@ -24,8 +23,6 @@ entries
|
|||||||
# Reserve the extended AMD configuration registers
|
# Reserve the extended AMD configuration registers
|
||||||
1000 24 r 0 amd_reserved
|
1000 24 r 0 amd_reserved
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
enumerations
|
enumerations
|
||||||
|
|
||||||
#ID value text
|
#ID value text
|
||||||
|
|||||||
@@ -3,43 +3,19 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
@@ -52,7 +28,6 @@ entries
|
|||||||
416 512 s 0 boot_devices
|
416 512 s 0 boot_devices
|
||||||
928 8 h 0 boot_default
|
928 8 h 0 boot_default
|
||||||
936 1 e 11 cmos_defaults_loaded
|
936 1 e 11 cmos_defaults_loaded
|
||||||
#937 11 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: mainboard specific options
|
# coreboot config options: mainboard specific options
|
||||||
948 2 e 8 cpufan_cruise_control
|
948 2 e 8 cpufan_cruise_control
|
||||||
@@ -67,11 +42,8 @@ entries
|
|||||||
970 1 e 2 ethernet3
|
970 1 e 2 ethernet3
|
||||||
971 1 e 1 lpt
|
971 1 e 1 lpt
|
||||||
|
|
||||||
#972 12 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# RAM initialization internal data
|
# RAM initialization internal data
|
||||||
1024 8 r 0 C0WL0REOST
|
1024 8 r 0 C0WL0REOST
|
||||||
|
|||||||
@@ -3,47 +3,22 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
400 1 e 2 hyper_threading
|
400 1 e 2 hyper_threading
|
||||||
401 3 e 12 gfx_uma_size
|
401 3 e 12 gfx_uma_size
|
||||||
|
|
||||||
#404 3 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
407 1 e 1 nmi
|
407 1 e 1 nmi
|
||||||
408 2 e 7 power_on_after_fail
|
408 2 e 7 power_on_after_fail
|
||||||
@@ -63,7 +38,6 @@ entries
|
|||||||
848 1 e 9 cmos_defaults_loaded
|
848 1 e 9 cmos_defaults_loaded
|
||||||
849 1 e 2 ethernet1
|
849 1 e 2 ethernet1
|
||||||
850 1 e 2 ethernet2
|
850 1 e 2 ethernet2
|
||||||
#851 5 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: mainboard specific options
|
# coreboot config options: mainboard specific options
|
||||||
856 2 e 8 fan1_mode
|
856 2 e 8 fan1_mode
|
||||||
@@ -80,7 +54,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -8,7 +8,6 @@ entries
|
|||||||
0 384 r 0 reserved_memory
|
0 384 r 0 reserved_memory
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#392 3 r 0 unused
|
|
||||||
395 1 e 1 hw_scrubber
|
395 1 e 1 hw_scrubber
|
||||||
396 1 e 1 interleave_chip_selects
|
396 1 e 1 interleave_chip_selects
|
||||||
397 2 e 8 max_mem_clock
|
397 2 e 8 max_mem_clock
|
||||||
|
|||||||
@@ -3,40 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
@@ -58,11 +35,9 @@ entries
|
|||||||
422 2 e 10 backlight
|
422 2 e 10 backlight
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#424 8 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 3 e 11 gfx_uma_size
|
432 3 e 11 gfx_uma_size
|
||||||
#435 5 r 0 unused
|
|
||||||
440 8 h 0 volume
|
440 8 h 0 volume
|
||||||
|
|
||||||
# SandyBridge MRC Scrambler Seed values
|
# SandyBridge MRC Scrambler Seed values
|
||||||
|
|||||||
@@ -3,40 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 240 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
@@ -57,7 +34,6 @@ entries
|
|||||||
427 1 e 1 low_battery_beep
|
427 1 e 1 low_battery_beep
|
||||||
428 1 e 1 uwb
|
428 1 e 1 uwb
|
||||||
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
432 512 s 0 boot_devices
|
432 512 s 0 boot_devices
|
||||||
944 8 h 0 boot_default
|
944 8 h 0 boot_default
|
||||||
@@ -68,7 +44,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 unused
|
|
||||||
|
|
||||||
# RAM initialization internal data
|
# RAM initialization internal data
|
||||||
1024 128 r 0 read_training_results
|
1024 128 r 0 read_training_results
|
||||||
|
|||||||
@@ -3,40 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
@@ -57,11 +34,9 @@ entries
|
|||||||
420 1 e 1 low_battery_beep
|
420 1 e 1 low_battery_beep
|
||||||
421 1 e 9 sata_mode
|
421 1 e 9 sata_mode
|
||||||
422 2 e 11 usb_always_on
|
422 2 e 11 usb_always_on
|
||||||
#423 1 r 1 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
424 3 e 10 gfx_uma_size
|
424 3 e 10 gfx_uma_size
|
||||||
#427 5 r 0 unused
|
|
||||||
432 2 e 12 hybrid_graphics_mode
|
432 2 e 12 hybrid_graphics_mode
|
||||||
|
|
||||||
# VBOOT
|
# VBOOT
|
||||||
@@ -69,7 +44,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -3,40 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
@@ -58,12 +35,10 @@ entries
|
|||||||
422 2 e 13 usb_always_on
|
422 2 e 13 usb_always_on
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#424 8 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 3 e 11 gfx_uma_size
|
432 3 e 11 gfx_uma_size
|
||||||
435 2 e 12 hybrid_graphics_mode
|
435 2 e 12 hybrid_graphics_mode
|
||||||
#437 3 r 0 unused
|
|
||||||
|
|
||||||
440 8 h 0 volume
|
440 8 h 0 volume
|
||||||
|
|
||||||
|
|||||||
@@ -3,40 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
@@ -58,12 +35,10 @@ entries
|
|||||||
422 2 e 13 usb_always_on
|
422 2 e 13 usb_always_on
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#424 8 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 3 e 11 gfx_uma_size
|
432 3 e 11 gfx_uma_size
|
||||||
435 2 e 12 hybrid_graphics_mode
|
435 2 e 12 hybrid_graphics_mode
|
||||||
#437 3 r 0 unused
|
|
||||||
|
|
||||||
440 8 h 0 volume
|
440 8 h 0 volume
|
||||||
|
|
||||||
|
|||||||
@@ -3,40 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
@@ -58,12 +35,10 @@ entries
|
|||||||
422 2 e 10 backlight
|
422 2 e 10 backlight
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#424 8 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 3 e 11 gfx_uma_size
|
432 3 e 11 gfx_uma_size
|
||||||
435 2 e 12 hybrid_graphics_mode
|
435 2 e 12 hybrid_graphics_mode
|
||||||
#437 3 r 0 unused
|
|
||||||
440 8 h 0 volume
|
440 8 h 0 volume
|
||||||
|
|
||||||
# VBOOT
|
# VBOOT
|
||||||
|
|||||||
@@ -3,40 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
@@ -59,12 +36,10 @@ entries
|
|||||||
424 1 e 1 f1_to_f12_as_primary
|
424 1 e 1 f1_to_f12_as_primary
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#424 8 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 3 e 11 gfx_uma_size
|
432 3 e 11 gfx_uma_size
|
||||||
435 1 e 1 enable_dual_graphics
|
435 1 e 1 enable_dual_graphics
|
||||||
#436 4 r 0 unused
|
|
||||||
440 8 h 0 volume
|
440 8 h 0 volume
|
||||||
|
|
||||||
# VBOOT
|
# VBOOT
|
||||||
|
|||||||
@@ -3,40 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
@@ -56,7 +33,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
435 1 e 1 enable_dual_graphics
|
435 1 e 1 enable_dual_graphics
|
||||||
#437 3 r 0 unused
|
|
||||||
440 8 h 0 volume
|
440 8 h 0 volume
|
||||||
|
|
||||||
# VBOOT
|
# VBOOT
|
||||||
|
|||||||
@@ -3,40 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
@@ -58,12 +35,10 @@ entries
|
|||||||
422 2 e 10 backlight
|
422 2 e 10 backlight
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#424 8 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 3 e 11 gfx_uma_size
|
432 3 e 11 gfx_uma_size
|
||||||
435 2 e 12 hybrid_graphics_mode
|
435 2 e 12 hybrid_graphics_mode
|
||||||
#437 3 r 0 unused
|
|
||||||
440 8 h 0 volume
|
440 8 h 0 volume
|
||||||
|
|
||||||
# VBOOT
|
# VBOOT
|
||||||
|
|||||||
@@ -3,40 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
@@ -58,12 +35,10 @@ entries
|
|||||||
422 2 e 10 backlight
|
422 2 e 10 backlight
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#424 8 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 3 e 11 gfx_uma_size
|
432 3 e 11 gfx_uma_size
|
||||||
435 2 e 12 hybrid_graphics_mode
|
435 2 e 12 hybrid_graphics_mode
|
||||||
#437 3 r 0 unused
|
|
||||||
|
|
||||||
440 8 h 0 volume
|
440 8 h 0 volume
|
||||||
|
|
||||||
|
|||||||
@@ -3,40 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
@@ -52,10 +29,8 @@ entries
|
|||||||
928 8 h 0 boot_default
|
928 8 h 0 boot_default
|
||||||
936 1 e 8 cmos_defaults_loaded
|
936 1 e 8 cmos_defaults_loaded
|
||||||
937 1 e 1 lpt
|
937 1 e 1 lpt
|
||||||
#938 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#945 3 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: ec
|
# coreboot config options: ec
|
||||||
948 1 e 1 touchpad
|
948 1 e 1 touchpad
|
||||||
@@ -65,14 +40,12 @@ entries
|
|||||||
952 8 h 0 volume
|
952 8 h 0 volume
|
||||||
960 1 e 9 first_battery
|
960 1 e 9 first_battery
|
||||||
961 1 e 1 trackpoint
|
961 1 e 1 trackpoint
|
||||||
#962 1 r 0 unused
|
|
||||||
963 1 e 1 sticky_fn
|
963 1 e 1 sticky_fn
|
||||||
964 1 e 1 power_management_beeps
|
964 1 e 1 power_management_beeps
|
||||||
965 1 e 1 low_battery_beep
|
965 1 e 1 low_battery_beep
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# RAM initialization internal data
|
# RAM initialization internal data
|
||||||
1024 8 r 0 C0WL0REOST
|
1024 8 r 0 C0WL0REOST
|
||||||
|
|||||||
@@ -3,51 +3,26 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 5 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#424 8 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 4 e 11 gfx_uma_size
|
432 4 e 11 gfx_uma_size
|
||||||
#435 549 r 0 unused
|
|
||||||
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
|
|||||||
@@ -3,40 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
@@ -54,14 +31,11 @@ entries
|
|||||||
417 1 e 1 fn_ctrl_swap
|
417 1 e 1 fn_ctrl_swap
|
||||||
418 1 e 1 sticky_fn
|
418 1 e 1 sticky_fn
|
||||||
419 2 e 12 usb_always_on
|
419 2 e 12 usb_always_on
|
||||||
#421 3 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#424 8 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 3 e 11 gfx_uma_size
|
432 3 e 11 gfx_uma_size
|
||||||
#435 5 r 0 unused
|
|
||||||
|
|
||||||
440 8 h 0 volume
|
440 8 h 0 volume
|
||||||
|
|
||||||
|
|||||||
@@ -3,40 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
@@ -58,11 +35,9 @@ entries
|
|||||||
422 2 e 10 backlight
|
422 2 e 10 backlight
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#424 8 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 3 e 11 gfx_uma_size
|
432 3 e 11 gfx_uma_size
|
||||||
#435 5 r 0 unused
|
|
||||||
|
|
||||||
440 8 h 0 volume
|
440 8 h 0 volume
|
||||||
|
|
||||||
|
|||||||
@@ -3,40 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 240 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
@@ -66,7 +43,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 unused
|
|
||||||
|
|
||||||
# RAM initialization internal data
|
# RAM initialization internal data
|
||||||
1024 128 r 0 read_training_results
|
1024 128 r 0 read_training_results
|
||||||
@@ -74,7 +50,6 @@ entries
|
|||||||
# VBOOT
|
# VBOOT
|
||||||
1152 128 r 0 vbnv
|
1152 128 r 0 vbnv
|
||||||
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
enumerations
|
enumerations
|
||||||
|
|||||||
@@ -3,40 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
@@ -57,11 +34,9 @@ entries
|
|||||||
420 1 e 1 low_battery_beep
|
420 1 e 1 low_battery_beep
|
||||||
421 1 e 9 sata_mode
|
421 1 e 9 sata_mode
|
||||||
422 2 e 11 usb_always_on
|
422 2 e 11 usb_always_on
|
||||||
#423 1 r 1 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
424 3 e 10 gfx_uma_size
|
424 3 e 10 gfx_uma_size
|
||||||
#427 5 r 0 unused
|
|
||||||
432 8 h 0 volume
|
432 8 h 0 volume
|
||||||
|
|
||||||
# VBOOT
|
# VBOOT
|
||||||
@@ -69,7 +44,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -3,40 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
@@ -56,14 +33,11 @@ entries
|
|||||||
419 1 e 1 power_management_beeps
|
419 1 e 1 power_management_beeps
|
||||||
421 1 e 9 sata_mode
|
421 1 e 9 sata_mode
|
||||||
422 2 e 12 usb_always_on
|
422 2 e 12 usb_always_on
|
||||||
#423 1 r 1 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#424 8 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 3 e 11 gfx_uma_size
|
432 3 e 11 gfx_uma_size
|
||||||
#435 549 r 0 unused
|
|
||||||
440 8 h 0 volume
|
440 8 h 0 volume
|
||||||
|
|
||||||
# VBOOT
|
# VBOOT
|
||||||
|
|||||||
@@ -3,40 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
@@ -59,11 +36,9 @@ entries
|
|||||||
424 1 e 1 f1_to_f12_as_primary
|
424 1 e 1 f1_to_f12_as_primary
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#424 8 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: northbridge
|
# coreboot config options: northbridge
|
||||||
432 3 e 11 gfx_uma_size
|
432 3 e 11 gfx_uma_size
|
||||||
#435 5 r 0 unused
|
|
||||||
|
|
||||||
440 8 h 0 volume
|
440 8 h 0 volume
|
||||||
|
|
||||||
|
|||||||
@@ -3,40 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
#400 8 r 0 reserved for century byte
|
#400 8 r 0 reserved for century byte
|
||||||
|
|
||||||
@@ -52,10 +29,8 @@ entries
|
|||||||
928 8 h 0 boot_default
|
928 8 h 0 boot_default
|
||||||
936 1 e 8 cmos_defaults_loaded
|
936 1 e 8 cmos_defaults_loaded
|
||||||
937 1 e 1 lpt
|
937 1 e 1 lpt
|
||||||
#938 6 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#945 4 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: ec
|
# coreboot config options: ec
|
||||||
949 1 e 9 first_battery
|
949 1 e 9 first_battery
|
||||||
@@ -63,7 +38,6 @@ entries
|
|||||||
951 1 e 1 wwan
|
951 1 e 1 wwan
|
||||||
952 1 e 1 wlan
|
952 1 e 1 wlan
|
||||||
953 1 e 1 trackpoint
|
953 1 e 1 trackpoint
|
||||||
#954 1 r 0 unused
|
|
||||||
955 1 e 1 sticky_fn
|
955 1 e 1 sticky_fn
|
||||||
956 1 e 1 power_management_beeps
|
956 1 e 1 power_management_beeps
|
||||||
959 1 e 1 low_battery_beep
|
959 1 e 1 low_battery_beep
|
||||||
@@ -72,7 +46,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# RAM initialization internal data
|
# RAM initialization internal data
|
||||||
1024 8 r 0 C0WL0REOST
|
1024 8 r 0 C0WL0REOST
|
||||||
|
|||||||
@@ -8,7 +8,6 @@ entries
|
|||||||
0 384 r 0 reserved_memory
|
0 384 r 0 reserved_memory
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#392 3 r 0 unused
|
|
||||||
395 1 e 1 hw_scrubber
|
395 1 e 1 hw_scrubber
|
||||||
396 1 e 1 interleave_chip_selects
|
396 1 e 1 interleave_chip_selects
|
||||||
397 2 e 8 max_mem_clock
|
397 2 e 8 max_mem_clock
|
||||||
@@ -24,8 +23,6 @@ entries
|
|||||||
# Reserve the extended AMD configuration registers
|
# Reserve the extended AMD configuration registers
|
||||||
1000 24 r 0 amd_reserved
|
1000 24 r 0 amd_reserved
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
enumerations
|
enumerations
|
||||||
|
|
||||||
#ID value text
|
#ID value text
|
||||||
|
|||||||
@@ -8,7 +8,6 @@ entries
|
|||||||
0 384 r 0 reserved_memory
|
0 384 r 0 reserved_memory
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#392 3 r 0 unused
|
|
||||||
395 1 e 1 hw_scrubber
|
395 1 e 1 hw_scrubber
|
||||||
396 1 e 1 interleave_chip_selects
|
396 1 e 1 interleave_chip_selects
|
||||||
397 2 e 8 max_mem_clock
|
397 2 e 8 max_mem_clock
|
||||||
|
|||||||
@@ -3,40 +3,17 @@
|
|||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
entries
|
entries
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused?
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
@@ -48,7 +25,6 @@ entries
|
|||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
@@ -6,7 +6,6 @@ entries
|
|||||||
# leave 3 bits to make checksummed area start byte-aligned
|
# leave 3 bits to make checksummed area start byte-aligned
|
||||||
392 1 e 2 boot_option
|
392 1 e 2 boot_option
|
||||||
393 1 e 1 multi_core
|
393 1 e 1 multi_core
|
||||||
#394 6 unused
|
|
||||||
400 4 e 4 debug_level
|
400 4 e 4 debug_level
|
||||||
# leave 7 bits to make checksummed area end byte-aligned
|
# leave 7 bits to make checksummed area end byte-aligned
|
||||||
408 16 h 0 check_sum
|
408 16 h 0 check_sum
|
||||||
|
|||||||
@@ -8,7 +8,6 @@ entries
|
|||||||
0 384 r 0 reserved_memory
|
0 384 r 0 reserved_memory
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 r 0 reboot_bits
|
388 4 r 0 reboot_bits
|
||||||
#392 3 r 0 unused
|
|
||||||
395 1 e 1 hw_scrubber
|
395 1 e 1 hw_scrubber
|
||||||
396 1 e 1 interleave_chip_selects
|
396 1 e 1 interleave_chip_selects
|
||||||
397 2 e 8 max_mem_clock
|
397 2 e 8 max_mem_clock
|
||||||
|
|||||||
@@ -4,78 +4,30 @@
|
|||||||
entries
|
entries
|
||||||
|
|
||||||
#start-bit length config config-ID name
|
#start-bit length config config-ID name
|
||||||
#0 8 r 0 seconds
|
|
||||||
#8 8 r 0 alarm_seconds
|
|
||||||
#16 8 r 0 minutes
|
|
||||||
#24 8 r 0 alarm_minutes
|
|
||||||
#32 8 r 0 hours
|
|
||||||
#40 8 r 0 alarm_hours
|
|
||||||
#48 8 r 0 day_of_week
|
|
||||||
#56 8 r 0 day_of_month
|
|
||||||
#64 8 r 0 month
|
|
||||||
#72 8 r 0 year
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register A
|
|
||||||
#80 4 r 0 rate_select
|
|
||||||
#84 3 r 0 REF_Clock
|
|
||||||
#87 1 r 0 UIP
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register B
|
|
||||||
#88 1 r 0 auto_switch_DST
|
|
||||||
#89 1 r 0 24_hour_mode
|
|
||||||
#90 1 r 0 binary_values_enable
|
|
||||||
#91 1 r 0 square-wave_out_enable
|
|
||||||
#92 1 r 0 update_finished_enable
|
|
||||||
#93 1 r 0 alarm_interrupt_enable
|
|
||||||
#94 1 r 0 periodic_interrupt_enable
|
|
||||||
#95 1 r 0 disable_clock_updates
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register C
|
|
||||||
#96 4 r 0 status_c_rsvd
|
|
||||||
#100 1 r 0 uf_flag
|
|
||||||
#101 1 r 0 af_flag
|
|
||||||
#102 1 r 0 pf_flag
|
|
||||||
#103 1 r 0 irqf_flag
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Status Register D
|
|
||||||
#104 7 r 0 status_d_rsvd
|
|
||||||
#111 1 r 0 valid_cmos_ram
|
|
||||||
# -----------------------------------------------------------------
|
|
||||||
# Diagnostic Status Register
|
|
||||||
#112 8 r 0 diag_rsvd1
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
0 120 r 0 reserved_memory
|
0 120 r 0 reserved_memory
|
||||||
#120 264 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# RTC_BOOT_BYTE (coreboot hardcoded)
|
# RTC_BOOT_BYTE (coreboot hardcoded)
|
||||||
# reboot_counter reserved for core, not used by platform.
|
# reboot_counter reserved for core, not used by platform.
|
||||||
384 1 e 4 boot_option
|
384 1 e 4 boot_option
|
||||||
388 4 h 0 reboot_counter
|
388 4 h 0 reboot_counter
|
||||||
#390 2 r 0 unused
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
# coreboot config options: console
|
# coreboot config options: console
|
||||||
#392 3 r 0 unused
|
|
||||||
395 4 e 6 debug_level
|
395 4 e 6 debug_level
|
||||||
#399 1 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: cpu
|
# coreboot config options: cpu
|
||||||
#400 1 e 2 unused
|
|
||||||
#401 7 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: southbridge
|
# coreboot config options: southbridge
|
||||||
408 1 e 1 nmi
|
408 1 e 1 nmi
|
||||||
409 2 e 7 power_on_after_fail
|
409 2 e 7 power_on_after_fail
|
||||||
#411 5 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: bootloader
|
# coreboot config options: bootloader
|
||||||
#416 568 r 0 unused
|
|
||||||
|
|
||||||
# coreboot config options: check sums
|
# coreboot config options: check sums
|
||||||
984 16 h 0 check_sum
|
984 16 h 0 check_sum
|
||||||
#1000 24 r 0 amd_reserved
|
|
||||||
|
|
||||||
# -----------------------------------------------------------------
|
# -----------------------------------------------------------------
|
||||||
|
|
||||||
|
|||||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user