mb/google/brya/var/xol: Using baseboard's PchPmSlpAMinAssert settings

Reduce PchPmSlpAMinAssert (pch_slp_a_min_assertion_width) to minimum
time (98ms) from 2sec.

BUG=b:349595391
BRANCH=firmware-brya-14505.B
Test=Verified on xol

Change-Id: Ia4b7b7ab5dc9afeb3505dfd2b42d0d397aed7a5c
Signed-off-by: Raymond Chung <raymondchung@ami.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83683
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Raymond Chung 2024-07-30 12:03:28 +08:00 committed by Subrata Banik
parent 97bc693abc
commit 42e4dd5aef

View File

@ -23,8 +23,6 @@ chip soc/intel/alderlake
register "sagv" = "SaGv_Enabled"
register "pch_slp_a_min_assertion_width" = "SLP_A_ASSERTION_DEFAULT"
# As per Intel Advisory doc#723158, the change is required to prevent possible
# display flickering issue.
register "disable_dynamic_tccold_handshake" = "true"