soc/amd/*/memmap: factor out common read_lower_soc_memmap_resources
Since the code for reporting the memory map below cbmem_top is basically identical for all non-CAR AMD SoCs, factor this out into a common read_lower_soc_memmap_resources implementation. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Id64462b97d144ccdf78ebb051d82a4aa37f8ee98 Reviewed-on: https://review.coreboot.org/c/coreboot/+/81389 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
This commit is contained in:
@@ -3,8 +3,6 @@
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#include <amdblocks/iomap.h>
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#include <amdblocks/memmap.h>
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#include <amdblocks/root_complex.h>
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#include <arch/vga.h>
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#include <cbmem.h>
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#include <device/device.h>
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#include <stdint.h>
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@@ -62,34 +60,7 @@
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*/
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void read_soc_memmap_resources(struct device *dev, unsigned long *idx)
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{
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uint32_t mem_usable = (uintptr_t)cbmem_top();
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uintptr_t early_reserved_dram_start, early_reserved_dram_end;
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const struct memmap_early_dram *e = memmap_get_early_dram_usage();
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early_reserved_dram_start = e->base;
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early_reserved_dram_end = e->base + e->size;
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/* 0x0 - 0x9ffff */
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ram_range(dev, (*idx)++, 0, 0xa0000);
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/* 0xa0000 - 0xbffff: legacy VGA */
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mmio_range(dev, (*idx)++, VGA_MMIO_BASE, VGA_MMIO_SIZE);
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/* 0xc0000 - 0xfffff: Option ROM */
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reserved_ram_from_to(dev, (*idx)++, 0xc0000, 1 * MiB);
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/* 1MiB - bottom of DRAM reserved for early coreboot usage */
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ram_from_to(dev, (*idx)++, 1 * MiB, early_reserved_dram_start);
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/* DRAM reserved for early coreboot usage */
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reserved_ram_from_to(dev, (*idx)++, early_reserved_dram_start, early_reserved_dram_end);
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/*
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* top of DRAM consumed early - low top usable RAM
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* cbmem_top() accounts for low UMA and TSEG if they are used.
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*/
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ram_from_to(dev, (*idx)++, early_reserved_dram_end, mem_usable);
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read_lower_soc_memmap_resources(dev, idx);
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/* Reserve fixed IOMMU MMIO region */
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mmio_range(dev, (*idx)++, IOMMU_RESERVED_MMIO_BASE, IOMMU_RESERVED_MMIO_SIZE);
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@@ -2,9 +2,11 @@
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#include <amdblocks/memmap.h>
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#include <amdblocks/smm.h>
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#include <arch/vga.h>
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#include <console/console.h>
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#include <cbmem.h>
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#include <cpu/x86/smm.h>
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#include <device/device.h>
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#include <memrange.h>
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#include <types.h>
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@@ -21,7 +23,7 @@ void memmap_stash_early_dram_usage(void)
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e->size = REGION_SIZE(early_reserved_dram);
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}
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const struct memmap_early_dram *memmap_get_early_dram_usage(void)
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static const struct memmap_early_dram *memmap_get_early_dram_usage(void)
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{
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struct memmap_early_dram *e = cbmem_find(CBMEM_ID_CB_EARLY_DRAM);
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@@ -31,6 +33,39 @@ const struct memmap_early_dram *memmap_get_early_dram_usage(void)
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return e;
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}
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/* report SoC memory map up to cbmem_top */
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void read_lower_soc_memmap_resources(struct device *dev, unsigned long *idx)
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{
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uint32_t mem_usable = (uintptr_t)cbmem_top();
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uintptr_t early_reserved_dram_start, early_reserved_dram_end;
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const struct memmap_early_dram *e = memmap_get_early_dram_usage();
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early_reserved_dram_start = e->base;
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early_reserved_dram_end = e->base + e->size;
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/* 0x0 - 0x9ffff */
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ram_range(dev, (*idx)++, 0, 0xa0000);
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/* 0xa0000 - 0xbffff: legacy VGA */
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mmio_range(dev, (*idx)++, VGA_MMIO_BASE, VGA_MMIO_SIZE);
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/* 0xc0000 - 0xfffff: Option ROM */
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reserved_ram_from_to(dev, (*idx)++, 0xc0000, 1 * MiB);
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/* 1MiB - bottom of DRAM reserved for early coreboot usage */
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ram_from_to(dev, (*idx)++, 1 * MiB, early_reserved_dram_start);
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/* DRAM reserved for early coreboot usage */
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reserved_ram_from_to(dev, (*idx)++, early_reserved_dram_start, early_reserved_dram_end);
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/*
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* top of DRAM consumed early - low top usable RAM
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* cbmem_top() accounts for low UMA and TSEG if they are used.
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*/
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ram_from_to(dev, (*idx)++, early_reserved_dram_end, mem_usable);
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}
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void smm_region(uintptr_t *start, size_t *size)
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{
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static int once;
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@@ -3,6 +3,7 @@
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#ifndef AMD_BLOCK_MEMMAP_H
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#define AMD_BLOCK_MEMMAP_H
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#include <device/device.h>
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#include <stdint.h>
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#include <symbols.h>
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@@ -15,7 +16,9 @@ struct memmap_early_dram {
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};
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void memmap_stash_early_dram_usage(void);
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const struct memmap_early_dram *memmap_get_early_dram_usage(void);
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/* report SoC memory map up to cbmem_top */
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void read_lower_soc_memmap_resources(struct device *dev, unsigned long *idx);
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void fsp_get_smm_region(uintptr_t *start, size_t *size);
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@@ -7,7 +7,6 @@
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#include <amdblocks/root_complex.h>
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#include <amdblocks/smn.h>
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#include <arch/ioapic.h>
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#include <cbmem.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <types.h>
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@@ -18,28 +17,7 @@
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void read_soc_memmap_resources(struct device *domain, unsigned long *idx)
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{
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ram_from_to(domain, (*idx)++, 0, 0xa0000);
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mmio_from_to(domain, (*idx)++, 0xa0000, 0xc0000); // legacy VGA
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reserved_ram_from_to(domain, (*idx)++, 0xc0000, 1 * MiB); // Option ROM
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uint32_t mem_usable = (uintptr_t)cbmem_top();
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uintptr_t early_reserved_dram_start, early_reserved_dram_end;
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const struct memmap_early_dram *e = memmap_get_early_dram_usage();
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early_reserved_dram_start = e->base;
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early_reserved_dram_end = e->base + e->size;
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// 1MB - bottom of DRAM reserved for early coreboot usage
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ram_from_to(domain, (*idx)++, 1 * MiB, early_reserved_dram_start);
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// DRAM reserved for early coreboot usage
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reserved_ram_from_to(domain, (*idx)++, early_reserved_dram_start,
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early_reserved_dram_end);
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// top of DRAM consumed early - low top usable RAM
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// cbmem_top() accounts for low UMA and TSEG if they are used.
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ram_from_to(domain, (*idx)++, early_reserved_dram_end,
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mem_usable);
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read_lower_soc_memmap_resources(domain, idx);
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add_opensil_memmap(domain, idx);
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}
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@@ -3,8 +3,6 @@
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#include <amdblocks/iomap.h>
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#include <amdblocks/memmap.h>
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#include <amdblocks/root_complex.h>
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#include <arch/vga.h>
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#include <cbmem.h>
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#include <device/device.h>
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#include <stdint.h>
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@@ -62,34 +60,7 @@
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*/
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void read_soc_memmap_resources(struct device *dev, unsigned long *idx)
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{
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uint32_t mem_usable = (uintptr_t)cbmem_top();
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uintptr_t early_reserved_dram_start, early_reserved_dram_end;
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const struct memmap_early_dram *e = memmap_get_early_dram_usage();
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early_reserved_dram_start = e->base;
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early_reserved_dram_end = e->base + e->size;
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/* 0x0 - 0x9ffff */
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ram_range(dev, (*idx)++, 0, 0xa0000);
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/* 0xa0000 - 0xbffff: legacy VGA */
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mmio_range(dev, (*idx)++, VGA_MMIO_BASE, VGA_MMIO_SIZE);
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/* 0xc0000 - 0xfffff: Option ROM */
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reserved_ram_from_to(dev, (*idx)++, 0xc0000, 1 * MiB);
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/* 1MiB - bottom of DRAM reserved for early coreboot usage */
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ram_from_to(dev, (*idx)++, 1 * MiB, early_reserved_dram_start);
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/* DRAM reserved for early coreboot usage */
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reserved_ram_from_to(dev, (*idx)++, early_reserved_dram_start, early_reserved_dram_end);
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/*
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* top of DRAM consumed early - low top usable RAM
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* cbmem_top() accounts for low UMA and TSEG if they are used.
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*/
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ram_from_to(dev, (*idx)++, early_reserved_dram_end, mem_usable);
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read_lower_soc_memmap_resources(dev, idx);
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/* Reserve fixed IOMMU MMIO region */
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mmio_range(dev, (*idx)++, IOMMU_RESERVED_MMIO_BASE, IOMMU_RESERVED_MMIO_SIZE);
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@@ -3,8 +3,6 @@
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#include <amdblocks/iomap.h>
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#include <amdblocks/memmap.h>
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#include <amdblocks/root_complex.h>
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#include <arch/vga.h>
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#include <cbmem.h>
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#include <device/device.h>
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#include <stdint.h>
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@@ -62,34 +60,7 @@
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*/
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void read_soc_memmap_resources(struct device *dev, unsigned long *idx)
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{
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uint32_t mem_usable = (uintptr_t)cbmem_top();
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uintptr_t early_reserved_dram_start, early_reserved_dram_end;
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const struct memmap_early_dram *e = memmap_get_early_dram_usage();
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early_reserved_dram_start = e->base;
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early_reserved_dram_end = e->base + e->size;
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/* 0x0 - 0x9ffff */
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ram_range(dev, (*idx)++, 0, 0xa0000);
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/* 0xa0000 - 0xbffff: legacy VGA */
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mmio_range(dev, (*idx)++, VGA_MMIO_BASE, VGA_MMIO_SIZE);
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/* 0xc0000 - 0xfffff: Option ROM */
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reserved_ram_from_to(dev, (*idx)++, 0xc0000, 1 * MiB);
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/* 1MiB - bottom of DRAM reserved for early coreboot usage */
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ram_from_to(dev, (*idx)++, 1 * MiB, early_reserved_dram_start);
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/* DRAM reserved for early coreboot usage */
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reserved_ram_from_to(dev, (*idx)++, early_reserved_dram_start, early_reserved_dram_end);
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/*
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* top of DRAM consumed early - low top usable RAM
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* cbmem_top() accounts for low UMA and TSEG if they are used.
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*/
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ram_from_to(dev, (*idx)++, early_reserved_dram_end, mem_usable);
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read_lower_soc_memmap_resources(dev, idx);
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/* Reserve fixed IOMMU MMIO region */
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mmio_range(dev, (*idx)++, IOMMU_RESERVED_MMIO_BASE, IOMMU_RESERVED_MMIO_SIZE);
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@@ -3,8 +3,6 @@
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#include <amdblocks/iomap.h>
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#include <amdblocks/memmap.h>
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#include <amdblocks/root_complex.h>
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#include <arch/vga.h>
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#include <cbmem.h>
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#include <device/device.h>
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#include <stdint.h>
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#include <vendorcode/amd/opensil/stub/opensil.h>
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@@ -63,34 +61,7 @@
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*/
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void read_soc_memmap_resources(struct device *dev, unsigned long *idx)
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{
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uint32_t mem_usable = (uintptr_t)cbmem_top();
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uintptr_t early_reserved_dram_start, early_reserved_dram_end;
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const struct memmap_early_dram *e = memmap_get_early_dram_usage();
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early_reserved_dram_start = e->base;
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early_reserved_dram_end = e->base + e->size;
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/* 0x0 - 0x9ffff */
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ram_range(dev, (*idx)++, 0, 0xa0000);
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/* 0xa0000 - 0xbffff: legacy VGA */
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mmio_range(dev, (*idx)++, VGA_MMIO_BASE, VGA_MMIO_SIZE);
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/* 0xc0000 - 0xfffff: Option ROM */
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reserved_ram_from_to(dev, (*idx)++, 0xc0000, 1 * MiB);
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/* 1MiB - bottom of DRAM reserved for early coreboot usage */
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ram_from_to(dev, (*idx)++, 1 * MiB, early_reserved_dram_start);
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/* DRAM reserved for early coreboot usage */
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reserved_ram_from_to(dev, (*idx)++, early_reserved_dram_start, early_reserved_dram_end);
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/*
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* top of DRAM consumed early - low top usable RAM
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* cbmem_top() accounts for low UMA and TSEG if they are used.
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*/
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ram_from_to(dev, (*idx)++, early_reserved_dram_end, mem_usable);
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read_lower_soc_memmap_resources(dev, idx);
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/* Reserve fixed IOMMU MMIO region */
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mmio_range(dev, (*idx)++, IOMMU_RESERVED_MMIO_BASE, IOMMU_RESERVED_MMIO_SIZE);
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@@ -3,8 +3,6 @@
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#include <amdblocks/memmap.h>
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#include <amdblocks/iomap.h>
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#include <amdblocks/root_complex.h>
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#include <arch/vga.h>
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#include <cbmem.h>
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#include <device/device.h>
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#include <stdint.h>
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@@ -62,32 +60,7 @@
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*/
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void read_soc_memmap_resources(struct device *dev, unsigned long *idx)
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{
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uint32_t mem_usable = (uintptr_t)cbmem_top();
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uintptr_t early_reserved_dram_start, early_reserved_dram_end;
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const struct memmap_early_dram *e = memmap_get_early_dram_usage();
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early_reserved_dram_start = e->base;
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early_reserved_dram_end = e->base + e->size;
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/* 0x0 - 0x9ffff */
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ram_range(dev, (*idx)++, 0, 0xa0000);
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/* 0xa0000 - 0xbffff: legacy VGA */
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mmio_range(dev, (*idx)++, VGA_MMIO_BASE, VGA_MMIO_SIZE);
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/* 0xc0000 - 0xfffff: Option ROM */
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reserved_ram_from_to(dev, (*idx)++, 0xc0000, 1 * MiB);
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/* 1MB - bottom of DRAM reserved for early coreboot usage */
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ram_from_to(dev, (*idx)++, 1 * MiB, early_reserved_dram_start);
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/* DRAM reserved for early coreboot usage */
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reserved_ram_from_to(dev, (*idx)++, early_reserved_dram_start, early_reserved_dram_end);
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/* top of DRAM consumed early - low top usable RAM
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* cbmem_top() accounts for low UMA and TSEG if they are used. */
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ram_from_to(dev, (*idx)++, early_reserved_dram_end, mem_usable);
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read_lower_soc_memmap_resources(dev, idx);
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/* Reserve fixed IOMMU MMIO region */
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mmio_range(dev, (*idx)++, IOMMU_RESERVED_MMIO_BASE, IOMMU_RESERVED_MMIO_SIZE);
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