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soc/amd/*/memmap: factor out common read_lower_soc_memmap_resources

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Since the code for reporting the memory map below cbmem_top is basically
identical for all non-CAR AMD SoCs, factor this out into a common
read_lower_soc_memmap_resources implementation.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id64462b97d144ccdf78ebb051d82a4aa37f8ee98
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81389
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
This commit is contained in:
Felix Held
2024-03-22 16:16:18 +01:00
parent ca11545ca6
commit 556373e354
8 changed files with 46 additions and 173 deletions
Download Patch File Download Diff File Expand all files Collapse all files

31
src/soc/amd/cezanne/memmap.c
View File

@@ -3,8 +3,6 @@
#include <amdblocks/iomap.h>
#include <amdblocks/memmap.h>
#include <amdblocks/root_complex.h>
#include <arch/vga.h>
#include <cbmem.h>
#include <device/device.h>
#include <stdint.h>
@@ -62,34 +60,7 @@
*/
void read_soc_memmap_resources(struct device *dev, unsigned long *idx)
{
uint32_t mem_usable = (uintptr_t)cbmem_top();
uintptr_t early_reserved_dram_start, early_reserved_dram_end;
const struct memmap_early_dram *e = memmap_get_early_dram_usage();
early_reserved_dram_start = e->base;
early_reserved_dram_end = e->base + e->size;
/* 0x0 - 0x9ffff */
ram_range(dev, (*idx)++, 0, 0xa0000);
/* 0xa0000 - 0xbffff: legacy VGA */
mmio_range(dev, (*idx)++, VGA_MMIO_BASE, VGA_MMIO_SIZE);
/* 0xc0000 - 0xfffff: Option ROM */
reserved_ram_from_to(dev, (*idx)++, 0xc0000, 1 * MiB);
/* 1MiB - bottom of DRAM reserved for early coreboot usage */
ram_from_to(dev, (*idx)++, 1 * MiB, early_reserved_dram_start);
/* DRAM reserved for early coreboot usage */
reserved_ram_from_to(dev, (*idx)++, early_reserved_dram_start, early_reserved_dram_end);
/*
* top of DRAM consumed early - low top usable RAM
* cbmem_top() accounts for low UMA and TSEG if they are used.
*/
ram_from_to(dev, (*idx)++, early_reserved_dram_end, mem_usable);
read_lower_soc_memmap_resources(dev, idx);
/* Reserve fixed IOMMU MMIO region */
mmio_range(dev, (*idx)++, IOMMU_RESERVED_MMIO_BASE, IOMMU_RESERVED_MMIO_SIZE);

37
src/soc/amd/common/block/cpu/noncar/memmap.c
View File

@@ -2,9 +2,11 @@
#include <amdblocks/memmap.h>
#include <amdblocks/smm.h>
#include <arch/vga.h>
#include <console/console.h>
#include <cbmem.h>
#include <cpu/x86/smm.h>
#include <device/device.h>
#include <memrange.h>
#include <types.h>
@@ -21,7 +23,7 @@ void memmap_stash_early_dram_usage(void)
e->size = REGION_SIZE(early_reserved_dram);
}
const struct memmap_early_dram *memmap_get_early_dram_usage(void)
static const struct memmap_early_dram *memmap_get_early_dram_usage(void)
{
struct memmap_early_dram *e = cbmem_find(CBMEM_ID_CB_EARLY_DRAM);
@@ -31,6 +33,39 @@ const struct memmap_early_dram *memmap_get_early_dram_usage(void)
return e;
}
/* report SoC memory map up to cbmem_top */
void read_lower_soc_memmap_resources(struct device *dev, unsigned long *idx)
{
uint32_t mem_usable = (uintptr_t)cbmem_top();
uintptr_t early_reserved_dram_start, early_reserved_dram_end;
const struct memmap_early_dram *e = memmap_get_early_dram_usage();
early_reserved_dram_start = e->base;
early_reserved_dram_end = e->base + e->size;
/* 0x0 - 0x9ffff */
ram_range(dev, (*idx)++, 0, 0xa0000);
/* 0xa0000 - 0xbffff: legacy VGA */
mmio_range(dev, (*idx)++, VGA_MMIO_BASE, VGA_MMIO_SIZE);
/* 0xc0000 - 0xfffff: Option ROM */
reserved_ram_from_to(dev, (*idx)++, 0xc0000, 1 * MiB);
/* 1MiB - bottom of DRAM reserved for early coreboot usage */
ram_from_to(dev, (*idx)++, 1 * MiB, early_reserved_dram_start);
/* DRAM reserved for early coreboot usage */
reserved_ram_from_to(dev, (*idx)++, early_reserved_dram_start, early_reserved_dram_end);
/*
* top of DRAM consumed early - low top usable RAM
* cbmem_top() accounts for low UMA and TSEG if they are used.
*/
ram_from_to(dev, (*idx)++, early_reserved_dram_end, mem_usable);
}
void smm_region(uintptr_t *start, size_t *size)
{
static int once;

5
src/soc/amd/common/block/include/amdblocks/memmap.h
View File

@@ -3,6 +3,7 @@
#ifndef AMD_BLOCK_MEMMAP_H
#define AMD_BLOCK_MEMMAP_H
#include <device/device.h>
#include <stdint.h>
#include <symbols.h>
@@ -15,7 +16,9 @@ struct memmap_early_dram {
};
void memmap_stash_early_dram_usage(void);
const struct memmap_early_dram *memmap_get_early_dram_usage(void);
/* report SoC memory map up to cbmem_top */
void read_lower_soc_memmap_resources(struct device *dev, unsigned long *idx);
void fsp_get_smm_region(uintptr_t *start, size_t *size);

24
src/soc/amd/genoa_poc/domain.c
View File

@@ -7,7 +7,6 @@
#include <amdblocks/root_complex.h>
#include <amdblocks/smn.h>
#include <arch/ioapic.h>
#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
#include <types.h>
@@ -18,28 +17,7 @@
void read_soc_memmap_resources(struct device *domain, unsigned long *idx)
{
ram_from_to(domain, (*idx)++, 0, 0xa0000);
mmio_from_to(domain, (*idx)++, 0xa0000, 0xc0000); // legacy VGA
reserved_ram_from_to(domain, (*idx)++, 0xc0000, 1 * MiB); // Option ROM
uint32_t mem_usable = (uintptr_t)cbmem_top();
uintptr_t early_reserved_dram_start, early_reserved_dram_end;
const struct memmap_early_dram *e = memmap_get_early_dram_usage();
early_reserved_dram_start = e->base;
early_reserved_dram_end = e->base + e->size;
// 1MB - bottom of DRAM reserved for early coreboot usage
ram_from_to(domain, (*idx)++, 1 * MiB, early_reserved_dram_start);
// DRAM reserved for early coreboot usage
reserved_ram_from_to(domain, (*idx)++, early_reserved_dram_start,
early_reserved_dram_end);
// top of DRAM consumed early - low top usable RAM
// cbmem_top() accounts for low UMA and TSEG if they are used.
ram_from_to(domain, (*idx)++, early_reserved_dram_end,
mem_usable);
read_lower_soc_memmap_resources(domain, idx);
add_opensil_memmap(domain, idx);
}

31
src/soc/amd/glinda/memmap.c
View File

@@ -3,8 +3,6 @@
#include <amdblocks/iomap.h>
#include <amdblocks/memmap.h>
#include <amdblocks/root_complex.h>
#include <arch/vga.h>
#include <cbmem.h>
#include <device/device.h>
#include <stdint.h>
@@ -62,34 +60,7 @@
*/
void read_soc_memmap_resources(struct device *dev, unsigned long *idx)
{
uint32_t mem_usable = (uintptr_t)cbmem_top();
uintptr_t early_reserved_dram_start, early_reserved_dram_end;
const struct memmap_early_dram *e = memmap_get_early_dram_usage();
early_reserved_dram_start = e->base;
early_reserved_dram_end = e->base + e->size;
/* 0x0 - 0x9ffff */
ram_range(dev, (*idx)++, 0, 0xa0000);
/* 0xa0000 - 0xbffff: legacy VGA */
mmio_range(dev, (*idx)++, VGA_MMIO_BASE, VGA_MMIO_SIZE);
/* 0xc0000 - 0xfffff: Option ROM */
reserved_ram_from_to(dev, (*idx)++, 0xc0000, 1 * MiB);
/* 1MiB - bottom of DRAM reserved for early coreboot usage */
ram_from_to(dev, (*idx)++, 1 * MiB, early_reserved_dram_start);
/* DRAM reserved for early coreboot usage */
reserved_ram_from_to(dev, (*idx)++, early_reserved_dram_start, early_reserved_dram_end);
/*
* top of DRAM consumed early - low top usable RAM
* cbmem_top() accounts for low UMA and TSEG if they are used.
*/
ram_from_to(dev, (*idx)++, early_reserved_dram_end, mem_usable);
read_lower_soc_memmap_resources(dev, idx);
/* Reserve fixed IOMMU MMIO region */
mmio_range(dev, (*idx)++, IOMMU_RESERVED_MMIO_BASE, IOMMU_RESERVED_MMIO_SIZE);

31
src/soc/amd/mendocino/memmap.c
View File

@@ -3,8 +3,6 @@
#include <amdblocks/iomap.h>
#include <amdblocks/memmap.h>
#include <amdblocks/root_complex.h>
#include <arch/vga.h>
#include <cbmem.h>
#include <device/device.h>
#include <stdint.h>
@@ -62,34 +60,7 @@
*/
void read_soc_memmap_resources(struct device *dev, unsigned long *idx)
{
uint32_t mem_usable = (uintptr_t)cbmem_top();
uintptr_t early_reserved_dram_start, early_reserved_dram_end;
const struct memmap_early_dram *e = memmap_get_early_dram_usage();
early_reserved_dram_start = e->base;
early_reserved_dram_end = e->base + e->size;
/* 0x0 - 0x9ffff */
ram_range(dev, (*idx)++, 0, 0xa0000);
/* 0xa0000 - 0xbffff: legacy VGA */
mmio_range(dev, (*idx)++, VGA_MMIO_BASE, VGA_MMIO_SIZE);
/* 0xc0000 - 0xfffff: Option ROM */
reserved_ram_from_to(dev, (*idx)++, 0xc0000, 1 * MiB);
/* 1MiB - bottom of DRAM reserved for early coreboot usage */
ram_from_to(dev, (*idx)++, 1 * MiB, early_reserved_dram_start);
/* DRAM reserved for early coreboot usage */
reserved_ram_from_to(dev, (*idx)++, early_reserved_dram_start, early_reserved_dram_end);
/*
* top of DRAM consumed early - low top usable RAM
* cbmem_top() accounts for low UMA and TSEG if they are used.
*/
ram_from_to(dev, (*idx)++, early_reserved_dram_end, mem_usable);
read_lower_soc_memmap_resources(dev, idx);
/* Reserve fixed IOMMU MMIO region */
mmio_range(dev, (*idx)++, IOMMU_RESERVED_MMIO_BASE, IOMMU_RESERVED_MMIO_SIZE);

31
src/soc/amd/phoenix/memmap.c
View File

@@ -3,8 +3,6 @@
#include <amdblocks/iomap.h>
#include <amdblocks/memmap.h>
#include <amdblocks/root_complex.h>
#include <arch/vga.h>
#include <cbmem.h>
#include <device/device.h>
#include <stdint.h>
#include <vendorcode/amd/opensil/stub/opensil.h>
@@ -63,34 +61,7 @@
*/
void read_soc_memmap_resources(struct device *dev, unsigned long *idx)
{
uint32_t mem_usable = (uintptr_t)cbmem_top();
uintptr_t early_reserved_dram_start, early_reserved_dram_end;
const struct memmap_early_dram *e = memmap_get_early_dram_usage();
early_reserved_dram_start = e->base;
early_reserved_dram_end = e->base + e->size;
/* 0x0 - 0x9ffff */
ram_range(dev, (*idx)++, 0, 0xa0000);
/* 0xa0000 - 0xbffff: legacy VGA */
mmio_range(dev, (*idx)++, VGA_MMIO_BASE, VGA_MMIO_SIZE);
/* 0xc0000 - 0xfffff: Option ROM */
reserved_ram_from_to(dev, (*idx)++, 0xc0000, 1 * MiB);
/* 1MiB - bottom of DRAM reserved for early coreboot usage */
ram_from_to(dev, (*idx)++, 1 * MiB, early_reserved_dram_start);
/* DRAM reserved for early coreboot usage */
reserved_ram_from_to(dev, (*idx)++, early_reserved_dram_start, early_reserved_dram_end);
/*
* top of DRAM consumed early - low top usable RAM
* cbmem_top() accounts for low UMA and TSEG if they are used.
*/
ram_from_to(dev, (*idx)++, early_reserved_dram_end, mem_usable);
read_lower_soc_memmap_resources(dev, idx);
/* Reserve fixed IOMMU MMIO region */
mmio_range(dev, (*idx)++, IOMMU_RESERVED_MMIO_BASE, IOMMU_RESERVED_MMIO_SIZE);

29
src/soc/amd/picasso/memmap.c
View File

@@ -3,8 +3,6 @@
#include <amdblocks/memmap.h>
#include <amdblocks/iomap.h>
#include <amdblocks/root_complex.h>
#include <arch/vga.h>
#include <cbmem.h>
#include <device/device.h>
#include <stdint.h>
@@ -62,32 +60,7 @@
*/
void read_soc_memmap_resources(struct device *dev, unsigned long *idx)
{
uint32_t mem_usable = (uintptr_t)cbmem_top();
uintptr_t early_reserved_dram_start, early_reserved_dram_end;
const struct memmap_early_dram *e = memmap_get_early_dram_usage();
early_reserved_dram_start = e->base;
early_reserved_dram_end = e->base + e->size;
/* 0x0 - 0x9ffff */
ram_range(dev, (*idx)++, 0, 0xa0000);
/* 0xa0000 - 0xbffff: legacy VGA */
mmio_range(dev, (*idx)++, VGA_MMIO_BASE, VGA_MMIO_SIZE);
/* 0xc0000 - 0xfffff: Option ROM */
reserved_ram_from_to(dev, (*idx)++, 0xc0000, 1 * MiB);
/* 1MB - bottom of DRAM reserved for early coreboot usage */
ram_from_to(dev, (*idx)++, 1 * MiB, early_reserved_dram_start);
/* DRAM reserved for early coreboot usage */
reserved_ram_from_to(dev, (*idx)++, early_reserved_dram_start, early_reserved_dram_end);
/* top of DRAM consumed early - low top usable RAM
* cbmem_top() accounts for low UMA and TSEG if they are used. */
ram_from_to(dev, (*idx)++, early_reserved_dram_end, mem_usable);
read_lower_soc_memmap_resources(dev, idx);
/* Reserve fixed IOMMU MMIO region */
mmio_range(dev, (*idx)++, IOMMU_RESERVED_MMIO_BASE, IOMMU_RESERVED_MMIO_SIZE);