mb/system76: TGL-U: Disable AER for CPU PCIe RP
Fixes suspend with certain SSDs installed in the PCIe 4 slot. Change-Id: Ib91b154963aeafe96c8118cbab89f0e70634e8bc Signed-off-by: Tim Crawford <tcrawford@system76.com>
This commit is contained in:
committed by
Jeremy Soller
parent
090448674d
commit
5783ad7a65
@@ -3,11 +3,9 @@
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#include <soc/ramstage.h>
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#include "gpio.h"
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static void mainboard_init(void *chip_info)
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void mainboard_silicon_init_params(FSP_S_CONFIG *params)
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{
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params->CpuPcieRpAdvancedErrorReporting[0] = 0;
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gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
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}
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struct chip_operations mainboard_ops = {
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.init = mainboard_init,
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};
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@@ -3,11 +3,9 @@
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#include <mainboard/gpio.h>
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#include <soc/ramstage.h>
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static void mainboard_init(void *chip_info)
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void mainboard_silicon_init_params(FSP_S_CONFIG *params)
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{
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params->CpuPcieRpAdvancedErrorReporting[0] = 0;
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mainboard_configure_gpios();
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}
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struct chip_operations mainboard_ops = {
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.init = mainboard_init,
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};
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