soc/intel/elkhartlake: Switch to SOC_INTEL_COMMON_DEBUG_CONSENT

This patch drops the SoC-specific config option
`SOC_INTEL_ELKHARTLAKE_DEBUG_CONSENT`.

Additionally, updates the FSP configuration to use the new generic
config option.

TEST=Able to build and boot intel/elkhartlake_crb without any
functional impact while debugging.

Change-Id: Idb8db7230c432792e742218d41d891c529b2114f
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83959
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2024-08-17 18:20:40 +00:00 committed by Felix Held
parent d949bca67b
commit 79a688e761
2 changed files with 1 additions and 17 deletions

View File

@ -240,22 +240,6 @@ config EHL_TSN_DRIVER
Enable TSN GbE driver to provide board specific settings in the GBE MAC.
As an example of a possible change, the MAC address could be adjusted.
config SOC_INTEL_ELKHARTLAKE_DEBUG_CONSENT
int "Debug Consent for EHL"
# USB DBC is more common for developers so make this default to 3 if
# SOC_INTEL_DEBUG_CONSENT=y
default 3 if SOC_INTEL_DEBUG_CONSENT
default 0
help
This is to control debug interface on SOC.
Setting non-zero value will allow to use DBC or DCI to debug SOC.
PlatformDebugConsent in FspmUpd.h has the details.
Desired platform debug type are
0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB),
3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC),
6:Enable (2-wire DCI OOB), 7:Manual
config PRERAM_CBMEM_CONSOLE_SIZE
hex
default 0x1400

View File

@ -132,7 +132,7 @@ static void fill_fsp_debug_params(FSP_M_CONFIG *m_cfg,
m_cfg->SerialIoUartDebugControllerNumber = CONFIG_UART_FOR_CONSOLE;
/* Set debug probe type */
m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_ELKHARTLAKE_DEBUG_CONSENT;
m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT;
/* TraceHub configuration */
if (is_devfn_enabled(PCH_DEVFN_TRACEHUB) && config->TraceHubMode) {