oryp11: Set dq_pins_interleaved

Change-Id: I094e86b39df9cedcb2813a88785ef907b9bf2308 Signed-off-by: Tim Crawford <tcrawford@system76.com>
2023-02-09 11:25:20 -07:00
parent 64ceb34f0c
commit 7a43532db8
1 changed files with 3 additions and 0 deletions
--- a/src/mainboard/system76/rpl/variants/oryp11/romstage.c
+++ b/src/mainboard/system76/rpl/variants/oryp11/romstage.c
@@ -11,6 +11,9 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
 		.type = MEM_TYPE_DDR5,
 		.ect = true,
 		.LpDdrDqDqsReTraining = 1,
+		.ddr_config = {
+			.dq_pins_interleaved = true,
+		},
 	};
 	const struct mem_spd spd_info = {
 		.topo = MEM_TOPO_DIMM_MODULE,