chromeos: stop sharing write protect GPIO with depthcharge

wpsw_boot is deprecated in favour of wpsw_cur.  As such,
coreboot no longer needs to share "write protect" GPIO
with depthcharge.

BUG=b:124141368, chromium:950273
TEST=make clean && make test-abuild
BRANCH=none

Change-Id: I2fcb7f82aa063fd72928171af5cbef0356ba620c
Signed-off-by: Joel Kitching <kitching@google.com>
Cq-Depend: chromium:2088434
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39318
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Joel Kitching
2020-03-05 19:21:56 +08:00
committed by Patrick Georgi
parent 11bf9df9ac
commit 7fa1d9de5c
54 changed files with 0 additions and 100 deletions

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@ -23,8 +23,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{CROS_WP_GPIO, ACTIVE_HIGH, get_write_protect_state(),
"write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -30,8 +30,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{GPIO_SPI_WP, ACTIVE_HIGH,
get_write_protect_state(), "write protect"},
{GPIO_REC_MODE, ACTIVE_LOW,
!get_recovery_mode_switch(), "presence"},
{-1, ACTIVE_HIGH, 1, "lid"},

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@ -31,10 +31,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
/* Write Protect: GPIO active Low */
{WP_GPIO, ACTIVE_LOW, !get_write_protect_state(),
"write protect"},
/* lid switch value from EC */
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},

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@ -38,8 +38,6 @@ void fill_lb_gpios(struct lb_gpios *gpios)
"EC in RW"},
{GPIO_AP_EC_INT.addr, ACTIVE_LOW, gpio_get(GPIO_AP_EC_INT),
"EC interrupt"},
{GPIO_WP_STATE.addr, ACTIVE_LOW, !get_write_protect_state(),
"write protect"},
{GPIO_H1_AP_INT.addr, ACTIVE_LOW, gpio_get(GPIO_H1_AP_INT),
"TPM interrupt"},
};

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@ -32,7 +32,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -24,10 +24,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
/* Write Protect: active low (WP_GPIO) */
{EXYNOS5_GPD1, ACTIVE_LOW, !get_write_protect_state(),
"write protect"},
/* Lid: active high (LID_GPIO) */
{EXYNOS5_GPX3, ACTIVE_HIGH, gpio_get_value(GPIO_X35), "lid"},

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@ -15,7 +15,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -25,7 +25,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -34,8 +34,6 @@ enum rec_mode_state {
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{GPIO_PCH_WP, ACTIVE_HIGH, get_write_protect_state(),
"write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -24,7 +24,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -24,7 +24,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, 1, "lid"}, /* Lid switch always open */
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -24,9 +24,6 @@ void fill_lb_gpios(struct lb_gpios *gpios)
{
/* TBD(twarren@nvidia.com): Any analogs for these on Foster-FFD? */
struct lb_gpio chromeos_gpios[] = {
/* Write Protect: active low */
{-1, ACTIVE_LOW, !get_write_protect_state(), "write protect"},
/* TODO: Power: active low / high depending on board id */
{GPIO(X5), ACTIVE_LOW, -1, "power"},

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@ -68,8 +68,6 @@ void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{PP_SW, ACTIVE_LOW, read_gpio(PP_SW), "presence"},
{get_wp_status_gpio_pin(), ACTIVE_LOW,
!get_write_protect_state(), "write protect"},
{-1, ACTIVE_LOW, 1, "power"},
{-1, ACTIVE_LOW, 0, "lid"},
};

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@ -23,7 +23,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -32,8 +32,6 @@ int get_write_protect_state(void)
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{GPIO_WP.raw, wp_polarity,
get_write_protect_state() ^ !wp_polarity, "write protect"},
#if CONFIG(GRU_BASEBOARD_SCARLET)
{GPIO_BACKLIGHT.raw, ACTIVE_HIGH, -1, "backlight"},
#endif

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@ -24,7 +24,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -31,8 +31,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{GPIO_SPI_WP, ACTIVE_HIGH,
get_write_protect_state(), "write protect"},
{GPIO_REC_MODE, ACTIVE_LOW,
!get_recovery_mode_switch(), "presence"},
{-1, ACTIVE_HIGH, 1, "lid"},

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@ -23,7 +23,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{GPIO_EC_IN_RW, ACTIVE_HIGH, gpio_get(GPIO_EC_IN_RW),

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@ -33,8 +33,6 @@ void setup_chromeos_gpios(void)
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{GPIO_WP.id, ACTIVE_LOW,
!get_write_protect_state(), "write protect"},
{EC_IN_RW.id, ACTIVE_HIGH, -1, "EC in RW"},
{EC_IRQ.id, ACTIVE_LOW, -1, "EC interrupt"},
{CR50_IRQ.id, ACTIVE_HIGH, -1, "TPM interrupt"},

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@ -22,9 +22,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
/* Write Protect: GPIO57 = PCH_SPI_WP_D */
{57, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
/* Lid: the "switch" comes from the EC */
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},

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@ -20,8 +20,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{GPIO(R1), ACTIVE_LOW, !get_write_protect_state(),
"write protect"},
{GPIO(R4), ACTIVE_HIGH, -1, "lid"},
{GPIO(Q0), ACTIVE_LOW, -1, "power"},
{GPIO(U4), ACTIVE_HIGH, -1, "EC in RW"},

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@ -20,8 +20,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{GPIO(R1), ACTIVE_LOW,
!get_write_protect_state(), "write protect"},
{GPIO(R4), ACTIVE_HIGH, -1, "lid"},
{GPIO(Q0), ACTIVE_LOW, -1, "power"},
{GPIO(U4), ACTIVE_HIGH, -1, "EC in RW"},

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@ -20,8 +20,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{GPIO(R1), ACTIVE_LOW, !get_write_protect_state(),
"write protect"},
{GPIO(R4), ACTIVE_HIGH, -1, "lid"},
{GPIO(Q0), ACTIVE_LOW, -1, "power"},
{GPIO(U4), ACTIVE_HIGH, -1, "EC in RW"},

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@ -34,8 +34,6 @@ void setup_chromeos_gpios(void)
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{WRITE_PROTECT.id, ACTIVE_LOW,
!get_write_protect_state(), "write protect"},
{LID.id, ACTIVE_HIGH, -1, "lid"},
{POWER_BUTTON.id, ACTIVE_HIGH, -1, "power"},
{EC_IN_RW.id, ACTIVE_HIGH, -1, "EC in RW"},

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@ -24,7 +24,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -31,9 +31,6 @@ void fill_lb_gpios(struct lb_gpios *gpios)
u16 gen_pmcon_1 = pci_s_read_config32(dev, GEN_PMCON_1);
struct lb_gpio chromeos_gpios[] = {
/* Write Protect: GPIO70 active high */
{70, ACTIVE_LOW, !get_write_protect_state(), "write protect"},
/* Lid switch GPIO active high (open). */
{15, ACTIVE_HIGH, get_lid_switch(), "lid"},

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@ -24,10 +24,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
/* Write Protect: active low (WP_GPIO) */
{EXYNOS5_GPX3, ACTIVE_LOW, !get_write_protect_state(),
"write protect"},
/* Lid: active high (LID_GPIO) */
{EXYNOS5_GPX3, ACTIVE_HIGH, gpio_get_value(GPIO_X34), "lid"},

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@ -26,7 +26,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -24,7 +24,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -23,7 +23,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -32,8 +32,6 @@ enum rec_mode_state {
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{GPIO_PCH_WP, ACTIVE_HIGH, get_write_protect_state(),
"write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -22,7 +22,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{58, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -21,8 +21,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{WRITE_PROTECT_L, ACTIVE_LOW,
!get_write_protect_state(), "write protect"},
{POWER_BUTTON, ACTIVE_LOW, -1, "power"},
{EC_IN_RW, ACTIVE_HIGH, -1, "EC in RW"},
{AP_SYS_RESET_L, ACTIVE_LOW, -1, "reset"},

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@ -40,8 +40,6 @@ void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{DEV_SW, ACTIVE_LOW, read_gpio(REC_SW), "presence"},
{WP_SW, ACTIVE_LOW, !get_write_protect_state(),
"write protect"},
{-1, ACTIVE_LOW, 1, "power"},
{-1, ACTIVE_LOW, 0, "lid"},
};

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@ -28,9 +28,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
/* Write Protect: GPIO7 */
{7, ACTIVE_LOW, !get_write_protect_state(), "write protect"},
/* Lid Switch: Virtual switch */
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},

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@ -38,8 +38,6 @@ void fill_lb_gpios(struct lb_gpios *gpios)
"EC in RW"},
{GPIO_AP_EC_INT.addr, ACTIVE_LOW, gpio_get(GPIO_AP_EC_INT),
"EC interrupt"},
{GPIO_WP_STATE.addr, ACTIVE_LOW, !get_write_protect_state(),
"write protect"},
{GPIO_H1_AP_INT.addr, ACTIVE_LOW, gpio_get(GPIO_H1_AP_INT),
"TPM interrupt"},
};

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@ -40,8 +40,6 @@ void setup_chromeos_gpios(void)
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{GPIO_WP.raw, ACTIVE_LOW, !get_write_protect_state(),
"write protect"},
{GPIO_RECOVERY.raw, ACTIVE_LOW,
!get_recovery_mode_switch(), "presence"},
{GPIO_LID.raw, ACTIVE_HIGH, -1, "lid"},

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@ -31,8 +31,6 @@ void setup_chromeos_gpios(void)
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{GPIO_WP.raw, ACTIVE_LOW,
!get_write_protect_state(), "write protect"},
{GPIO_RECOVERY.raw, ACTIVE_LOW,
!get_recovery_mode_switch(), "presence"},
{GPIO_RESET.raw, ACTIVE_HIGH, -1, "reset"},

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@ -36,8 +36,6 @@ void setup_chromeos_gpios(void)
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{GPIO_WP.raw, ACTIVE_LOW,
!get_write_protect_state(), "write protect"},
/* Note for early development, we want to support both servo
* and pushkey recovery buttons in firmware boot stages. */
{GPIO_RECOVERY_PUSHKEY.raw, ACTIVE_LOW,

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@ -15,7 +15,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -23,9 +23,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
/* Write Protect: GPIO22 */
{0, ACTIVE_LOW, !get_write_protect_state(), "write protect"},
/* Recovery: GPIO69 - SV_DETECT - J8E3 (silkscreen: J8E2) */
{69, ACTIVE_HIGH, get_recovery_mode_switch(), "presence"},

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@ -24,7 +24,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -23,7 +23,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -23,9 +23,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
/* Write Protect: GPIO48 */
{48, ACTIVE_LOW, !get_write_protect_state(), "write protect"},
/* Recovery: GPIO22 */
{22, ACTIVE_LOW, !get_recovery_mode_switch(), "presence"},

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@ -24,7 +24,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -23,7 +23,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -22,7 +22,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -27,7 +27,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -23,7 +23,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -26,7 +26,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -22,7 +22,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -25,7 +25,6 @@
void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, 1, "lid"}, // force open
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},

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@ -38,10 +38,6 @@ void fill_lb_gpios(struct lb_gpios *gpios)
u8 lid = ec_read(0x83);
struct lb_gpio chromeos_gpios[] = {
/* Write Protect: GPIO24 = KBC3_SPI_WP# */
{GPIO_SPI_WP, ACTIVE_HIGH, get_write_protect_state(),
"write protect"},
/* Recovery: GPIO42 = CHP3_REC_MODE# */
{GPIO_REC_MODE, ACTIVE_LOW, !get_recovery_mode_switch(),
"presence"},

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@ -33,10 +33,6 @@ void fill_lb_gpios(struct lb_gpios *gpios)
u16 gen_pmcon_1 = pci_s_read_config32(dev, GEN_PMCON_1);
struct lb_gpio chromeos_gpios[] = {
/* Write Protect: GPIO68 = CHP3_SPI_WP */
{GPIO_SPI_WP, ACTIVE_HIGH, get_write_protect_state(),
"write protect"},
/* Recovery: GPIO42 = CHP3_REC_MODE# */
{GPIO_REC_MODE, ACTIVE_LOW, !get_recovery_mode_switch(),
"presence"},