Update cml-h pl2 to 90W

Change-Id: Ibc1c142c4191334308eb02c5dee65d38c51b34e8
This commit is contained in:
Jeremy Soller 2020-06-17 11:52:14 -06:00
parent e0de23478e
commit 90a93a8a32
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GPG Key ID: E988B49EE78A7FB1
3 changed files with 3 additions and 3 deletions

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@ -29,7 +29,7 @@ chip soc/intel/cannonlake
// /sys/class/powercap/intel-rapl:0/constraint_0_power_limit_uw // /sys/class/powercap/intel-rapl:0/constraint_0_power_limit_uw
.tdp_pl1_override = 45, .tdp_pl1_override = 45,
// /sys/class/powercap/intel-rapl:0/constraint_1_power_limit_uw // /sys/class/powercap/intel-rapl:0/constraint_1_power_limit_uw
.tdp_pl2_override = 68, .tdp_pl2_override = 90,
}" }"
# Enable "Intel Speed Shift Technology" # Enable "Intel Speed Shift Technology"

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@ -29,7 +29,7 @@ chip soc/intel/cannonlake
// /sys/class/powercap/intel-rapl:0/constraint_0_power_limit_uw // /sys/class/powercap/intel-rapl:0/constraint_0_power_limit_uw
.tdp_pl1_override = 45, .tdp_pl1_override = 45,
// /sys/class/powercap/intel-rapl:0/constraint_1_power_limit_uw // /sys/class/powercap/intel-rapl:0/constraint_1_power_limit_uw
.tdp_pl2_override = 68, .tdp_pl2_override = 90,
}" }"
# Enable "Intel Speed Shift Technology" # Enable "Intel Speed Shift Technology"

View File

@ -29,7 +29,7 @@ chip soc/intel/cannonlake
// /sys/class/powercap/intel-rapl:0/constraint_0_power_limit_uw // /sys/class/powercap/intel-rapl:0/constraint_0_power_limit_uw
.tdp_pl1_override = 45, .tdp_pl1_override = 45,
// /sys/class/powercap/intel-rapl:0/constraint_1_power_limit_uw // /sys/class/powercap/intel-rapl:0/constraint_1_power_limit_uw
.tdp_pl2_override = 68, .tdp_pl2_override = 90,
}" }"
# Enable "Intel Speed Shift Technology" # Enable "Intel Speed Shift Technology"