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Disable Precision Time Measurement for CPU PCIe ports

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Change-Id: I007b6825a7d558254f890723ef568b96d9e884bc
This commit is contained in:
Jeremy Soller
2020-11-17 19:26:27 -07:00
parent efd716cef0
commit 9847012bc6
1 changed files with 1 additions and 0 deletions
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src/soc/intel/tigerlake/fsp_params.c
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@@ -197,6 +197,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
/* TODO: CPU RP Configs */ /* TODO: CPU RP Configs */
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
params->CpuPcieRpAdvancedErrorReporting[i] = 0; params->CpuPcieRpAdvancedErrorReporting[i] = 0;
params->CpuPcieRpPtmEnabled[i] = 0;
} }
/* Enable xDCI controller if enabled in devicetree and allowed */ /* Enable xDCI controller if enabled in devicetree and allowed */