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mb/system76/tgl-u: Enable reporting CPU C10 state over ESPI

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Change-Id: Ia811187df194af596eeea7d4fd7be0de5fa9254c
This commit is contained in:
Jeremy Soller
2023-03-10 13:28:53 -07:00
parent f3c764303c
commit a2bbbc6769
3 changed files with 9 additions and 0 deletions
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3
src/mainboard/system76/tgl-u/variants/darp7/ramstage.c
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@@ -12,4 +12,7 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params)
// IOM config
params->PchUsbOverCurrentEnable = 0;
params->PortResetMessageEnable[5] = 1; // J_TYPEC2
// Enable reporting CPU C10 state over ESPI
params->PchEspiHostC10ReportEnable = 1;
}

3
src/mainboard/system76/tgl-u/variants/galp5/ramstage.c
View File

@@ -12,4 +12,7 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params)
// IOM config
params->PchUsbOverCurrentEnable = 0;
params->PortResetMessageEnable[5] = 1; // J_TYPEC2
// Enable reporting CPU C10 state over ESPI
params->PchEspiHostC10ReportEnable = 1;
}

3
src/mainboard/system76/tgl-u/variants/lemp10/ramstage.c
View File

@@ -12,4 +12,7 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params)
// IOM config
params->PchUsbOverCurrentEnable = 0;
params->PortResetMessageEnable[2] = 1; // J_TYPEC1
// Enable reporting CPU C10 state over ESPI
params->PchEspiHostC10ReportEnable = 1;
}