mb/lenovo/*/devicetree: Add BDC detection support
Add support for BDC detection, based on the schematics for each board. Support for boards without schematics needs further testing. Needs test on all boards. Change-Id: If33ef88fb808f36b050393fa83eb1b541ce936b9 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/19810 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
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@ -178,6 +178,10 @@ chip northbridge/intel/gm45
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register "eventb_enable" = "0xff"
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register "eventc_enable" = "0xff"
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register "eventd_enable" = "0xff"
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register "has_bdc_detection" = "1"
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register "bdc_gpio_num" = "48"
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register "bdc_gpio_lvl" = "0"
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end
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chip superio/nsc/pc87382
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@ -158,6 +158,10 @@ chip northbridge/intel/sandybridge
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register "eventc_enable" = "0xff"
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register "eventd_enable" = "0xff"
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register "evente_enable" = "0x0d"
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register "has_bdc_detection" = "1"
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register "bdc_gpio_num" = "54"
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register "bdc_gpio_lvl" = "0"
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end
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chip drivers/lenovo/hybrid_graphics
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device pnp ff.f on end # dummy
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@ -150,6 +150,10 @@ chip northbridge/intel/sandybridge
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register "eventc_enable" = "0xff"
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register "eventd_enable" = "0xff"
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register "evente_enable" = "0x0d"
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register "has_bdc_detection" = "1"
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register "bdc_gpio_num" = "54"
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register "bdc_gpio_lvl" = "0"
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end
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chip drivers/lenovo/hybrid_graphics
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device pnp ff.f on end # dummy
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@ -146,6 +146,10 @@ chip northbridge/intel/sandybridge
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register "eventc_enable" = "0xff"
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register "eventd_enable" = "0xff"
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register "evente_enable" = "0x0d"
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register "has_bdc_detection" = "1"
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register "bdc_gpio_num" = "54"
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register "bdc_gpio_lvl" = "0"
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end
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chip drivers/lenovo/hybrid_graphics
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device pnp ff.f on end # dummy
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@ -154,6 +154,10 @@ chip northbridge/intel/sandybridge
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register "eventc_enable" = "0xff"
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register "eventd_enable" = "0xff"
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register "evente_enable" = "0x0d"
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register "has_bdc_detection" = "1"
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register "bdc_gpio_num" = "54"
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register "bdc_gpio_lvl" = "0"
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end
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end # LPC Controller
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device pci 1f.2 on
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@ -129,6 +129,10 @@ chip northbridge/intel/sandybridge
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register "eventc_enable" = "0xff"
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register "eventd_enable" = "0xff"
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register "evente_enable" = "0x0d"
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register "has_bdc_detection" = "1"
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register "bdc_gpio_num" = "54"
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register "bdc_gpio_lvl" = "0"
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end
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chip drivers/lenovo/hybrid_graphics
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device pnp ff.f on end # dummy
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@ -136,6 +136,10 @@ chip northbridge/intel/sandybridge
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register "eventc_enable" = "0xff"
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register "eventd_enable" = "0xff"
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register "evente_enable" = "0x0d"
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register "has_bdc_detection" = "1"
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register "bdc_gpio_num" = "54"
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register "bdc_gpio_lvl" = "0"
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end
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chip drivers/lenovo/hybrid_graphics
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device pnp ff.f on end # dummy
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@ -155,6 +155,9 @@ chip northbridge/intel/i945
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register "eventc_enable" = "0x3c"
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register "eventd_enable" = "0xff"
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register "has_bdc_detection" = "1"
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register "bdc_gpio_num" = "7"
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register "bdc_gpio_lvl" = "0"
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end
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chip superio/nsc/pc87382
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device pnp 164e.2 on # IR
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@ -155,6 +155,10 @@ chip northbridge/intel/sandybridge
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register "eventc_enable" = "0xff"
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register "eventd_enable" = "0xff"
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register "evente_enable" = "0x0d"
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register "has_bdc_detection" = "1"
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register "bdc_gpio_num" = "54"
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register "bdc_gpio_lvl" = "0"
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end
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end # LPC bridge
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device pci 1f.2 on
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@ -182,6 +182,10 @@ chip northbridge/intel/gm45
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register "eventb_enable" = "0xff"
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register "eventc_enable" = "0xff"
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register "eventd_enable" = "0xff"
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register "has_bdc_detection" = "1"
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register "bdc_gpio_num" = "7"
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register "bdc_gpio_lvl" = "0"
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end
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chip superio/nsc/pc87382
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@ -72,6 +72,10 @@ chip northbridge/intel/nehalem
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register "eventb_enable" = "0xff"
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register "eventc_enable" = "0xff"
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register "eventd_enable" = "0xff"
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register "has_bdc_detection" = "1"
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register "bdc_gpio_num" = "48"
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register "bdc_gpio_lvl" = "0"
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end
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device cpu_cluster 0 on
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@ -164,6 +164,10 @@ chip northbridge/intel/sandybridge
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register "eventc_enable" = "0xff"
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register "eventd_enable" = "0xff"
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register "evente_enable" = "0x0d"
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register "has_bdc_detection" = "1"
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register "bdc_gpio_num" = "54"
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register "bdc_gpio_lvl" = "0"
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end
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end # LPC bridge
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device pci 1f.2 on
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@ -166,6 +166,10 @@ chip northbridge/intel/sandybridge
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register "eventc_enable" = "0xff"
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register "eventd_enable" = "0xff"
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register "evente_enable" = "0x0d"
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register "has_bdc_detection" = "1"
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register "bdc_gpio_num" = "54"
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register "bdc_gpio_lvl" = "0"
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end
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end # LPC bridge
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device pci 1f.2 on
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@ -134,6 +134,10 @@ chip northbridge/intel/i945
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register "eventb_enable" = "0xff"
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register "eventc_enable" = "0xff"
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register "eventd_enable" = "0xff"
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register "has_bdc_detection" = "1"
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register "bdc_gpio_num" = "7"
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register "bdc_gpio_lvl" = "0"
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end
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chip superio/nsc/pc87382
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device pnp 164e.2 on # IR
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